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1
Kemp, Mark A. "Simulation and experimental study of the multichanneling rimfire gas switch". Diss., Columbia, Mo. : University of Missouri-Columbia, 2005. http://hdl.handle.net/10355/4281.
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Thesis (M.S.) University of Missouri-Columbia, 2005.The entire dissertation/thesis text is included in the research.pdf file; the official abstract appears in the short.pdf file (which also appears in the research.pdf); a non-technical general description, or public abstract, appears in the public.pdf file. Title from title screen of research.pdf file viewed on (July 10, 2006) Includes bibliographical references.
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Kaya, Ibrahim. "A Switch Mode Power Supply For Producing Half Wave Sine Output". Master's thesis, METU, 2008. http://etd.lib.metu.edu.tr/upload/12609781/index.pdf.
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In this thesisanalysis, design and implementation of a DC-DC converter with active clamp forward topology is presented. The main objective of this thesis is generating a rectified sinusoidal voltage at the output of the converter. This is accomplished by changing the reference signal of the converter. The converter output is applied to an inverter circuit in order to obtain sinusoidal waveform. The zero crossing points of the converter is detected and the inverter drive signals are generated in order to obtain sinusoidal waveform from the output of the converter. Next, the operation of the DC-DC converter and sinusoidal output inverter coupled performance is investigated with resistive and inductive loads to find out how the proposed topology performs. The design is implemented with an experimental set-up and steady state and dynamic performance of the designed power supply is tested. Finally an evaluation of how better performance can be obtained from this kind of arrangement to obtain a sinusoidal output inverted is thoroughly discussed
3
Hutsel, Brian T. Kovaleski Scott D. "Runtime and jitter of a laser triggered gas switch". Diss., Columbia, Mo. : University of Missouri--Columbia, 2008. http://hdl.handle.net/10355/5783.
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The entire thesis text is included in the research.pdf file; the official abstract appears in the short.pdf file; a non-technical public abstract appears in the public.pdf file. Title from PDF of title page (University of Missouri--Columbia, viewed on September 24, 2009). Thesis advisor: Dr. Scott Kovaleski. Includes bibliographical references.
4
Le, Coz Julien. "Réduction de la consommation statique des circuits intégrés en technologie SOI 65 nm partiellement désertée". Thesis, Grenoble, 2011. http://www.theses.fr/2011GRENT076/document.
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Les technologies SOI partiellement désertées (PD-SOI), permettent de gagner en performances ou en consommation dynamique, par rapport à leur équivalent sur substrat massif (BULK). Leur inconvénient principal est la consommation statique qui est bien supérieure, en raison principalement de l'effet de body flottant de ses transistors. Ce travail propose une technique de réduction de la consommation statique, pour la technologie PD-SOI, basée sur le principe des interrupteurs de puissance. Un nouveau facteur de mérite recherchant le meilleur compromis entre vitesse, courant de fuite et surface est introduit pour la sélection du meilleur interrupteur de puissance. L'interrupteur de puissance proposé apporte par rapport à une solution de référence, et pour le même courant de fuite en mode éteint, une réduction de la résistance équivalente en mode passant de 20%. Les tests comparatifs sur Silicium de blocs LDPC incluant ces montages montrent, entre PD-SOI et BULK, un gain de 20% en vitesse pour la même tension d'alimentation, une réduction de 30% de la consommation dynamique pour la même vitesse et une division par 2 de la consommation statique. Enfin, une bascule de rétention, élément à associer aux interrupteurs de puissance, optimisée pour le PD-SOI, est proposée. Cette bascule est conçue de manière robuste et peu fuyantePartially depleted SOI technologies (PD-SOI), offer advantages in terms of speed and dynamic power consumption compared to bulk technologies. The main drawback of the PD-SOI technology is its static power consumption, which is higher than bulk one. It is due to the floating body of its transistors. This work presents a new static power consumption design technique based on power switches. A new factor of merit is introduced selecting the power switch with the best trade-off in terms of leakage current, speed and area. A new power switch brings, in comparison to a reference solution, a reduction of 20% of the ON mode equivalent resistance for the same OFF mode leakage current PD-SOI Silicon validation test chips include LDPC bloc supplied by the proposed solution. Comparing to the bulk technology, a speed gain of 20% is measured for the same voltage supply and a dynamic power consumption reduction of 30% at same speed is achieved. This solution allows reducing by 2 the static power consumption. Finally, a retention flip-flop associated to the implementation of power switches and optimized in PD-SOI is proposed. This flip-flop is designed to be robust with a low leakage current
5
Du, Sijun. "Energy-efficient interfaces for vibration energy harvesting". Thesis, University of Cambridge, 2018. https://www.repository.cam.ac.uk/handle/1810/270359.
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Ultra low power wireless sensors and sensor systems are of increasing interest in a variety of applications ranging from structural health monitoring to industrial process control. Electrochemical batteries have thus far remained the primary energy sources for such systems despite the finite associated lifetimes imposed due to limitations associated with energy density. However, certain applications (such as implantable biomedical electronic devices and tire pressure sensors) require the operation of sensors and sensor systems over significant periods of time, where battery usage may be impractical and add cost due to the requirement for periodic re-charging and/or replacement. In order to address this challenge and extend the operational lifetime of wireless sensors, there has been an emerging research interest on harvesting ambient vibration energy. Vibration energy harvesting is a technology that generates electrical energy from ambient kinetic energy. Despite numerous research publications in this field over the past decade, low power density and variable ambient conditions remain as the key limitations of vibration energy harvesting. In terms of the piezoelectric transducers, the open-circuit voltage is usually low, which limits its power while extracted by a full-bridge rectifier. In terms of the interface circuits, most reported circuits are limited by the power efficiency, suitability to real-world vibration conditions and system volume due to large off-chip components required. The research reported in this thesis is focused on increasing power output of piezoelectric transducers and power extraction efficiency of interface circuits. There are five main chapters describing two new design topologies of piezoelectric transducers and three novel active interface circuits implemented with CMOS technology. In order to improve the power output of a piezoelectric transducer, a series connection configuration scheme is proposed, which splits the electrode of a harvester into multiple equal regions connected in series to inherently increase the open-circuit voltage generated by the harvester. This topology passively increases the rectified power while using a full-bridge rectifier. While most of piezoelectric transducers are designed with piezoelectric layers fully covered by electrodes, this thesis proposes a new electrode design topology, which maximizes the raw AC output power of a piezoelectric harvester by finding an optimal electrode coverage. In order to extract power from a piezoelectric harvester, three active interface circuits are proposed in this thesis. The first one improves the conventional SSHI (synchronized switch harvesting on inductor) by employing a startup circuitry to enable the system to start operating under much lower vibration excitation levels. The second one dynamically configures the connection of the two regions of a piezoelectric transducer to increase the operational range and output power under a variety of excitation levels. The third one is a novel SSH architecture which employs capacitors instead of inductors to perform synchronous voltage flip. This new architecture is named as SSHC (synchronized switch harvesting on capacitors) to distinguish from SSHI rectifiers and indicate its inductorless architecture.
6
Masoud, Khalid Hasan. "Circuits and controls for grid-connected inverters". Thesis, Queensland University of Technology, 2002.
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Darwish, M. K. E.-S. "Switched-capacitor filters for power applications". Thesis, Brunel University, 1987. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.375203.
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Pollock, Charles. "Power converter circuits for switched reluctance motors". Thesis, Heriot-Watt University, 1989. http://hdl.handle.net/10399/844.
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KRUTKO, OLEG B. "OPTICALLY SWITCHED INTEGRATED CIRCUIT POWER CONVERTERS". University of Cincinnati / OhioLINK, 2000. http://rave.ohiolink.edu/etdc/view?acc_num=ucin973790864.
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Zhang, Xuan. "Switched Capacitor Circuit Based Isolated Power Converters". The Ohio State University, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=osu1461327493.
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Lehn, Peter W. "Modelling and control of switched circuits for high power applications". Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1999. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape8/PQDD_0010/NQ41031.pdf.
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Muhyaldin, Siham. "Investigation of EDFA power transients in circuit-switched and packet-switched optical networks". Thesis, Aston University, 2009. http://publications.aston.ac.uk/18275/.
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Erbium-doped fibre amplifiers (EDFA’s) are a key technology for the design of all optical communication systems and networks. The superiority of EDFAs lies in their negligible intermodulation distortion across high speed multichannel signals, low intrinsic losses, slow gain dynamics, and gain in a wide range of optical wavelengths. Due to long lifetime in excited states, EDFAs do not oppose the effect of cross-gain saturation. The time characteristics of the gain saturation and recovery effects are between a few hundred microseconds and 10 milliseconds. However, in wavelength division multiplexed (WDM) optical networks with EDFAs, the number of channels traversing an EDFA can change due to the faulty link of the network or the system reconfiguration. It has been found that, due to the variation in channel number in the EDFAs chain, the output system powers of surviving channels can change in a very short time. Thus, the power transient is one of the problems deteriorating system performance. In this thesis, the transient phenomenon in wavelength routed WDM optical networks with EDFA chains was investigated. The task was performed using different input signal powers for circuit switched networks. A simulator for the EDFA gain dynamicmodel was developed to compute the magnitude and speed of the power transients in the non-self-saturated EDFA both single and chained. The dynamic model of the self-saturated EDFAs chain and its simulator were also developed to compute the magnitude and speed of the power transients and the Optical signal-to-noise ratio (OSNR). We found that the OSNR transient magnitude and speed are a function of both the output power transient and the number of EDFAs in the chain. The OSNR value predicts the level of the quality of service in the related network. It was found that the power transients for both self-saturated and non-self-saturated EDFAs are close in magnitude in the case of gain saturated EDFAs networks. Moreover, the cross-gain saturation also degrades the performance of the packet switching networks due to varying traffic characteristics. The magnitude and the speed of output power transients increase along the EDFAs chain. An investigation was done on the asynchronous transfer mode (ATM) or the WDM Internet protocol (WDM-IP) traffic networks using different traffic patterns based on the Pareto and Poisson distribution. The simulator is used to examine the amount and speed of the power transients in Pareto and Poisson distributed traffic at different bit rates, with specific focus on 2.5 Gb/s. It was found from numerical and statistical analysis that the power swing increases if the time interval of theburst-ON/burst-OFF is long in the packet bursts. This is because the gain dynamics is fast during strong signal pulse or with long duration pulses, which is due to the stimulatedemission avalanche depletion of the excited ions. Thus, an increase in output power levelcould lead to error burst which affects the system performance.
13
Zheng, Guizhen. "Low power reconfigurable microwave circuits using RF MEMS switches for wireless systems". Available online, Georgia Institute of Technology, 2005, 2005. http://etd.gatech.edu/theses/available/etd-05242005-135940/.
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Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2006.John Papapolymerou, Committee Chair ; Joy Laskar, Committee Member ; John Cressler, Committee Member ; Alan Doolittle, Committee Member ; Clifford Henderson, Committee Member.
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Naik, Priti M. (Priti Manher) 1973. "Low voltage, low power CMOS operational amplifier design for switched capacitor circuits". Thesis, Massachusetts Institute of Technology, 1998. http://hdl.handle.net/1721.1/9948.
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Sullivan, Dustin L. Kovaleski Scott D. "Laser target triggering of gas switches". Diss., Columbia, Mo. : University of Missouri--Columbia, 2008. http://hdl.handle.net/10355/5670.
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The entire thesis text is included in the research.pdf file; the official abstract appears in the short.pdf file; a non-technical public abstract appears in the public.pdf file. Title from PDF of title page (University of Missouri--Columbia, viewed on October 5, 2009). Thesis advisor: Dr. Scott Kovaleski. Includes bibliographical references.
16
Han, Sijing. "Design and Modeling Environment for Nano-Electro-Mechanical Switch (NEMS) Digital Systems". Case Western Reserve University School of Graduate Studies / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=case1354568246.
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Uzun, Orhun Aras. "Speed, Power Efficiency, and Noise Improvements for Switched Capacitor Voltage Converters". Scholar Commons, 2017. http://scholarcommons.usf.edu/etd/6970.
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Switched-capacitor (SC) DC-DC converters provide a viable solution for on-chip DC-DC conversion as all the components required are available in most processes. However, power efficiency, power density characteristics of SC converters are adversely affected by the integration, and characteristics such as response time and noise can be further improved with an on-chip converter. An analysis on speed, power efficiency, and noise performance of SC converters is presented and verified using simulations. Based on the analysis two techniques, converter-gating and adaptive gain control, are developed. Converter-gating uses a combination of smaller stages and reconfiguration during transient load steps to improve the power efficiency and transient response speed. The stages of the converter are also distributed across the die to reduce the voltage drop and noise on power supply. Adaptive gain control improves transient response through manipulation of the gain of the integrator in the control loop. This technique focuses on improving the response time during converter reconfiguration and offers a general solution to transient response improvement instead of focusing on the worst case scenario which is usually the largest transient load step. The techniques developed are then implemented in ST 28nm FDSOI process and test methodologies are discussed.
18
Suciu, Constantin. "Switch mode emulation of large value capacitors in the rotor circuit to improve the induction motor performance". Thesis, Nottingham Trent University, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.314331.
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Ambatipudi, Radhika. "Multilayered Coreless Printed Circuit Board (PCB) Step-down Transformers for High Frequency Switch Mode Power Supplies (SMPS)". Licentiate thesis, Mittuniversitetet, Institutionen för informationsteknologi och medier, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:miun:diva-13967.
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The Power Supply Unit (PSU) plays a vital role in almost all electronic equipment. The continuous efforts applied to the improvement of semiconductor devices such as MOSFETS, diodes, controllers and MOSFET drivers have led to the increased switching speeds of power supplies. By increasing the switching frequency of the converter, the size of passive elements such as inductors, transformers and capacitors can be reduced. Hence, the high frequency transformer has become the backbone in isolated AC/DC and DC/DC converters. The main features of transformers are to provide isolation for safety purpose, multiple outputs such as in telecom applications, to build step down/step up converters and so on. The core based transformers, when operated at higher frequencies, do have limitations such as core losses which are proportional to the operating frequency. Even though the core materials are available in a few MHz frequency regions, because of the copper losses in the windings of the transformers those which are commercially available were limited from a few hundred kHz to 1MHz. The skin and proximity effects because of induced eddy currents act as major drawbacks while operating these transformers at higher frequencies. Therefore, it is necessary to mitigate these core losses, skin and proximity effects while operating the transformers at very high frequencies. This can be achieved by eliminating the magnetic cores of transformers and by introducing a proper winding structure. A new multi-layered coreless printed circuit board (PCB) step down transformer for power transfer applications has been designed and this maintains the advantages offered by existing core based transformers such as, high voltage gain, high coupling coefficient, sufficient input impedance and high energy efficiency with the assistance of a resonant technique. In addition, different winding structures have been studied and analysed for higher step down ratios in order to reduce copper losses in the windings and to achieve a higher coupling coefficient. The advantage of increasing the layer for the given power transfer application in terms of the coupling coefficient, resistance and energy efficiency has been reported. The maximum energy efficiency of the designed three layered transformers was found to be within the range of 90%-97% for power transfer applications operated in a few MHz frequency regions. The designed multi-layered coreless PCB transformers for given power applications of 8, 15 and 30W show that the volume reduction of approximately 40-90% is possible when compared to its existing core based counterparts. The estimation of EMI emissions from the designed transformers proves that the amount of radiated EMI from a three layered transformer is less than that of the two layered transformer because of the decreased radius for the same amount of inductance. Multi-layered coreless PCB gate drive transformers were designed for signal transfer applications and have successfully driven the double ended topologies such as the half bridge, the two switch flyback converter and resonant converters with low gate drive power consumption of about half a watt. The performance characteristics of these transformers have also been evaluated using the high frequency magnetic material made up of NiZn and operated in the 2-4MHz frequency region. These multi-layered coreless PCB power and signal transformers together with the latest semiconductor switching devices such as SiC and GaN MOSFETs and the SiC schottky diode are an excellent choice for the next generation compact SMPS.
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Zheng, Guizhen. "Low Power Reconfigurable Microwave Circuts Using RF MEMS Switches for Wireless Systems". Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/11656.
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This dissertation presents the research on several different projects. The first project is a via-less CPW RF probe pad to microstrip transition; The second, the third, and the fourth one are reconfigurable microwave circuits using RF MEMS switches: an X-band reconfigurable bandstop filter for wireless RF frontends, an X-band reconfigurable impedance tuner for a class-E high efficiency power amplifier using RF MEMS switches, and a reconfigurable self-similar antenna using RF MEMS switches. The first project was developed in order to facilitate the on-wafer measurement for the second and the third project, since both of them are microstrip transmission line based microwave circuits. A thorough study of the via-less CPW RF probe pad to microstrip transition on silicon substrates was performed and general design rules are derived to provide design guidelines. This research work is then expanded to W-band via-less transition up to 110 GHz. The second project is to develop a low power reconfigurable monolithic bandstop filter operating at 8, 10, 13, and 15 GHz with cantilever beam capacitive MEMS switches. The filter contains microstrip lines and radial stubs that provide different reactances at different frequencies. By electrically actuating different MEMS switches, the different
reactances from different radial stubs connecting to these switches will be selected, thus, the filter will resonate at different frequencies. The third project is to develop a monolithic reconfigurable impedance tuner at 10 GHz with the cantilever DC contact MEMS switch. The impedance tuner is a two port network based on a 3bit-3bit digital design, and uses 6 radial shunt stubs that can be selected via integrated DC contact MEMS switches. By selecting different states of the switches, there will be a total of 2^6 = 64 states, which means 64 different impedances will be generated at the output port of the tuner. This will provide a sufficient tuning range for the output port of the power amplifier to maximize the power efficiency. The last project is to integrate the DC contact RF MEMS switches with self-similar planar antennas, to provide a reconfigurable antenna system that radiates with similar patterns over a wide range of frequencies.
21
Mocevic, Slavko. "PCB-Embedded Phase Current Sensor and Short-Circuit Detector for High Power SiC-Based Converters". Thesis, Virginia Tech, 2018. http://hdl.handle.net/10919/84348.
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Nowadays, major public concern is concentrated on reducing the usage of fossil fuels and reducing emissions of CO2 by different energy advancement. Electric vehicle technology presents extremely effective way of reducing carbon emissions and paves the way of having sustainable and renewable energy future. In order to wear the cost of electric vehicles down, batteries have to be improved as well as higher power density and high reliability has to be achieved. This research work mainly focuses on achieving higher power density and higher reliability of the inverter stage by utilizing wide-bandgap SiC MOSFET semiconductor devices in electric vehicle application.
In order to achieve higher reliability of the inverter stage, high bandwidth, high performance Rogowski coil switch current sensors are employed. These sensor were embedded on the PCB and integrated on the gate driver. High bandwidth switch current sensor measurement is used for fast short-circuit detection and protection of the SiC MOSFET semiconductor switches. Furthermore, comparison with conventional detection and protection method
used in automotive IGBT applications is shown where novel protection showed superior performance.
This thesis also shows principle of how to obtain phase currents of the system using Rogowski coil switch current sensor measurements. Digital reconstruction principle is employed to obtain the phase currents. Accurate and linear current sensor is achieved. By successfully realizing this integrated phase current measurement on the gate driver, elimination of the commercial current sensors from the system is possible. By eliminating existing phase current sensors, higher power density could be achieved. Sensor is evaluated in both continuous and discontinuous PWM schemes.Master of Science
Together with renewable sources, electric vehicle will play an important role as a part of sustainable and renewable energy future by significantly reducing emissions of CO2 into the atmosphere. In order to make electric cars more acceptable and accessible and make a significant impact on the environment, cost must be lowered down. To wear the cost of the electric vehicles down, powertrain of the car must be significantly improved and made smaller as well as lighter. This thesis mainly focuses on improving the reliability of the motor driving stage by implementing novel protection during fault periods such as short-circuit event. Furthermore, this novel protection allows current sensing that is crucial for motor control during normal operation periods. This will enable more compact motor driving stage since existing current sensing elements can be eliminated.
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Landi, Laura. "Progetto e implementazione di circuiti a switch sincronizzato per la conversione di micropotenze da trasduttori piezoelettrici". Master's thesis, Alma Mater Studiorum - Università di Bologna, 2021. http://amslaurea.unibo.it/24534/.
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Una delle principali caratteristiche dei trasduttori per energy harvesting piezoelettrici è il fatto che la loro impedenza d'uscita è principalmente capacitiva. Questo consente di elaborare schemi di conversione dell'energia basati su circuiti risonanti attivati in modo sincrono con le vibrazioni, che risultano in grado di aumentare notevolmente la potenza di uscita rispetto alle comuni interfacce passive. Questa tesi si è posta come obiettivo la progettazione e implementazione di un circuito per energy harvesting da vibrazioni basato sulla tecnica Synchronized Switch Harvesting on Inductor (SSHI) che garantisse un'elevata efficienza di conversione. Dovendo gestire potenze in ingresso tipicamente di debole entità, l'architettura proposta è stata ottimizzata per minimizzare la dissipazione di potenza interna al convertitore. Il circuito proposto è stato infine validato sperimentalmente tramite allestimento di un setup di misura dedicato.
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Säll, Erik. "Design of a Low Power, High Performance Track-and-Hold Circuit in a 0.18µm CMOS Technology". Thesis, Linköping University, Department of Electrical Engineering, 2002. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1353.
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This master thesis describes the design of a track-and-hold (T&H) circuit with 10bit resolution, 80MS/s and 30MHz bandwidth. It is designed in a 0.18µm CMOS process with a supply voltage of 1.8 Volt. The circuit is supposed to work together with a 10bit pipelined analog to digital converter.
A switched capacitor topology is used for the T&H circuit and the amplifier is a folded cascode OTA with regulated cascode. The switches used are of transmission gate type.
The thesis presents the design decisions, design phase and the theory needed to understand the design decisions and the considerations in the design phase.
The results are based on circuit level SPICE simulations in Cadence with foundry provided BSIM3 transistor models. They show that the circuit has 10bit resolution and 7.6mW power consumption, for the worst-case frequency of 30MHz. The requirements on the dynamic performance are all fulfilled, most of them with large margins.
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Kozak, Joseph Peter. "Hard Switched Robustness of Wide Bandgap Power Semiconductor Devices". Diss., Virginia Tech, 2021. http://hdl.handle.net/10919/104874.
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As power conversion technology is being integrated further into high-reliability environments such as aerospace and electric vehicle applications, a full analysis and understanding of the system's robustness under operating conditions inside and outside the safe-operating-area is necessary. The robustness of power semiconductor devices, a primary component of power converters, has been traditionally evaluated through qualification tests that were developed for legacy silicon (Si) technologies. However, new devices have been commercialized using wide bandgap (WBG) semiconductors including silicon carbide (SiC) and gallium nitride (GaN). These new devices promise enhanced capabilities (e.g., higher switching speed, smaller die size, lower junction capacitances, and higher thermal conductance) over legacy Si devices, thus making the traditional qualification experiments ineffective.
This work begins by introducing a new methodology for evaluating the switching robustness of SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). Recent static acceleration tests have revealed that SiC MOSFETs can safely operate for thousands of hours at a blocking voltage higher than the rated voltage and near the avalanche boundary. This work evaluates the robustness of SiC MOSFETs under continuous, hard-switched, turn-off stresses with a dc-bias higher than the device rated voltage. Under these conditions, SiC MOSFETs show degradation in merely tens of hours at 25si{textdegree}C and tens of minutes at 100si{textdegree}C. Two independent degradation and failure mechanisms are unveiled, one present in the gate-oxide and the other in the bulk-semiconductor regions, detected by the increase in gate leakage current and drain leakage current, respectively. The second degradation mechanism has not been previously reported in the literature; it is found to be related to the electron hopping along the defects in semiconductors generated in the switching tests. The comparison with the static acceleration tests reveals that both degradation mechanisms correlate to the high-bias switching transients rather than the high-bias blocking states.
The GaN high-electron-mobility transistor (HEMT) is a newer WBG device that is being increasingly adopted at an unprecedented rate. Different from SiC MOSFETs, GaN HEMTs have no avalanche capability and withstand the surge energy through capacitive charging, which often causes significant voltage overshoot up to their catastrophic limit. As a result, the dynamic breakdown voltage (BV) and transient overvoltage margin of GaN devices must be studied to fully evaluate the switching ruggedness of devices. This work characterizes the transient overvoltage capability and failure mechanisms of GaN HEMTs under hard-switched turn-off conditions at increasing temperatures, by using a clamped inductive switching circuit with a variable parasitic inductance. This test method allows flexible control over both the magnitude and the dV/dt of the transient overvoltage. The overvoltage robustness of two commercial enhancement-mode (E-mode) p-gate HEMTs was extensively studied: a hybrid drain gate injection transistor (HD-GIT) with an Ohmic-type gate and a Schottky p-Gate HEMT (SP-HEMT). The overvoltage failure of the two devices was found to be determined by the overvoltage magnitude rather than the dV/dt. The HD-GIT and the SP-HEMT were found to fail at a voltage overshoot magnitude that is higher than the breakdown voltage in the static current-voltage measurement. These single event failure tests were repeated at increasing temperatures (100si{textdegree}C and 150si{textdegree}C), and the failures of both devices were consistent with room temperature results. The two types of devices show different failure behaviors, and the underlying mechanisms (electron trapping) have been revealed by physics-based device simulations.
Once this single-event overvoltage failure was established, the device's robustness under repetitive overvoltage and surge-energy events remained unclear; therefore, the switching robustness was evaluated for both the HD-GIT and SP-HEMT in a clamped, inductive switching circuit with a 400 V dc bias. A parasitic inductance was used to generate the overvoltage stress events with different overvoltage magnitude up to 95% of the device's destructive limit, different switching periods from 10 ms to 0.33 ms, different temperatures up to 150si{textdegree}C, and different negative gate biases. The electrical parameters of these devices were measured before and after 1 million stress cycles under varying conditions. The HD-GITs showed no failure or permanent degradation after 1-million overvoltage events at different switching periods, or elevated temperatures. The SP-HEMTs showed more pronounced parametric shifts after the 1 million cycles in the threshold voltage, on-resistance, and saturation drain current. Different shifts were also observed from stresses under different overvoltage magnitudes and are attributable to the trapping of the holes produced in impact ionization. All shifts were found to be recoverable after a relaxation period.
Overall, the results from these switching-oriented robustness tests have shown that SiC MOSFETs show a tremendous lifetime under static dc-bias experiments, but when excited by hard-switching turn-off events, the failure mechanisms are accelerated. These results suggest the insufficient robustness of SiC MOSFETs under high bias, hard switching conditions, and the significance of using switching-based tests to evaluate the device robustness. These inspired the GaN-based hard-switching turn-off robustness experiments, which further demonstrated the dynamic breakdown voltage phenomena. Ultimately these results suggest that the breakdown voltage and overvoltage margin of GaN HEMTs in practical power switching can be significantly underestimated using the static breakdown voltage. Both sets of experiments provide further evidence for the need for switching-oriented robustness experiments to be implemented by both device vendors and users, to fully qualify and evaluate new power semiconductor transistors.Doctor of Philosophy
Power conversion technology is being integrated into industrial and commercial applications with the increased use of laptops, server centers, electric vehicles, and solar and wind energy generation. Each of these converters requires the power semiconductor devices to convert energy reliably and safely. textcolor{black}{Silicon has been the primary material for these devices; however,} new devices have been commercialized from both silicon carbide (SiC) and gallium nitride (GaN) materials. Although these devices are required to undergo qualification testing, the standards were developed for silicon technology. The performance of these new devices offers many additional benefits such as physically smaller dimensions, greater power conversion efficiency, and higher thermal operating capabilities. To facilitate the increased integration of these devices into industrial applications, greater robustness and reliability analyses are required to supplement the traditional tests. The work presented here provides two new experimental methodologies to test the robustness of both SiC and GaN power transistors. These methodologies are oriented around hard-switching environments where both high voltage biases and high conduction current exist and stress the intrinsic semiconductor properties. Experimental evaluations were conducted of both material technologies where the electrical properties were monitored over time to identify any degradation effects. Additional analyses were conducted to determine the physics-oriented failure mechanisms. This work provides insight into the limitations of these semiconductor devices for both device designers and manufacturers as well as power electronic system designers.
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Alzoubi, Khawla Ali. "NANO-ELECTRO-MECHANICAL SWITCH (NEMS) FOR ULTRA-LOW POWER PORTABLE EMBEDDED SYSTEM APPLICATIONS: ANALYSIS, DESIGN, MODELING, AND CIRCUIT SIMULATION". Case Western Reserve University School of Graduate Studies / OhioLINK, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=case1278511770.
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Connor, Mark Anthony. "Design of Power-Scalable Gallium Nitride Class E Power Amplifiers". University of Dayton / OhioLINK, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1405437893.
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Slezák, Pavel. "Regulace provozu autonomních solárních systémů". Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2008. http://www.nusl.cz/ntk/nusl-217646.
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This thesis dealing with description and of autonomous solar systems and algorithms for control of decision-making mechanism. Optimal set of these machanism has effeect in raise of efficiency in hole autonomous system. In practical purposes propose create one by using microprocesor ATMEGA8, which measure all electrical data in system and control all decisions of implemented algorithm.
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Hietakangas, S. (Simo). "Design methods and considerations of supply modulated switched RF power amplifiers". Doctoral thesis, Oulun yliopisto, 2012. http://urn.fi/urn:isbn:9789514298363.
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Abstract This thesis studies the design methods and properties of supply-modulated switch-mode radio frequency power amplifiers. Besides simulation based studies and theory review, two amplifiers were designed: a discrete MESFET class E amplifier (0.5 W at 1 GHz), and an integrated pHEMT class E-1 amplifier (2.0 W at 1.6 GHz) with an on-chip resonator. The existing design methods of the resonant output network of switching amplifiers were reviewed and some extensions on the handling of nonlinear capacitances were proposed. The effects of varying supply voltage were studied and suggestions were given to minimize Vdd / AM and Vdd / PM distortion in supply modulated amplifiers. The implementation of the bias feed was also discussed resulting in proposing a combination of a short transmission line and a small inductor, which provides both fast supply modulation and little effect on harmonic impedances. The main contributions are related to the study of the input impedance of a class E power amplifier, where the effects of supply dependent input impedance and timing skew generated by injected harmonic distortion were analyzed. The stabilization of the amplifier was also discussed. Based on the findings, a push-pull class E amplifier with extra cross-coupled feedback capacitors and second harmonic traps at the gates appears to be a very good starting point for a further studyTiivistelmä Tämä väitöstyö käsittelee radiotaajuuksilla toimivien käyttöjännitemoduloitujen kytkintehovahvistimien ominaisuuksia ja suunnittelumenetelmiä. Suunnittelumenetelmiin liittyvän katsauksen ja simulaatioihin perustuvan tutkimusten lisäksi kaksi vahvistinta toteutettiin väitöstutkimuksen aikana: diskreettikomponentein toteutettu E-luokan vahvistin (MESFET, 0.5 W ja 1 GHz) ja integroituna piirinä toteutettu käänteinen E-luokan vahvistin (pHEMT, 2.0 W ja 1.6 GHz), jonka lähdön resonaattoripiiri sisällytettiin integroituun piiriin. Kytkinvahvistimien suunnittelumenetelmiä verrattiin ja kehitettiin edelleen siten, että suunnitteluvaiheessa voidaan ottaa huomioon esim. transistoripiirin takaisinkytkennässä olevan kapasitanssin epälineaarisuus. Työssä tutkittiin myös käyttöjännitemodulaation vaikutusta kytkinvahvistimien toimintaan, ja tutkimuksen tuloksena annettiin muutamia ehdotuksia käyttöjänniteriippuvan amplitudi- (Vdd / AM) ja vaihemodulaation (Vdd / PM) vähentämiseksi. Lähdön biasointipiirin toteutukseen suositeltiin pienen kelan ja siirtolinjan yhdistelmää. Yhdistelmän avulla pyritään maksimoimaan modulaationopeus ja minimoimaan vaikutukset harmonisiin impedansseihin. Pääkohtina väitöksessä ovat E-luokan kytkinvahvistimesta saadut tutkimus- ja mittaushavainnot käyttöjännitteen funktiona muuttuvasta transistorin tuloimpedanssista sekä suurikokoisen transistorin tuloissa tapahtuvan, säröytymisen aiheuttaman tulosignaalien ajoitusvirheen analyysi. Näiden lisäksi vahvistimen stabiilisuuteen kiinnitettiin huomiota. Saatujen havaintojen perusteella voimme todeta, että push-pull -tyyppinen E-luokan vahvistin olisi mielenkiintoinen valinta jatkotutkimuksille
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Lim, Seungbum. "A Merged two-stage power conversion architecture with switched capacitor circuit for an LED driver module". Thesis, Massachusetts Institute of Technology, 2012. http://hdl.handle.net/1721.1/75662.
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Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.
Includes bibliographical references (p. 71).
In a power converter specified to convert from wide-range and high-level DC voltage or AC line voltage to low-level DC voltage, satisfying high efficiency, high power density, and high power factor is challenging because of the higher device stress and difficulty of maintaining ZVS/ZCS conditions. Our purpose of the proposed two-stage power conversion architecture is to manage this high peak voltage stress and widely-varying operating conditions and to reduce dissipation by placing a switched capacitor pre-regulator stage in front of a very high frequency DC-DC converter stage. Our proposed two-stage architecture has been designed, built, and tested.
by Seungbum Lim.
S.M.
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Elwakil, Ehab. "A new converter topology for high-speed high-starting-torque three-phase switched reluctance motor drive system". Thesis, Brunel University, 2009. http://bura.brunel.ac.uk/handle/2438/3009.
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Switched reluctance motor (SRM) has become a competitive selection for many applications of electric machine drive systems recently due to its relative simple construction and its robustness. The advantages of those motors are high reliability, easy maintenance and good performance. The absence of permanent magnets and windings in rotor gives possibility to achieve very high speeds (over 10000 rpm) and turned SRM into perfect solution for operation in hard conditions like presence of vibrations or impacts. Such simple mechanical structure greatly reduces its price. Due to these features, SRM drives are used more and more into aerospace, automotive and home applications. The major drawbacks of the SRM are the complicated algorithm to control it due to the high degree of nonlinearity, also the SRM has always to be electronically commutated and the need of a shaft position sensor to detect the shaft position, the other limitations are strong torque ripple and acoustic noise effects.
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Zhou, Xigen. "Electrical, Magnetic, Thermal Modeling and Analysis of a 5000A Solid-State Switch Module and Its Application as a DC Circuit Breaker". Diss., Virginia Tech, 2005. http://hdl.handle.net/10919/28900.
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This dissertation presents a systematic design and demonstration of a novel solid-state DC circuit breaker.
The mechanical circuit breaker is widely used in power systems to protect industrial equipment during fault or abnormal conditions. Compared with the slow and high-maintenance mechanical circuit breaker, the solid-state circuit breaker is capable of high-speed interruption of high currents without generating an arc, hence it is maintenance-free. Both the switch and the tripping unit are solid-state, which meet the requirements of precise protection and high reliability. The major challenge in developing and adopting a solid-state circuit breaker has been the lack of power semiconductor switches that have adequate current-carrying capability and interruption capability.
The high-speed, high-current solid-state DC circuit breaker proposed and demonstrated here uses a newly-emerging power semiconductor switch, the emitter turn-off (ETO) thyristor as the main interruption switch. In order to meet the requirement of being a high-current circuit breaker, ETO parallel operation is needed. Therefore the major effort of this dissertation is dedicated to the development of a high-current (5000A) DC switch module that utilizes multiple ETOs in parallel. This work can also be used to develop an AC switch module by changing the asymmetrical ETOs used to symmetrical ETOs.
An accurate device model of the ETO is needed for the development of the high-current DC switch module. In this dissertation a novel physics-base lumped charge model is developed for the ETO thyristor for the first time. This model is verified experimentally and used for the research and development of the emitter turn-off (ETO) thyristor as well as the DC switch module discussed in this dissertation.
With the aid of the developed device model, the device current sharing between paralleled multiple ETO thyristors is investigated. Current sharing is difficult to achieve for a thyristor-type device due to the large device parameter variations and strong positive feedback mechanism in a latched thyristor. The author proposes the "DirectETO" concept that directly benefits from the high-speed capability of the ETO and strong thermal couplings among ETOs. A high-current DC switch module based on the DirectETO can be realized by directly connecting ETOs in parallel without the bulky current sharing inductors used in other current-sharing solutions.
In order to achieve voltage stress suppression under high current conditions, the parasitic parameters, especially parasitic inductance in a high-current ETO switch module are studied. The Partial Element Equivalent Circuit (PEEC) method is used to extract the parasitics. Combined with the developed device model, the electrical interactions among multiple ETOs are investigated which results in structural modification for the solid-state DC switch module.
The electro-thermal model of the DC switch module and the heatsink subsystem is used to identify the "thermal runaway" phenomenon in the module that is caused by the negative temperature coefficient of the ETO's conduction drop. The comparative study of the electro-thermal coupling identifies a strongly-coupled thermal network that increases the stability of the thermal subsystem. The electro-thermal model is also used to calculate the DC and transient thermal limit of the DC switch module.
The high-current (5000A) DC switch module coupled with a solid state tripping unit is successfully applied as a high-speed, high-current solid-state DC circuit breaker. The experimental demonstration of a 5000A current interruption shows an interruption time of about 5 microseconds. This high-speed, high-current DC switch module can therefore be used in DC circuit breaker applications as well as other types of application, such as AC circuit breakers, transfer switches and fault current limiters.
Since the novel solid-state DC circuit breaker is able to extinguish the fault current even before it reaches an uncontrollable level, this feature provides a fast-acting, current-limiting protection scheme for power systems that is not possible with traditional circuit breakers. The potential impact on the power system is also discussed in this dissertation.Ph. D.
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Bin, Mohd Rozlan Mohd Helmy Hakimie. "DC/AC inverter based switched capacitor circuit topology with reduced number of components for low power applications". Thesis, Brunel University, 2017. http://bura.brunel.ac.uk/handle/2438/16009.
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This thesis presents a new DC/AC inverter circuit which is based on a switched-capacitor circuit topology with reduced components (power switch and capacitor) count for low power applications. The proposed circuit has distinct features of both voltage boost-up and near sinusoidal (multi-level/staircase) AC output voltage. The main idea is to utilise a simple circuit technique called resonant-based Double Switch Single Capacitor Switched-Capacitor (DSSC SCC) with variable duty cycle Pulse Width Modulation (PWM) control technique in such a way that multi-level voltage can be realised across a capacitor. In order to show the superiority of the applied technique, comparisons with other techniques/circuits configurations are presented. The circuit technique can significantly reduce the number of multiple stages of switched-capacitor circuit cells of the recent switched-capacitor multi-level inverter topology. The proposed inverter (with integrated DSSC SCC technique) can generate a line-frequency with 13-levels near sinusoidal AC output voltage with low total harmonics distortion. The output voltage can be achieved with the least number of components use and only a single DC source is used as an input. The proposed inverter topology is also reviewed against other inverter-based switched-capacitor circuit topology and the well-known multi-level inverter topology. The proposed inverter has shown a tremendous reduction in the total harmonics distortion and circuit component count in comparison with the recent Switched-Capacitor Boost multi-level inverter and the classical Cascaded H-Bridge multi-level inverter. Mathematical analysis shows the design of the proposed inverter and PSPICE simulation result to verify the design is also presented. The practical experiment implementation of the proposed system is presented and proves the correct operation of the proposed inverter topology by showing consistency between simulation results and practical results.
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Yadhati, Vennela. "A comparative study of capacitor voltage balancing techniques for flying capacitor multi-level power electronic converters". Diss., Rolla, Mo. : Missouri University of Science and Technology, 2010. http://scholarsmine.mst.edu/thesis/pdf/Yadhati_09007dcc807d2cc9.pdf.
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Thesis (M.S.)--Missouri University of Science and Technology, 2010.Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed July 26, 2010) Includes bibliographical references (p. 96-102).
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Cuadros, Carlos Eduardo. "On the Circuit Oriented Average Large Signal Modeling of Power Converters and its Applications". Diss., Virginia Tech, 2003. http://hdl.handle.net/10919/11077.
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A systematic and versatile method to derive accurate and efficient Circuit Oriented Large Signal Average Models (COLSAMs) that approximate the slow dynamics manifold of the moving average values of the relevant state variables for Pulse-Width Modulated (PWM) dc to dc and three-phase to dc power converters is developed. These COLSAMs can cover continuous conduction mode (CCM) as well as discontinuous conduction mode (DCM) of operation and they are over one order of magnitude cheaper, computation wise, than the switching models. This method leads primarily to simple and effective input-output oriented models that represent transfer as well as loading characteristics of the converter. Sine these models consist of time invariant continuous functions they can be linearized at an operating point in order to obtain small-signal transfer functions that approximate the dynamics of the original PWM system around an orbit.
The models are primarily intended for software circuit simulators (i.e. Spice derived types, Saber, Simplorer, etc), to take advantage of intrinsic features such as transient response, linearization, transfer function, harmonic distortion calculations, without having to change simulation environment. Nevertheless, any mathematics simulator for ordinary differential equations can be used with the set of equations obtained through application of Kirchoff's laws to the COLSAMs. Furthermore, the COLSAMs provide physical insight to help with power stage and control design, and they allow easy interconnection among themselves, as well as with switching models, for complete analysis at different scales (time, signal level, complexity; interconnectivity).
A new average model for the Zero-Voltage Switched Full-Bridge (ZVS-FB) PWM Converter is developed with the above method and its high accuracy is verified with simulations from a switching behavioral model for several circuit component values for both CCM and DCM.
Intrinsic positive damping effects and special delay characteristics created by an energy holding element in a saturable reactor-based Zero-Voltage Zero-Current Switched Full-Bridge (ZVZCS-FB) PWM converter are explained for the first time by a new average model. Its large signal predictions match very well those from switch model simulations whereas its small-signal predictions are verified with experimental results from 3.5 kW prototype modules. The latter are used in a multi-module converter to supply the DC power bus in and aircraft. The design of control loops for the converter is based on the new model and its linearization.
The ZVZCS-FB PWM converter's average model above is extended to deal with interconnection issues and constraints in a Quasi-Single Stage (QSS) Zero-Voltage Zero-Current Switched (ZVZCS) Three-Phase Buck Rectifier. The new model reveals strong nonlinear transfer characteristics for standard Space Vector Modulation (SVM), which lead to high input current distortion and output voltage ripple inadmissible in telecommunications applications. Physical insight provided by this average model led to the development of a combined modified SVM and feed-forward duty-cycle compensation scheme to reliably minimize the output voltage ripple. Experimental results from a 6 kW prototype validate large signal model for standard and modified SVM, with and without duty-cycle compensation scheme.Ph. D.
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Діденко, Юрій Олександрович. "Підвищення надійності роботи теплоелектроцентралі за наявності вітроелектростанції". Master's thesis, КПІ ім. Ігоря Сікорського, 2020. https://ela.kpi.ua/handle/123456789/40106.
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Магістерська дисертація складається з пояснювальної записки та графічної
частини. Пояснювальна записка виконана на 113 сторінках формату А4. Графічна
частина містить 6 аркушів технічних креслень форматом А1.
В магістерський дисертації розглядається питання підвищення надійності
роботи теплоелектроцентралі за наявності вітроелектростанції. Було розраховано
технічний стан повітряної лінії. Для оцінки діапазонів термів доцільно було
використано індикатори Харрінгтона для функцій принадлежності. Ймовірність
відмови повітряної лінії за час експлуатації. Розрахунок режиму при відмові
обладнання.
Публікації.
Костерєв М.В., д.т.н., проф., Алексейчук В.О., Діденко Ю.О., Кудряшов Р.Р.
Визначення ризику виникнення анормального режиму в ЕЕС при
відмовах електрообладнанняThe master's dissertation consists of an explanatory note and a graphic one parts. The explanatory note is made on 113 A4 pages. Graphically the part contains 6 sheets of technical drawings in A1 format. In the master's dissertation the question of increase of reliability is considered operation of a thermal power plant in the presence of a wind power plant. It was calculated technical condition of the overhead line. It was expedient to estimate the ranges of terms Harrington indicators were used for membership functions. Probability overhead line failures during operation. Calculation of the mode in case of failure equipment. Publications. Kosterev MV, Doctor of Technical Sciences, Professor, Alekseychuk VO, Didenko YO, Kudryashov RR Determination of the risk of abnormal regime in the EEC at electrical equipment failures
Магистерская диссертация состоит из пояснительной записки и графической части. Пояснительная записка выполнена на 113 страницах формата А4. графическая часть содержит 6 листов технических чертежей форматом А1. В магистерский диссертации рассматривается вопрос повышения надежности работы теплоэлектроцентрали при наличии ветроэлектростанции. было рассчитано техническое состояние воздушной линии. Для оценки диапазонов термов целесообразно было использовано индикаторы Харрингтона для функций принадлежности. вероятность отказа воздушной линии за время эксплуатации. Расчет режима при отказе оборудования. Публикации. Костерев М.В., д.т.н., проф., Алексейчук В.А., Диденко Ю.А., Кудряшов Р.Р. Определение риска возникновения анормального режима в ЭЭС при отказах электрооборудования
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SILVA, WANDERLEI M. da. "Proposta de novas topologias de conversores 'C-DUMP' para o acionamento de motores e geradores de relutancia chaveados". reponame:Repositório Institucional do IPEN, 2004. http://repositorio.ipen.br:8080/xmlui/handle/123456789/11336.
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Made available in DSpace on 2014-10-09T12:50:50Z (GMT). No. of bitstreams: 0Made available in DSpace on 2014-10-09T13:58:11Z (GMT). No. of bitstreams: 1 09637.pdf: 1538155 bytes, checksum: e1acd1099b9c28649529a552fe6ae1c8 (MD5)
Tese (Doutoramento)
IPEN/T
Escola Politecnica, Universidade de Sao Paulo - POLI/USP
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Сірик, О. М. "Підвищення ефективності функціонування ПС 35/10 кВ "Киселівка" АТ "Чернігівобленерго"". Thesis, Чернігів, 2021. http://ir.stu.cn.ua/123456789/25267.
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Сірик, О. М. Підвищення ефективності функціонування ПС 35/10 кВ "Киселівка" АТ "Чернігівобленерго" : випускна кваліфікаційна робота : 141 "Електроенеретика, електротехніка та електромеханіка" / О. М. Сірик ; керівник роботи Р. О. Буйний ; НУ "Чернігівська політехніка", кафедра електричної інженерії та інформаційно-вимірювальних технологій. – Чернігів, 2021. – 126 с.Об’єкт дослідження даного проекту – підстанція напругою 35/10 кВ «Киселівка». Предмет дослідження – ефективність роботи обладнання ПС 35/10 кВ «Киселівка» при умові перспективного збільшення електричного навантаження. Мета роботи – покращення основних техніко-економічних показників роботи ПС 35/10 кВ «Киселівка». Виконано заміну існуючого морально та фізично застарілого силового обладнання ПС 35/10 кВ «Киселівка».
The object of research of this project is a 35/10 kV substation «Kiselivka». The subject of the research is the efficiency of the equipment of the 35/10 kV substation «Kiselivka» under the condition of perspective increase of electric load. The purpose of the work is to improve the main technical and economic performance of the 35/10 kV «Kiselivka» substation. The replacement of the existing morally and physically obsolete power equipment of the 35/10 kV substation «Kiselivka» was performed.
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Онопрієнко, О. С. "Реновація обладнання підстанції 35/10 кВ «Іваниця»". Thesis, Чернігів, 2021. http://ir.stu.cn.ua/123456789/25279.
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Онопрієнко, О. С. Реновація обладнання підстанції 35/10 кВ «Іваниця» : випускна кваліфікаційна робота : 141 "Електроенеретика, електротехніка та електромеханіка" / О. С. Онопрієнко ; керівник роботи В. М. Безручко ; НУ "Чернігівська політехніка", кафедра електричної інженерії та інформаційно-вимірювальних технологій. – Чернігів, 2021. – 128 с.Об’єкт дослідження даного проєкту – підстанція напругою 35/10 кВ «Іваниця». Предмет дослідження – ефективність роботи ПС 35/10 кВ «Іваниця» при умові інтенсивного збільшення електричного навантаження. Мета роботи – покращення основних техніко-економічних показників роботи ПС 35/10 кВ «Іваниця». Виконано заміну існуючого морально та фізично застарілого основного силового обладнання ПС напругою 35/10 кВ.
The object of research of this project is a substation with a voltage of 35/10 kV «Ivanytsia». The subject of research is the efficiency of 35/10 kV substation «Ivanytsia» under the condition of intensive increase of electric load. The purpose of the work is to improve the main technical and economic performance of the 35/10 kV substation «Ivanytsia». The replacement of the existing morally and physically obsolete main power equipment of the 35/10 kV substation was performed.
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Dou, Zhifeng. "Sûreté de fonctionnement des convertisseurs - Nouvelles structures de redondances pour onduleurs sécurisés à tolérance de pannes". Thesis, Toulouse, INPT, 2011. http://www.theses.fr/2011INPT0096/document.
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Au sein d'un convertisseur la défaillance d'un composant de puissance est un événement critique tant par le risque d'explosion du boitier et sa propagation au sein du système (forte énergie stockée dans l'alimentation) que par l'interruption de service qui en découle (systèmes embarqués, systèmes de production en flux tendu). Ce mémoire de thèse propose un ensemble de solutions nouvelles portant sur la problématique de l'isolement ultime de défauts "derniers secours" d'une part, et sur la connexion "automatique" et à faible "coût" d'un circuit en secours. L'objectif de cette approche globale est de concilier "sécurité électrique absolue" et "continuité de service" pour les systèmes de conversion sensibles devant être intégrés au coeur des applications critiques. Le premier chapitre et son annexe permettent de rappeler les causes et les conséquences des défauts internes au sein d'une structure de base d'onduleur à deux niveaux de tension, laquelle fait l'objet de nombreuses simulations de modes dégradés en configuration variateur de vitesse sur machine synchrone. De cette analyse il ressort qu'une structure d'isolement symétrique à deux voies couplées, placées sur les pôles du bus DC, à déclenchement spontané (fusible) et/ou commande (rupteur), est à même de sécuriser toutes les mailles du circuit, de façon modulaire et non intrusiveIn all these traditional industries, or in more sensitive sectors and high technology, it appears that the safe operation of power systems becomes a critical and strategic area essential. In the area of application that focuses, design dependability and now rests primarily on an approach to reliability of components used, the use of close protection, monitoring alarms and management stop / reset / recovery. In our view, this approach is incomplete quickly when electrical safety and absolute continuity of a permanent mission should be carried out simultaneously in the presence of an internal failure of sensitive functions for low and medium power (eg, orders and bodies actuation of vehicles) or highly critical (nuclear). In this area, topologies and failure modes are at the heart of the problem. In this paper, we will focus primarily on the inverters and choppers structures at two levels of voltage (single-cell arm, <1kV), with simple configuration and multiphase parallel, although the concepts are presented, as examples, partially extrapolated to the structures of three voltage levels (arms multicellular) and rectifier (low-frequency phase control and high-frequency switching PWM). We will highlight the need to limit the intensity of these failures and to electrically isolate the defective cell and symmetrically of this inverter by multipole devices, passive or spontaneous breaking mixed cut ordered in the form of fuses integrated and distributed of multi-channel passive isolators, to imagine and develop. We will show that this process of isolation of the last backup is needed to connect, form series or parallel to the defective cell, a cell rescue in passive redundancy. The cell structure backup connection pooled by spontaneous (automatic) is especially promising as detailed in our eyes because of its simplicity and its integrability. Next, we present the isolation technologies fuse (not included, miniatures, CMS and multilayer chip fuse), their characteristics, their current limitations and operating in a switching cell test. A methodology and design of symmetrical two-way fuse (dual-fuse) on FR4 PCB - Copper will be presented in Comsol ™ and evaluated initially in static thermal IR. A passive two-way switch, relatively original material for integrating energy embedded in FR4 substrate, will be presented and fully dimensioned plans on electrical, thermal and mechanical also using finite element simulations in Comsol ™. Another aspect of exploratory analysis, mainly experimental, or to characterize the failure modes of bullets and casings ultimate power compared between the technologies of encapsulation by epoxy resin (standard discrete case) and a silicone gel (module) is provided under conditions of stress controlled and reproducible. This step is necessary to characterize the resistive mode of a chip based on faulty stresses and stability over time of the residual strength according to the nature of the encapsulant, ie the very sustainability of this failure mode. A mixed-encapsulant resin - gel will be presented and characterized, providing an excellent compromise for medium power applications. Positive results and little known today, will allow us to exploit in the next chapter, this property of stable ohmic mode of the chip failed in a structure to aid automated connection series interesting. In the end, we will detail the demonstrator prototype and introduced to the context with which we will validate the isolation structures and prototypes fuses the property of stable ohmic mode highlighted in the aspect of technological analysis of selected devices. These results allow us to refine the solutions adopted for specifications and guide future management strategy of defects whether internal or external to the topology. Supervisor digital device - sensor for the detection and reconfiguration of internal control orders will be assessed
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Arntzen, Chris. "THE BICYCLE-POWERED SMARTPHONE CHARGER". DigitalCommons@CalPoly, 2013. https://digitalcommons.calpoly.edu/theses/1008.
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This thesis entails the design and fabrication of a smartphone charger that is powered by a bicycle dynamo hub. In addition to the design and validation of the charger prototype, this thesis involves the testing and characterization of the dynamo hub power source, the design and construction of specialized test equipment, and the design and prototyping of a handlebar-mounted case for the smartphone and charging electronics. With the intention of making the device a commercial product, price, aesthetics, and marketability are of importance to the design. An appropriate description of the charger circuit is a microcontroller-based energy management system, tailored to meet strict power demands of current smartphones. The system incorporates a switched-mode power supply, lithium polymer battery, microcontroller, and specialized protection circuitry. Prototype testing confirms that the circuit meets the charging requirements of the smartphone at bicycle speeds ranging from 7 miles per hour to as high as 55 miles per hour.
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Mogniotte, Jean-François. "Conception d'un circuit intégré en SiC appliqué aux convertisseur de moyenne puissance". Thesis, Lyon, INSA, 2014. http://www.theses.fr/2014ISAL0004/document.
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L’émergence d’interrupteurs de puissance en SiC permet d’envisager des convertisseurs de puissance capables de fonctionner au sein des environnements sévères tels que la haute tension (> 10 kV ) et la haute température (> 300 °C). Aucune solution de commande spécifique à ces environnements n’existe pour le moment. Le développement de fonctions élémentaires en SiC (comparateur, oscillateur) est une étape préliminaire à la réalisation d’un premier démonstrateur. Plusieurs laboratoires ont développé des fonctions basées sur des transistors bipolaires, MOSFETs ou JFETs. Cependant les recherches ont principalement portées sur la conception de fonctions logiques et non sur l’intégration de drivers de puissance. Le laboratoire AMPERE (INSA de Lyon) et le Centre National de Microélectronique de Barcelone (Espagne) ont conçu un MESFET latéral double grille en SiC. Ce composant élémentaire sera à la base des différentes fonctions intégrées envisagées. L’objectif de ces recherches est la réalisation d’un convertisseur élévateur de tension "boost" monolithique et de sa commande en SiC. La démarche scientifique a consisté à définir dans un premier temps un modèle de simulation SPICE du MESFET SiC à partir de caractérisations électriques statique et dynamique. En se basant sur ce modèle, des circuits analogiques tels que des amplificateurs, oscillateurs, paires différentielles, trigger de Schmitt ont été conçus pour élaborer le circuit de commande (driver). La conception de ces fonctions s’avère complexe puisqu’il n’existe pas de MESFETs de type P et une polarisation négative de -15 V est nécessaire au blocage des MESFETs SiC. Une structure constituée d’un pont redresseur, d’un boost régulé avec sa commande basée sur ces différentes fonctions a été réalisée et simulée sous SPICE. L’ensemble de cette structure a été fabriqué au CNM de Barcelone sur un même substrat SiC semi-isolant. L’intégration des éléments passifs n’a pas été envisagée de façon monolithique (mais pourrait être considérée pour les inductances et capacités dans la mesure où les valeurs des composants intégrés sont compatibles avec les processus de réalisation). Le convertisseur a été dimensionné pour délivrer une de puissance de 2.2 W pour une surface de 0.27 cm2, soit 8.14 W/cm2. Les caractérisations électriques des différents composants latéraux (résistances, diodes, transistors) valident la conception, le dimensionnement et le procédé de fabrication de ces structures élémentaires, mais aussi de la majorité des fonctions analogiques. Les résultats obtenus permettent d’envisager la réalisation d’un driver monolithique de composants Grand Gap. La perspective des travaux porte désormais sur la réalisation complète du démonstrateur et sur l’étude de son comportement en environnement sévère notamment en haute température (> 300 °C). Des analyses des mécanismes de dégradation et de fiabilité des convertisseurs intégrés devront alors être envisagéesThe new SiC power switches is able to consider power converters, which could operate in harsh environments as in High Voltage (> 10kV) and High Temperature (> 300 °C). Currently, they are no specific solutions for controlling these devices in harsh environments. The development of elementary functions in SiC is a preliminary step toward the realization of a first demonstrator for these fields of applications. AMPERE laboratory (France) and the National Center of Microelectronic of Barcelona (Spain) have elaborated an elementary electrical compound, which is a lateral dual gate MESFET in Silicon Carbide (SiC). The purpose of this research is to conceive a monolithic power converter and its driver in SiC. The scientific approach has consisted of defining in a first time a SPICE model of the elementary MESFET from electric characterizations (fitting). Analog functions as : comparator, ring oscillator, Schmitt’s trigger . . . have been designed thanks to this SPICE’s model. A device based on a bridge rectifier, a regulated "boost" and its driver has been established and simulated with the SPICE Simulator. The converter has been sized for supplying 2.2 W for an area of 0.27 cm2. This device has been fabricated at CNM of Barcelona on semi-insulating SiC substrate. The electrical characterizations of the lateral compounds (resistors, diodes, MESFETs) checked the design, the "sizing" and the manufacturing process of these elementary devices and analog functions. The experimental results is able to considerer a monolithic driver in Wide Band Gap. The prospects of this research is now to realize a fully integrated power converter in SiC and study its behavior in harsh environments (especially in high temperature > 300 °C). Analysis of degradation mechanisms and reliability of the power converters would be so considerer in the future
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Ducarouge, Benoît. "Conception et caractérisation de micro-commutateurs électromécaniques hyperfréquences de puissance : application à un circuit de commutation d'émission/réception large bande". Toulouse 3, 2005. http://www.theses.fr/2005TOU30172.
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L'introduction des technologies MEMS ("Micro Electro Mechanical Systems") dans les modules hyperfréquences répond au besoin croissant en systèmes de communications intégrables, reconfigurables et présentant d'excellentes performances électriques jusqu'aux fréquences millimétriques. Le développement de nouvelles architectures intelligentes jusque là inaccessibles aux technologies traditionnelles est également envisageable grâce à ces composants. Cela dit, la conception multi-physique de ces circuits alliant des aspects électrostatiques, mécaniques et électromagnétiques reste difficile à mettre en œuvre et complique leur optimisation. De plus, peu de recherches se sont focalisées sur la tenue en puissance de ces composants, pourtant primordiale pour envisager leur intégration dans des chaînes d'émission radio fréquences. Nos travaux de thèse ont porté sur la conception et la caractérisation de micro-interrupteurs MEMS de puissance et de circuits hyperfréquences les intégrant et opérant en bande X (10GHz). Le premier chapitre présente une méthodologie multi-physique de conception de commutateurs MEMS RF électrostatiques à contact capacitif réalisés au Laboratoire d'Analyse et d'Architecture des Systèmes. Cette méthodologie, associée à une topologie optimale de micro-commutateurs, a permis un prototypage efficace de commutateurs MEMS et a été validée expérimentalement grâce à des structures montrant d'excellentes performances hyperfréquences. Le second chapitre s'intéresse à l'optimisation en puissance de commutateurs MEMS RF. Nous avons développé une méthodologie de prédiction de la puissance maximale de fonctionnement pour ces composants. Cette méthodologie a été ensuite utilisée pour l'optimisation en puissance du commutateur développé dans le chapitre 1. Un dimensionnement ainsi que l'ensemble des résultats de simulations sont présentés et validés expérimentalement. Enfin le dernier chapitre présente la mise en application des méthodologies décrites aux deux premiers chapitres pour la conception d'un circuit de commutation de puissance large bande 6-18 GHz basé sur des topologies série et parallèle d'interrupteurs MEMS. Les structures ont ainsi été optimisées, fabriquées et mesurées. Elles présentent d'excellentes performances RF sur une large gamme de fréquenceMEMS ("Micro Electro Mechanical Systems") technologies have been successfully introduced in the past decade in order to develop smart micro-systems exhibiting high integration level, new functionalities such as reconfigurability (to switch over different standards) or self repairing ability, and high electrical performances up to millimeterwave frequencies. Moreover, new system architectures can be implemented thanks to these devices, which demonstrate the potentialities of MEMS technologies in future wireless systems. In the meantime, their multi-physic design dealing with electrostatic, mechanical and electromagnetical concerns, translates into a long and complex optimization of the MEMS-based circuits slowing their industrial use. Moreover, few studies are available on the power handling capabilities of these components, which is the key parameter to improve their integration into front-end networks. Our work, made in LAAS-CNRS, concentrates on the design and characterisation of power RF-MEMS switches and their integration into a broadband single pole double throw circuit, for front-end duplexer operating in X band. The first chapter will be dedicated to a multi-physic design methodology for capacitive electrostaticaly actuated RF-MEMS switches design. This methodology, associated with an optimized topology, enables an efficient development of MEMS components and circuits. Demonstrators have been measured and demonstrate outstanding RF performances which validate the proposed methodology. The second part of this work points out the power optimization of RF MEMS switches. A power handling prediction methodology has been proposed and used to optimize the switch described in the first chapter. Simulations have been confirmed by measurements which validate our prediction method. The measured RF MEMS power handling demonstrates the ability of this technology to be used in front-end circuits and systems. Finally, the third chapter deals with an application using the methodologies described above: a broadband (6-18 GHz) power switching circuit for front-end duplexer. This circuit has been optimized, realized and characterized and exhibits state of the art microwave and power performances over a broad frequency band
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Палій, Віктор Олексійович, i Viktor Palii. "Розробка заходів із підвищення надійності електропостачання газоперекачувальної станції". Master's thesis, Тернопільський національний технічний університет імені Івана Пулюя, 2019. http://elartu.tntu.edu.ua/handle/lib/29692.
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The primary purpose of work are development and introduction of measures from the increase of reliability of power supply of the gas-pumping station. In basic part of explanatory message planning of the compressor station was executed for the pumping-over of natural gas. Conducted next calculations: optimization of amount, power and placing of transformer substations and compensative devices; choice and optimization of number of standard cuts of cables; calculation of currents of short circuit; losses of tension; technical and economic calculation; calculation of relay defence of transformers of transformer substation; choice and verification of basic equipment. The automated adjusting of electromechanic of compressor is considered in the special part. In organizationally-economic part there was the executed calculation of indexes of efficiency of investments, technical and economic comparison of variants, calculation of electroenergy component industrial unit cost.Основною метою роботи є розробка та впровадження заходів із підвищення надійності електропостачання газоперекачувальної станції. У основній частині пояснювальної записки було виконано проектування компресорної станції для перекачування природного газу. Проведені наступні розрахунки: оптимізація кількості, потужності і розміщення трансформаторних підстанцій і компенсуючих пристроїв; вибір і оптимізація числа стандартних перерізів кабелів; розрахунок струмів КЗ; втрат напруги; техніко-економічний розрахунок; розрахунок релейного захисту трансформаторів КТП; вибір і перевірка основного обладнання. У спеціальній частині розглянуто автоматизоване регулювання електроприводу компресора. У організаційно-економічній частині був виконаний розрахунок показників ефективності інвестицій, техніко-економічне порівняння варіантів, розрахунок електроенергетичної складової собівартості промислової продукції.
ВСТУП 7 1 АНАЛІТИЧНА ЧАСТИНА 10 1.1 Компресорні установки 10 1.2 Конструкція, робота та експлуатаційні характеристики компресорних установок 11 1.3 Опис режиму роботи компресорної установки 12 1.4 Вимоги до електроприводу й автоматики 12 1.5 Вибір роду струму й величини живильної мережі 14 1.6 Вибір системи електроприводу, методів регулювання швидкості й гальмування 14 1.7 Очищення газу від механічних домішок і вологи 15 1.8 Циклонний пиловловлювач 16 1.9 Експлуатація пиловловлювачів 17 1.10 Аналіз недоліків існуючої схеми керування 18 2 НАУКОВО-ДОСЛІДНА ЧАСТИНА 19 2.1 Загальна характеристика мікропроцесорного блоку захисту "Сіріус-Л" 19 2.1.1 Призначення мікропроцесорного блоку захисту 19 2.1.2 Технічні дані мікропроцесорного блоку захисту 22 2.1.3 Склад мікропроцесорного блоку захисту 25 2.1.4 Будова і робота мікропроцесорного блоку захисту 26 2.1.5 Структурна схема пристрою 29 2.1.6 Конструкція блоку захисту "Сіріус-Л" 30 2. 1.7 Будова і робота складових частин мікропроцесорного блоку захисту 30 3 ТЕХНОЛОГІЧНА ЧАСТИНА 34 3.1 Вибір напруги, потужності і типу трансформаторів 34 3.1.1 Вибір числа і потужності силових трансформаторів 34 3.1.2 Техніко-економічне порівняння варіантів КТП 37 3.1.3 Розрахунок втрат в трансформаторах 39 3.2 Визначення розрахункових навантажень цехів 40 3.2.1 Розрахунок силових навантажень 0,4 кВ 40 3.2.2 Розрахунок силових навантажень цеху №2 42 3.2.3 Визначення сумарного навантаження цехів 43 4 ПРОЕКТНО-КОНСТРУКТОРСЬКА ЧАСТИНА 45 4.1 Вибір схеми електропостачання 45 4.1.1 Вибір кабелів 10 кВ 45 4.1.2 Приклад розрахунку кабельної лінії 47 4.2 Проектування системи електроосвітлення станції 48 4.2.1 Види освітлення 48 4.2.2 Робоче освітлення 48 4.2.3 Світлотехнічний розрахунок робочого освітлення 49 4.2.4 Розрахунок освітлювальних навантажень цеху №2 51 4.2.5 Аварійне освітлення 53 4.2.6 Охоронне освітлення 53 4.2.7 Визначення результуючого розрахункового навантаження на шинах ТП 54 4.3 Проектування мережі електропостачання компресорного цеху №2 55 4.3.1 Вибір силових розподільних пунктів 55 4.3.2 Вибір кабелів 0,4 кВ 56 4.3.3 Розрахунок кабельної лінії 57 4.3.4 Розрахунок заземлюючого контуру 57 4.4 Розрахунок струмів к.з. в мережі 0,4 кВ 60 4.4.1 Розрахунок параметрів схеми заміщення 60 4.4.2 Розрахунок струмів трифазного к.з. 64 4.4.3 Розрахунок струмів однофазного к.з. 66 4.5 Вибір і перевірка комутаційних апаратів 0,4 кВ 68 4.6 Релейний захист і автоматика 74 4.6.1 Захист цехових трансформаторів 77 4.6.2 Розрахунок захисту секційного вимикача 77 5 СПЕЦІАЛЬНА ЧАСТИНА 80 5.1 Опис компресора 80 5.2 Пуск в хід асинхронного двигуна 81 5.3 Вибір потужності двигуна для відцентрового компресора 82 5.4 Електромеханічна характеристика 84 5.5 Вибір тиристорного перетворювача частоти 86 6 ОБГРУНТУВАННЯ ЕКОНОМІЧНОЇ ЕФЕКТИВНОСТІ 88 6.1 Економічне обгрунтування вибору схеми електропостачання 88 6.2 Розрахунок показників економічної ефективності і обгрунтування економічно ефективного варіанту електропостачання 96 6.3 Розрахунок електроенергетичної складової собівартості промислової продукції 99 7 ОХОРОНА ПРАЦІ ТА БЕЗПЕКА В НАДЗВИЧАЙНИХ СИТУАЦІЯХ 103 7.1 Особливості проектування енергопостачання на компресорній станції 103 7.2 Особливості проектування пожежної безпеки на компресорній станції 105 7.3 Вимоги норм проектування інженерно-технічних заходів ЦО (ІТЗ ЦО) до будівництва об’єктів та комунально-енергетичних систем. 108 8 ЕКОЛОГІЯ 110 8.1 Актуальність охорони навколишнього середовища 110 8.2 Вплив газопроводів на навколишнє середовище 111 ЗАГАЛЬНІ ВИСНОВКИ ДО ДИПЛОМНОЇ РОБОТИ 113 ПЕРЕЛІК ПОСИЛАНЬ 114
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Petrič, Peter. "Návrh uzemňovače 80 kA/3 s pro odpojovač generátoru". Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2018. http://www.nusl.cz/ntk/nusl-376995.
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This master thesis is focused on the design of earthing switch for the indoor three pole generator disconnector from IVEP, a.s. The main task of the theoretical part of the master thesis was mechanical and electrical calculations on the contact system and the design of two variants of earthing switch construction. It has been proposed two variants of earthing switch construction. The first variant included three earthing knives for each pole of earthing switch and the other variant included two earthing knives for each pole. The aim of the practical part of this diploma thesis was to create a model of the earthing switch for generator disconnector, to simulate the heating of the contact system by passing the short-circuit current and to prepare the production documentation. For modeling, calculations and simulations were used Autodesk Inventor 2018, Matlab and Ansys Workbench.
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Al-Baidhani, Humam A. "Design and Implementation of Simplified Sliding-Mode Control of PWM DC-DC Converters for CCM". Wright State University / OhioLINK, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=wright1590930594283361.
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Ptáček, Karel. "Vysokonapěťové struktury pro galvanickou iziolaci v integrovaných obvodech". Doctoral thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2020. http://www.nusl.cz/ntk/nusl-417477.
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Tato dizertační práce představuje novou techniku laterární rezonanční vazby, která je využita v návrhu galvanicky izolovaného posouvače úrovně, který je následně implementován v 800 V půlmůstkovém kontroléru pro průmyslové aplikace. Ve srovnání s tradičními galvanickými izolátory jsou výrobní náklady tohoto řešení nižší. Pro aplikace vyžadující vyšší úroveň galvanické izolace je popsán následný vývoj galvanicky izolovaného posouvače úrovně, který využívá pouze jeden galvanicky oddělený posouvač úrovní pro komunikaci v obou směrech, což výrazně snižuje plochu struktury izolátoru. Jako součást následného návrhu je představen galvanický izolátor který je schopen přenášet analogovou hodnotu napětí. Analogový izolátor byl testován v reálné aplikaci síťového spínaného zdroje jako náhrada standardního optočlenu. Tato konstrukce umožňuje integraci primárních a sekundárních obvodů v jednom pouzdře, což umožní snížit složitost a cenu spínaného zdroje.
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Rashid, S. M. Shahriar. "Design and Heterogeneous Integration of Single and Dual Band Pulse Modulated Class E RF Power Amplifiers". The Ohio State University, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=osu1543505207173487.
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Niu, Shiqin. "Conception, optimisation et caractérisation d’un transistor à effet de champ haute tension en Carbure de Silicium". Thesis, Lyon, 2016. http://www.theses.fr/2016LYSEI136/document.
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La thèse intitulée "Conception, caractérisation et optimisation d’un transistor à effet de champ haute tension en Carbure de Silicium (SiC) et de leur diode associée", s’est déroulée au sein du laboratoire AMPERE sous la direction du Prof. D. PLANSON. Des premiers démonstrateurs de JFET ont été réalisés. Le blocage du JFET n'est pas efficace, ceci étant lié aux difficultés de réalisation technologique. Le premier travail a consisté en leur caractérisation précise puis en leur simulation, en tenant compte des erreurs de processus de fabrication. Ensuite, un nouveau masque a été dessiné en tenant en compte des problèmes technologiques identifiés. Les performances électriques de la nouvelle génération du composant ont ainsi démontré une amélioration importante au niveau de la tenue en tension. Dans le même temps, de nouveaux problèmes se sont révélés, qu’il sera nécessaire de résoudre dans le cadre de travaux futurs. Par ailleurs, les aspects de tenue en court-circuit des JFETs en SiC commercialement disponibles ont été étudiés finement. Les simulations électrothermiques par TCAD ont révélé les modes de défaillances. Ceci a permis d'établir finalement des modèles physiques valables pour les JFETs en SiCSilicon carbide (SiC) has higher critical electric field for breakdown and lower intrinsic carrier concentration than silicon, which are very attractive for high power and high temperature power electric applications. In this thesis, a new 3.3kV/20A SiC-4H JFET is designed and fabricated for motor drive (330kW). This breakdown voltage is beyond the state of art of the commercial unipolar SiC devices. The first characterization shows that the breakdown voltage is lower (2.5kV) than its theoretical value. Also the on-state resistance is more important than expected. By means of finite element simulation the origins of the failure are identified and then verified by optical analysis. Hence, a new layout is designed followed by a new generation of SiC-4H JFET is fabricated. Test results show the 3.3kV JFET is developed successfully. Meanwhile, the electro-thermal mechanism in the SiC JFETs under short circuit is studied by means of TCAD simulation. The commercial 1200V SIT (USCi) and LV-JFET (Infineon) are used as sample. A hotspot inside the structures is observed. And the impact the bulk thickness and the canal doping on the short circuit capability of the devices are shown. The physical models validated by this study will be used on our 3.3kV once it is packaged
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Molin, Quentin. "Contribution à l’étude de la robustesse des MOSFET-SiC haute tension : Dérive de la tension de seuil et tenue aux courts-circuits". Thesis, Lyon, 2018. http://www.theses.fr/2018LYSEI111.
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Ce manuscrit est une contribution à l’étude de la fiabilité et de la robustesse des composants MOSFET sur carbure de silicium, matériau semi-conducteur grand gap qui possède des caractéristiques bien meilleures que le silicium. Ces nouveaux interrupteurs de puissances permettent d’obtenir entre autres propriétés remarquables, des fréquences de commutations et des tenues en tension plus élevées dans les systèmes de conversions de puissance. Ils sont particulièrement mis en avant depuis un peu plus d’une dizaine d’années pour les gains en performances, diminution des tailles et poids qu’ils apportent à certaines topologies de convertisseurs pour les réseaux haute tension à courant continu. Puis sont répertoriés les principaux mécanismes de défaillances de ces MOSFET SiC induits par la faiblesse de la grille. Toutes les mesures nécessaires au suivi des paramètres clés lors des prochains vieillissements sont présentées. Les résultats de nos tests sur l’instabilité de la tension de seuil sont aussi détaillés et un modèle empirique pour valider le comportement de relaxation observé est proposé. Celui-ci nous aidera par la suite à établir un protocole de mesure rigoureux de la tension de seuil. Les tests expérimentaux et résultats de vieillissement en statique et dynamique sur les composants 1,7 kV vont permettre de se rendre compte de l’importance de la dérive de la tension de seuil sur 1000 h. Dans le cas d’un vieillissement statique, il y a environ 7 % de dérive positive du VTH et un pourcentage équivalent pour les tests dynamiques. Des analyses supplémentaires (C-V et pompage de charge) sur l’oxyde de grille en cours de vieillissement sont proposées pour une meilleure compréhension des mécanismes mis en jeu dans la dégradation de l’oxyde. Enfin, les derniers tests présentés seront focalisés sur le comportement en court-circuit et courts-circuits répétitifs des mêmes composants. Avec une énergie critique évaluée autour de 1,5 J nos tests sur les MOSFET 1,7 kV montrent les limites de la robustesse de ces composants, avec une tenue en court-circuit bien inférieure à 10 µs et une incapacité à résister à plus de 150 courts-circuits successifs. L’influence de la tension entre drain et source y est notamment étudiée, et montre que l’énergie critique supportée par le composant diminue avec l’augmentation de cette tensionThis manuscript is a contribution to reliability and robustness study of MOSFET components on silicon carbide “SiC”, wide band gap semiconductor with better characteristics compared to silicon “Si” material. Those new power switches can provide better switching frequencies or voltage withstanding for example in power converter. SiC MOSFET are the results of approximately 10 years of research and development and can provide increased performances and weight to some converter topology for high voltage direct current networks. Others power switches available are still introduced and an introduction to reliability is explaining why such work on this new power switches is important. Transition from Si technologies to SiC ones require a lot of work regarding its robustness. Before showing reliability and robustness results is presented I give a lot of details regarding to the measurement and monitoring of key parameters used in the next chapters. The results of our tests on the threshold voltage instability are presented and how we validated an empirical model on this drift. This was used to propose an enhanced measurement protocol on the threshold voltage. Static and dynamic experimental results presented next will show if the voltage drift during ageing is significant or not. Further analysis is proposed to add more insight on the understanding of the oxide degradation mechanisms through C-V and charge pumping measurements. Finally, the ageing results presented on 1,7 kV SiC MOSFET are focused on the short-circuit and repetitive short-circuit behavior of the same components. Drain to source voltage influence on critical energy during this particular and stressful operation mode is studied. This time, the results are worrying.The last chapter is confidential
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Li, Nan. "Digital control strategies for DC/DC SEPIC converters towards integration". Phd thesis, INSA de Lyon, 2012. http://tel.archives-ouvertes.fr/tel-00760064.
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The use of SMPS (Switched mode power supply) in embedded systems is continuously increasing. The technological requirements of these systems include simultaneously a very good voltage regulation and a strong compactness of components. SEPIC ( Single-Ended Primary Inductor Converter) is a DC/DC switching converter which possesses several advantages with regard to the other classical converters. Due to the difficulty in control of its 4th-order and non linear property, it is still not well-exploited. The objective of this work is the development of successful strategies of control for a SEPIC converter on one hand and on the other hand the effective implementation of the control algorithm developed for embedded applications (FPGA, ASIC) where the constraints of Silicon surface and the loss reduction factor are important. To do it, two non linear controls and two observers of states and load have been studied: a control and an observer based on the principle of sliding mode, a deadbeat predictive control and an Extended Kalman observer. The implementation of both control laws and the Extended Kalman observer are implemented in FPGA. An 11-bit digital PWM has been developed by combining a 4-bit Δ-Σ modulation, a 4-bit segmented DCM (Digital Clock Management) phase-shift and a 3-bit counter-comparator. All the proposed approaches are experimentally validated and constitute a good base for the integration of embedded switching mode converters