Rozprawy doktorskie na temat „Physical layer implementation”
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Bhatia, Nikhil S. "A Physical Layer Implementation of Reconfigurable Radio". Thesis, Virginia Tech, 2004. http://hdl.handle.net/10919/35926.
Pełny tekst źródłaMaster of Science
Koteng, Roger Martinsen. "Evaluation of SDR-implementation of IEEE 802.15.4 Physical Layer". Thesis, Norwegian University of Science and Technology, Department of Electronics and Telecommunications, 2006. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-10128.
Pełny tekst źródłaThe concept of software-defined radio (SDR) holds great promise. The idea behind SDR is to move software as close to the antenna as possible. This can improve flexibility, adaptability and reduce the time-to-market. This thesis covers the evaluation of algorithms for implementing IEEE 802.15.4 physical layer. In collaboration with a digital circuit designer some of these algorithms were chosen and formed a basis for a DSP architecture optimized for low-complexity, low-power radio standards. The performance of a implementation using these algorithms were then evaluated by means of analytical computations and by simulation
Jeong, Jeong-O. "Hybrid FPGA and GPP Implementation of IEEE 802.15.4 Physical Layer". Thesis, Virginia Tech, 2012. http://hdl.handle.net/10919/34425.
Pełny tekst źródłaMaster of Science
Ryland, Kevin Sherwood. "Software-Defined Radio Implementation of Two Physical Layer Security Techniques". Thesis, Virginia Tech, 2018. http://hdl.handle.net/10919/82055.
Pełny tekst źródłaMaster of Science
Kuo, Ying-Chi. "Implementation of Bluetooth Baseband Behavioral Model in C Language". Thesis, Linköping University, Department of Electrical Engineering, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-635.
Pełny tekst źródłaThis master thesis is as a final project in the Division of Computer Engineering at the Department of Electrical of Engineering, Linköping University, Sweden. The purpose of the project is to set up a baseband behavioral model for a Bluetooth system based on standards. In the model, synchronization in demodulation part has been focused on. Simulation results are analyzed later in the report to see how the method in demodulation works. Some suggestions and future works for receiver are provided to improve the performances of the model.
Zarzo, Fuertes Luis. "OFDM PHY Layer Implementation based on the 802.11 a Standard and system performance analysis". Thesis, Linköping University, Department of Electrical Engineering, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2796.
Pełny tekst źródłaWireless communication is facing one of the fastest developments of the last years in the fields of technology and computer science in the world. There are several standards that deal with it. In this work, the IEEE standard 802.11a, which deals with wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications, is going to be discussed in detail.
Taking this into consideration, PHY specifications and its environment are going to be studied.
The work that the ISY department at the Institute of Technology of the Linköping University has proposed is to design a PHY layer implementation for WLANs, in a CPU, using MATLAB/Simulink and in a DSP processor, using Embedded Target for C6000 DSP and Code Composer Studio and, once implemented both, to perform and analyse the performance of the system under those implementations.
Fält, Richard. "Feasibility study: Implementation of a gigabit Ethernet controller using an FPGA". Thesis, Linköping University, Department of Electrical Engineering, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1681.
Pełny tekst źródłaBackground: Many systems that Enea Epact AB develops for theirs customers communicates with computers. In order to meet the customers demands on cost effective solutions, Enea Epact wants to know if it is possible to implement a gigabit Ethernet controller in an FPGA. The controller shall be designed with the intent to meet the requirements of IEEE 802.3.
Aim: Find out if it is feasible to implement a gigabit Ethernet controller using an FPGA. In the meaning of feasible, certain constraints for size, speed and device must be met.
Method: Get an insight of the standard IEEE 802.3 and make a rough design of a gigabit Ethernet controller in order to identify parts in the standard that might cause problem when implemented in an FPGA. Implement the selected parts and evaluate the results.
Conclusion: It is possible to implement a gigabit Ethernet controller using an FPGA and the FPGA does not have to be a state-of-the-art device.
Ivan. "Vehicle to vehicle communication systems performance evaluation : A simulation approcach combining physical layer implementation, propagation channel model and antenna properties". Rennes, INSA, 2012. http://www.theses.fr/2012ISAR0009.
Pełny tekst źródłaV2X is a communication system between vehicles (vehicle to vehicle, or V2V) and between vehicles and the infrastructure (vehicle to infrastructure, or V2I) operating at 5. 9 GHz, with main purpose to improve road safety and to increase traffic efficiency. The computer performance evaluation of the V2X system, while employing accurate simulation models, represents an important preliminary step before its integration into vehicles and thus a possible large-scale deployment. The work presented in this document focuses on simulation techniques for realistic performance evaluation of the V2X communication system in different operating environments, with different types of receiver implementations, and with different antennas at the receiver. On-bench measurement results with V2X prototypes and with a RF channel emulator validated some of our computer simulation techniques and results
Javel, Aymeric de. "5G RAN : implémentation de la couche physique et découpage du réseau". Electronic Thesis or Diss., Institut polytechnique de Paris, 2022. http://www.theses.fr/2022IPPAT031.
Pełny tekst źródłaA critical evolution from 4G to 5G is the heterogeneity of the terminals that connect the network. Those terminals range from smartphones to connected vehicles and sensors for agriculture. Given that the constraints and requirements associated with the different kinds of terminals are heterogeneous, it is not trivial to multiplex the services associated with them on top of a single physical infrastructure. Network slicing is the technology that enables the physical infrastructure to provide multiple logical networks (called network slices) to serve the various devices and associated services: this thesis studies network slicing and its implementation at the RAN level.One main issue raised by network slicing is resource allocation. Indeed, many models exist for resource allocation of the RAN but we are missing models which take into account new constraints implied by network slicing. The first contribution of this thesis is to define a new model for network slicing at the RAN level. This model takes into account diverse slices constraints such as capacity, UEs density, latency, and reliability. Simplicial homology is used to validate slices constraints fulfillment. Furthermore, this model is applied to power optimization, which is a critical aspect of network deployment. The second challenge addressed in this work is the network's supervision and control. Indeed, some verticals have ultra-high control requirements, and the network itself might not be able to satisfy this constraint fully. Therefore, we introduce a probe that can extract data from the network to feed supervision tools for the network's monitoring and control. This probe is designed to be resilient to cyber-attacks and is thus independent of the network.The last main contribution of this thesis is the introduction of an open-source 5G physical layer called free5GRAN. The physical layer provides all the minimal procedures and algorithms for communications between the gNodeB and UEs. The project's structure is built so one can easily modify it and implement new features. Furthermore, the software architecture is designed so that the physical layer is modular and can be derived to implement the open-RAN split 7.2
Schetzina, Karen E., William T. Dalton, Deborah Pfortmiller, Hazel Robinson, Elizabeth Lowe i H. Stern. "The Winning With Wellness Pilot Project: Rural Appalachian Elementary Student Physical Activity and Eating Behaviors and Program Implementation 4 Years Later". Digital Commons @ East Tennessee State University, 2011. https://dc.etsu.edu/etsu-works/5106.
Pełny tekst źródłaDann, Stephen John David. "Progress towards a demonstration of multi-pulse laser Wakefield acceleration and implementation of a single-shot Wakefield diagnostic". Thesis, University of Oxford, 2015. https://ora.ox.ac.uk/objects/uuid:6a7fe676-a9f4-4b50-a04e-9052e08cdd1b.
Pełny tekst źródłaQiu, Xin Rong, i 邱信榮. "Physical layer implementation of FDDI LAN using CD laser with PRS". Thesis, 1994. http://ndltd.ncl.edu.tw/handle/14879309269491351928.
Pełny tekst źródłaMaduike, Dumezie K. "Design and Implementation of Physical Layer Network Coding Protocols". 2009. http://hdl.handle.net/1969.1/ETD-TAMU-2009-08-7194.
Pełny tekst źródłaKuo, Jin-Long, i 郭圳龍. "Design and Implementation of an ATM Physical Layer Transceiver". Thesis, 1994. http://ndltd.ncl.edu.tw/handle/72478816519717044610.
Pełny tekst źródła中原大學
電子工程學系
82
When conventional digital transmission systems are unable to support a wide variety of services, the Broadband Integrated Service Digital Networks (B-ISDN) are proposed to integrate various services. A new payload multiplexing technique, called asynchronous transfer mode (ATM), has been proposed as the transfer mode for implementing the B-ISDN. Many people are engageed in the research of the ATM product. The purpose of the thesis is to design a VLSI ASIC ( Application Specific Integrated Circuit ) which is used in the user network interface. The interface consists of continuous stream of cells, with no multiplex frame structure imposed at the interface. The chip performs some B-ISDN physical layer functions at the user network interface, such as cell delineation, cell rate decoupling, HEC sequence generation and cell header verification. It transmits and receives the serial signals with the speed of 155Mbps. In addition to functions described previously, the IC scrambles the ATM cells in order to reduce a long string of 0's or 1's and to improve the transmission performance. The circuit is implemented in CMOS 0.8um technology with approximately 1,200 gates counts and with a die area 3 * 2.7 mm^2. The simulation speed is about 75Mhz. The chip is packaged in DIP (Dual-in-line Package) with 48 pins. The future work is to reduce the delay of the critical path in the cell delineation module. It will improve the chip performance.
Wu, Jia-Wei, i 吳家偉. "Software Implementation of Channel Coding for WiMAX Physical Layer". Thesis, 2007. http://ndltd.ncl.edu.tw/handle/sxn882.
Pełny tekst źródła國立臺北科技大學
電子電腦與通訊產業研發碩士專班
95
The standard 802.16-2004 for WiMAX contains five physical layers, in which OFDM physical layer comprises three kinds of error correcting codes. In this paper the concatenated code for Reed-Solomon code and convolutional code is considered as a subject for discussion. This paper illustrates encoding/decoding principle for RS-CC with some examples, and introduces encoding/decoding algorithms for the transmitter and receiver in order.
Miryala, Dinesh Kumar. "Implementation of PCS of Physical Layer for PCI Express". Thesis, 2009. http://ethesis.nitrkl.ac.in/1411/1/thesis_dinesh.pdf.
Pełny tekst źródłaHuang, Lang, i 黃朗. "Design and Implementation of a USB 3.1 Gen2 Physical Layer". Thesis, 2018. http://ndltd.ncl.edu.tw/handle/5m74dk.
Pełny tekst źródła國立臺灣科技大學
電子工程系
106
Universal Serial Bus (USB) is a serial transmission standard widely used in computer systems and external devices. It has many advantages such as driverless installation, easy insertion and removal, fast speed, high compatibility, and low price. Most of computers and peripheral devices choose USB as the standard interface due to these advantages. The physical layer is the lowest layer in the USB architecture. It is built, maintained, and removed for the real connections. To ensure that raw data can be transmitted over a variety of physical media, the physical layer provides mechanical, electrical, functional, and specification features. USB 3.1 Gen2 provides twice the speed compared to the previous generation Gen1 (as known as USB 3.0), and changes the 8b/10b encoding to 128b/132b encoding, which greatly reduces the redundancy up to 84%, thereby increasing the data throughput. In the thesis, the transmitter uses a parallel scrambler to reduce power consumption by 87.9%. The designed encoder separates the reading and writing actions, and reduces a large number of flip-flops (FFs) from 264 to 20. At the receiver, the data aligner uses a shift register to store and monitor data. To solve the difference between the symbol clock and core clock, a half-full technique is applied to the elastic buffer. Moreover, the parallel descrambler makes the received data identical with the transmitted data. The completed circuit complies with the USB 3.1 Gen2 transmission specification and is implemented using Xilinx's Virtex 6 xc6vcx75t-2ff484. The transmitter consumes 322 lookup tables (LUTs) and 130 FFs. The maximum operating frequency of the core clock is 86.6 MHz and the bit clock is 714.3 MHz. The receiving end consumes 1867 LUTs and 977 FFs, the operation clock can reach 67.3 MHz, and the bit clock can reach 555.6 MHz.
Soreng, Bineeta. "Implementation of WiMAX physical layer baseband processing blocks in FPGA". Thesis, 2013. http://ethesis.nitrkl.ac.in/5105/1/211EC2303.pdf.
Pełny tekst źródłaTseng, Ya-Hui, i 曾雅惠. "FPGA Implementation of Physical Layer and Functional Verification of Link Layer of Universal Serial Bus". Thesis, 2013. http://ndltd.ncl.edu.tw/handle/10252614811215708520.
Pełny tekst źródłaLiu, Shou-Ming, i 劉守明. "FPGA-Based Design and Implementation on Physical Layer of IEEE 802.16d". Thesis, 2009. http://ndltd.ncl.edu.tw/handle/96606032632344174328.
Pełny tekst źródła國立中興大學
電機工程學系所
97
This thesis proposes according to IEEE 802.16 standards and mainly concentrates on the 802.16d OFDM physical layer, which is integrated with various key modules including Forward Error Correction, FFT/IFFT module, OFDM synchronous circuit and several other modules to constitute the entire base band system. And to make the main mould group of the rest in order to finish physical layer of circuit of the whole entity in fact, this model is implemented by Stanford University Interim channel models and frequency domain channel estimation is selected for this model. This system has been implemented by Verilog HDL and verified against with the C-based behavior model, using MATLAB to implement of materials simulation of the entity, In addition, it will also be prototyped and optimized on the Lattice XP2EVB emulation board. And this system also uses C# to test and convey MATLAB materials produced and then convey to which receives the end for communication with each other and transmits the materials in PC end for comparison.
"Development and Implementation of Physical Layer Kernels for Wireless Communication Protocols". Master's thesis, 2016. http://hdl.handle.net/2286/R.I.40213.
Pełny tekst źródłaDissertation/Thesis
Masters Thesis Engineering 2016
Sung, Gang-Neng, i 宋岡能. "Design and Implementation of Physical Layer for FlexRay-based Automotive Communication Systems". Thesis, 2010. http://ndltd.ncl.edu.tw/handle/79183330191873304771.
Pełny tekst źródła國立中山大學
電機工程學系研究所
99
In this dissertation, we propose a circuit design and implementation of physical layer for FlexRay-based automotive communication systems which are expected to be widely used in car electronics for the years to come. To reduce the volume of electrical lines in a car and ensure safe connections, the automotive communication systems are more important than ever. FlexRay systems have been deemed as better than other existing solutions for the complicated in-vehicle networks. A low-voltage differential-signaling-like transmitter is proposed to drive the twisted pair of the FlexRay bus. Furthermore, a three-comparator scheme is used to carry out bit slicing and state recognition at the receiver end. A prototype system as well as a chip implemented by using a typical 0.18 μm single-poly six-metal CMOS process is reported in this dissertation. Furthermore, an accurate clock signal is required in any control system, especially in the vehicle applications, where the “safety” is the top priority. Because of the TDMA strategy (Time Division Multiple Access) was chosen for the FlexRay communication protocol, the system clock should not be drifting too much. A robust 20 MHz clock generator with process, supply voltage, and temperature compensation and a low-jitter 80 MHz phase-lock loop are proposed in this dissertation to reduce hostile environment effects. Finally, because the “safety” and “reliability” are top design requirements in the automobile electronics, we should also focus on the power supply design in the in-car communication networks. Therefore, a high tolerant and high efficiency voltage converter is proposed in this dissertation. By utilizing stacked power MOSFETs, a voltage level converter, a detector and a controller, this design is realized by a typical CMOS process without any thick-oxide device to tolerate input voltage range up to 3 times of the VDD voltage.
Ku, Chen-Chia, i 古鎮嘉. "Design and Implementation of LTE Downlink Physical Layer Transmitter with SDR Platform". Thesis, 2017. http://ndltd.ncl.edu.tw/handle/9a4b84.
Pełny tekst źródła國立中央大學
通訊工程學系
106
This paper focuses on the transmission of Control Region and Data Region in the LTE downlink physical layer according to the standard specications dened by 3GPP Release 12. In this thesis, we introduce for the LTE downlink system, in- cluding the use of OFDM(Orthogonal Frequency Division Multiplexing)technology, specications and uplink modulation and downlink modulation principle, etc. In this thesis, we used Software-dene-radio to achieve LTE downlink transmitter. By the Software-dene-radio platform, we can immediatly transmit and receiver signal in the air on some particular band. Also we can change transmit and receive gain to observe the transformation of the signal in the air, discussion on the quality of the signal and system, etc.
Muni, Bijaya. "Physical Layer Implementation of a class of ZigBee Baseband Transceiver using FPGA". Thesis, 2013. http://ethesis.nitrkl.ac.in/4570/1/thesis-zigbee-implementaion-fpga-final-after-viva-voce.pdf.
Pełny tekst źródłaYu, Mingchao. "A study of DVB-T2 standard with physical layer transceiver design and implementation". Master's thesis, 2011. http://hdl.handle.net/1885/150437.
Pełny tekst źródłaTsai, Cheng-Chin, i 蔡承志. "A GPU Implementation of IEEE 802.16 OFDM Physical Layer for Software-Defined Radio". Thesis, 2013. http://ndltd.ncl.edu.tw/handle/65852663364352153717.
Pełny tekst źródła國立臺灣大學
電子工程學研究所
101
Wireless baseband processing, which usually requires high computation complexity and high data throughput, is regarded as the most challenging issue for Software-Defined Radio (SDR) systems. To relieve the difficulty in SDR systems, a modern Graphics Processing Unit (GPU) is chosen as implementation platform due to its numerous powerful arithmetic logic units. However, because of the lack of the universal parallel programming framework for SDR systems, it is difficult to take advantage of the GPU architecture. To overcome this problem, in this thesis, we propose the different levels of parallelism that can be exploited on GPU platforms for most baseband functions. The parallel approaches of each baseband function implemented on GPU platform can not only enhance the performance of baseband signal processing to meet the real-time requirement, but also gives an SDR developer the faster solutions to those time-consuming baseband functions if GPU is used to prototype a novel wireless protocol. In our experimental tests, a GPU platform can support about 20Mbps data rate for baseband signal processing at most. This result can also verify the effectiveness of our proposed GPU framework for SDR systems.
Lin, Yung-Chuan, i 林永權. "The System Design and Firmware Implementation on Physical Layer of IEEE 802.11b Wireless LAN". Thesis, 2003. http://ndltd.ncl.edu.tw/handle/68255526620242517931.
Pełny tekst źródła國立成功大學
電機工程學系碩博士班
91
Since internet was invented, the needs of the information gradually increase. Hence, the standard of the high-speed Wireless LAN is continuously performed. From the early IEEE 802.11 , IEEE 802.11b and IEEE 802.11a to the newest wireless LAN standard, IEEE 802.11g, the highest speed is up to 54M bits/s. This thesis focuses on the design of a baseband transceiver conforming with the IEEE 802.11b standard. In this thesis, we investigate the channel characteristics of the Wireless LAN, and firstly concerned about the harmful effects such as, frequency offset, phase error, sampling error caused by the hardware. The model which is similar to the real wireless channel is build and simulated . rom the simulation results of SPW, the synchronization solutions one designs have superior performance on WLAN channel. In addition to analysis and simulation, hardware implementation is the last emphasis. For testing the designed synchronization algorithm could well work at real time communication environment, one adopt the TI TMS320C6711 and some peripheral circuits to complete an embryo modem.
Kuo, Shu-Hua, i 郭淑華. "The Low Noise Output Buffer Design Techniques and Transceiver Implementation for USB2 Physical Layer". Thesis, 2000. http://ndltd.ncl.edu.tw/handle/96814474123436341712.
Pełny tekst źródła國立中央大學
電機工程研究所
88
High-speed I/O is the key component to successfully transmit data between electronic devices. Simultaneous switching noise (SSN) or called ground bounce is one of the major noise sources in high-speed digital circuit. There are two research topics in this thesis. First we focus on the overview of SSN. We will propose an output buffer - AC/DC for reducing SSN, output signal ringing and maintain DC current capability. The test chip by using UMC 0.35um 1P5M digital process will be implemented to verify the theoretical analysis results and circuit design techniques. For example, SSO improvement from 3 to 11 for the YC2/ACDC2 cases, considering the Quiet VDD case. Measurement results show that our invention can reduce the output ringing by 60%, and VDD/GND line bounce by 40% when comparing with conventional buffers used in standard commercial cell library with 2ns rise/fall time and 40pF output loading capability. Also we propose a characterization procedure to estimate power pads for simultaneous switching outputs (SSO). The Universal Serial Bus (USB) technology is now becoming an integral part of the personal computer platform. USB is one of the first I/O ports where several types of devices can be connected simultaneously. Thus, in the second research topic, the transceiver architecture and circuit is proposed for USB2 high-speed mode with 480Mb/s bandwidth. The physical layer of USB2 consists of transceiver, two envelope detector, and clock recovery.
ZHANG, TAI-BIN, i 張泰斌. "Design and implementation of physical layer for optical fiber token bus local area network". Thesis, 1988. http://ndltd.ncl.edu.tw/handle/38725273493293145585.
Pełny tekst źródłaHou, Ching-I., i 侯清逸. "Physical-Layer Transceiver Implementation and SDR Platform Verification for 5G Ultra-Reliable Low-Latency Communications". Thesis, 2019. http://ndltd.ncl.edu.tw/handle/6wew6r.
Pełny tekst źródła元智大學
電機工程學系乙組
107
This thesis is to research the transceiver design of the uplink control and data channels of 5G mobile communication systems. This research focuses on the use of low complexity technology to achieve high reliability and low latency communication proposes. In this thesis, we adopt the 5G-NR physical layer specification, i.e., 3GPP 38.211, to design the transceiver of the Physical Uplink Control Channel (PUCCH) and Physical Uplink Share Channel (PUSCH). In wireless communications, the receiver involves multiple distortion factors, e.g., multipath and carrier frequency offset (CFO) effect. This thesis proposes the low complexity channel estimation/equalization and CFO estimation/compensation to overcome the above factors. Next, to analyze the performance of the proposed algorithms, the software simulation platform of PUCCH and PUSCH channels is built to use for different fading scenarios. Moreover, for SDR software radio verification, the thesis utilizes the E4438C, E4406A instruments, USRP module, and 89600 VSA to evaluate the performances of PUCCH and PUSCH transceivers. Finally, for FPGA board verification, the circuits of the 5G-NR PUSCH transceiver are designed by Simulink HDL coder, which can generate Verilog code and convert to bitstream file via Vivado software. Then, using Simulink HDL verifier software to build Xilinx FPGA circuits, the FPGA hardware circuits can perform the same results with the Simulink software circuits. It confirms the proposed hardware design being correct. To sum up, this thesis combines the theory, simulation, instruments, modules, and circuit design verifications to overcome the multipath and CFO effects and to achieve the 5G purposes of low complexity, high reliable, and low latency communications transceiver design.
Huang, Chi-Hao, i 黃啟豪. "Analysis and Implementation of IEEE 802.16 WiMAX System Architecture on Linux Operating System and Software Physical Layer". Thesis, 2005. http://ndltd.ncl.edu.tw/handle/17398069859928985320.
Pełny tekst źródła淡江大學
電機工程學系碩士班
93
During the system providers of mobile communication investing much money to deploy 3G mobile communication networks, computer industry proposes another wireless communication technology: WiMAX (Worldwide Interoperability for Microwave Access) technique, which is also called as IEEE 802.16 communication technology. It is a strong wireless communication technology to provide users being able to quickly and arbitrarily use wireless data communication services, and this technique also has the potential to be a last mile solution of broadband home network connecting to Internet in future. In the example of 802.16a using instead of DSL technique, the theoretical value of transmission range is about 50km and the transmission rate can be up to 75Mbps. In the example of 802.16e using for mobile equipments, the theoretical value of transmission range is about 2-5km and the transmission rate can be up to 15Mbps. Owing to the cost of wireless network infrastructure is lower than that of wire network infrastructure, WiMAX can be regarded as a cheap substitutive scheme of DSL and other broadband wire networks. On the other hand, although the data transmission rate of 3G mobile communication network is faster than the currently mobile telecom network, it is still slower 30 times than that of WiMAX network, and its radio range is also smaller 10 times than that of WiMAX. Therefore, the required number of base station of WiMAX network is fewer than that of 3G mobile communication network, moreover, some parts of frequency bands defined in WiMAX are license-exempt. Present there are 67 member companies of WiMAX Forum in the world using the name of WiMAX to push the standard. The semiconductor giant-Intel corp. fully supports the technique, and the mobile phone and network provider-Nokia corp. also supports this technique standard. Intel corp. begins to include WiMAX technique in its chip platform, and plans to sell the WiMAX chip in the next half year. The analysts of MIC predict that there will be 25% notebooks installed this sort of wireless technique till 2008. Nemcek believes that consumers will get the convenience brought from WiMAX in 3 or 4 years, and the market of WiMAX will grow in 2007 or 2008. In this thesis” Analysis and Implementation of IEEE 802.16 WiMAX System Software Architecture on Linux Operating System” is to analyze and implement WiMAX wireless system on Linux operating system. For system analyzing, study the standard speciation of IEEE 802.16 series at first, then start to design software architecture for Linux system. For system implementation, use standard PC for software implementation, and then for others to follow the system architecture to implement Linux Device Driver for WiMAX. The system architecture will also consider the efficiency of porting and development of the embedded system. Also implement Software Emulate Physical Layer to verity the Linux Device Driver for WiMAX.
Manavi, Farzad. "Implementation of OFDM modem for the physical layer of IEEE 802.11a standard based on Xilinx Virtex-II FPGA". Thesis, 2004. http://spectrum.library.concordia.ca/7949/1/MQ91079.pdf.
Pełny tekst źródłaMartins, Cesar Miguel dos Santos. "Implementação em plataformas SDR de esquemas de codificação para segurança na camada física baseados em códigos curtos e técnicas de interleaving". Master's thesis, 2017. http://hdl.handle.net/10316/83388.
Pełny tekst źródłaOs últimos anos trouxeram um crescimento das comunicações sem fios, o que se refletiu numa maior preocupação com a segurança dos dados transmitidos entre dispositivos. Apesar da criptografia providenciar níveis satisfatórios de segurança, não é inquebrável, pelo que não se consegue garantir que não haja alguma fuga de informação. Nesse sentido, têm sido desenvolvidos métodos de introduzir segurança também na camada física, como complemento à segurança já existente.Recentemente, foi proposto um esquema que recorre a uma chave aleatória de interleaving, que é usada para baralhar a mensagem a transmitir, e que é, posteriormente, anexada à mesma, sendo ativado um jammer durante a transmissão dos bits correspondentes à chave gerada, de forma a criar uma vantagem em relação a um possível eavesdropper. Paralelamente a este, foi desenvolvido um esquema idêntico, mas em que os bits correspondentes à chave são apagados depois da mensagem ser codificada. Este último esquema parte do pressuposto da existência de uma vantagem do recetor legítimo face a um possível eavesdropper, expressa em termos de uma melhor relação sinal-ruído (por exemplo, a transmissão entre os intervenientes legítimos é realizada dentro de uma sala, garantindo que não existe um eavesdropper dentro da mesma), permitindo ao recetor legítimo a recuperação correta da chave, o que não é possível em situações de comunicação mais degradadas. Nesta dissertação é realizada a prova de conceito com a implementação em ambiente real de ambos os métodos em plataformas de rádio definido por software (SDR – Software Defined Radio), programadas com recurso ao MATLAB/Simulink. São, também, apresentados cenários de teste adequados, onde foram realizadas experiências que mostram a existência de um acréscimo de segurança introduzido por estes esquemas num cenário real. No decorrer da implementação, foi, ainda, proposta uma variação a ambos os esquemas, substituindo o interleaver por um scrambler, tendo sido obtidos resultados significativamente melhores. Nesta dissertação, são também descritos os problemas e dificuldades inerentes à implementação prática e teste de um sistema de comunicação genérico em plataformas SDR. Em concreto, e a título de exemplo, é proposto e foi implementado um processo de automatização dos testes, assente em comunicação sobre UDP, que permite a sincronização de vários SDRs (que modelam os sistemas transmissores e recetores), que pode ser aplicado a outros modelos de Simulink que representem um canal de escuta.Com estes resultados, mostra-se que os esquemas propostos cumprem os requisitos de garantir uma transmissão segura e fidedigna, podendo vir a ser um importante complemento à segurança das comunicações, principalmente em dispositivos móveis, como telemóveis (onde a segurança baseada em proximidade está a ganhar força) ou dispositivos da Internet das Coisas de baixo consumo, onde pode não ser possível utilizar os métodos da criptografia.
The last few years have brought a growth in the usage of wireless communications, which was reflected in an increased concern for the security of data transmitted between devices. Although cryptography provides satisfactory levels of security, it is not unbreakable, so one cannot guarantee that there is no leakage of information. Therefore, methods have been developed to introduce security also at the physical layer, using codes with finite blocklengths, in addition to existing security.Recently, a new schema has been proposed that generates a random interleaving key, which is used to shuffle the message to be transmitted, being afterward attached to it for transmission, while a jammer is turned on during the transmission of the key, in order to create an advantage over a possible eavesdropper. Meanwhile, an identical schema was developed, in which the bits corresponding to the key are erased after the message is encoded. This latter schema is based on the assumption of a legitimate receiver’s advantage over a possible eavesdropper, expressed in terms of a better signal-to-noise ratio (for example, by performing the transmission within a room, ensuring that there is no eavesdropper inside it), allowing the legitimate receiver to correctly recover the key, which is not possible in more degraded communication situations.In this dissertation, the proof of concept is performed with the implementation of both methods on Software Defined Radio (SDR) platforms, programmed using MATLAB/Simulink. Appropriate test scenarios are also presented, where experiments were conducted that show the existence of an increase in the security introduced by these schemes in a real scenario. In the course of implementation, a variation of both schemas was proposed, replacing the interleaver with a scrambler, and significantly better results were obtained. In this dissertation, the problems and difficulties inherent to the practical implementation and testing of a generic communication system on SDR platforms are also described. Particularly, as an example, a test automation process based on communication over UDP is proposed and implemented, which allows the synchronization of several computers operating SDR (which can model the transmitter and receiver systems), which can be applied to other Simulink models using the wiretap channel.With these results, it has been shown that the proposed schemes ensure a safe and reliable transmission. These may be an important complement to the security of communications, mainly on mobile devices, such as mobile phones (where proximity-based security is gaining traction) or low power devices from the Internet of Things, where typical cryptographic mechanisms may not be applicable.
Huang, Chien-Wei, i 黃健瑋. "The System Design and Firmware Implementationon Physical Layer of IEEE 802.11a Wireless LAN". Thesis, 2002. http://ndltd.ncl.edu.tw/handle/53599528600526569594.
Pełny tekst źródła國立成功大學
電機工程學系碩博士班
90
Owing to the rapidly development of wireless data communication, wireless LAN with its high speed transmission is also proposed, then this thesis focuses on the design of a baseband transceiver conforming with the IEEE 802.11a standard. Due to the using of Orthogonal Frequency Division Multiplexing on physical layer, some traditional issues such as the recovery of timing clock and carrier frequency, immoderate peak to average power ratio will be analyzed and solve. From the simulation results of SPW, the synchronization solutions one designs not only have superior performance on AWGN channel, but also its PER and BER could be expected on wireless multipath fading channel. In addition to analysis and simulation, hardware implementation is the last emphasis. For testing the designed synchronization algorithm could well work at real time communication environment, one adopt the TI TMS320C6711 and some peripheral circuits to complete an embryo modem. These give more challenge than simulation!