Gotowe bibliografie tematyczne / Phase change memory GST

Gotowa bibliografia na temat „Phase change memory GST”

Autor: Grafiati
Data publikacji: 25 maja 2024

Utwórz poprawne odniesienie w stylach APA, MLA, Chicago, Harvard i wielu innych

Wybierz rodzaj źródła:

Spis treści

Zobacz listy aktualnych artykułów, książek, rozpraw, streszczeń i innych źródeł naukowych na temat „Phase change memory GST”.

Przycisk „Dodaj do bibliografii” jest dostępny obok każdej pracy w bibliografii. Użyj go – a my automatycznie utworzymy odniesienie bibliograficzne do wybranej pracy w stylu cytowania, którego potrzebujesz: APA, MLA, Harvard, Chicago, Vancouver itp.

Możesz również pobrać pełny tekst publikacji naukowej w formacie „.pdf” i przeczytać adnotację do pracy online, jeśli odpowiednie parametry są dostępne w metadanych.

Artykuły w czasopismach na temat "Phase change memory GST"

1

S. A.Aziz, M., F. H. M.Fauzi, Z. Mohamad i R. I. Alip. "The Effect of Channel Length on Phase Transition of Phase Change Memory". International Journal of Engineering & Technology 7, nr 3.11 (21.07.2018): 25. http://dx.doi.org/10.14419/ijet.v7i3.11.15923.

Pełny tekst źródła
Streszczenie:
The phase transition of germanium antimony tellurium (GST) and the temperature of GST were investigated using COMSOL Multiphysic 5.0 software. Silicon carbide was using as a heater layer in the separate heater structure of PCM. These simulations have a different channel of SiC. The temperature of GST and the phase transition of GST can be obtained from the simulation. From the simulation, the 300 nm channel of SiC can change the GST from amorphous to crystalline state at 0.7V with 100 ns pulse width. The 800 nm channel of SiC can change the GST from amorphous to crystalline state at 1.1V with 100 ns pulse width. Results demonstrated that the channel of SIC can affecting the temperature of GST and the GST changes from amorphous state to crystalline state. As the channel of SiC decreased, the temperature of GST was increased and the GST was change to crystalline state quickly.
Style APA, Harvard, Vancouver, ISO itp.
2

Golovchak, R., Y. G. Choi, S. Kozyukhin, Yu Chigirinsky, A. Kovalskiy, P. Xiong-Skiba, J. Trimble, R. Pafchek i H. Jain. "Oxygen incorporation into GST phase-change memory matrix". Applied Surface Science 332 (marzec 2015): 533–41. http://dx.doi.org/10.1016/j.apsusc.2015.01.203.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
3

Behrens, Mario, Andriy Lotnyk, Hagen Bryja, Jürgen W. Gerlach i Bernd Rauschenbach. "Structural Transitions in Ge2Sb2Te5 Phase Change Memory Thin Films Induced by Nanosecond UV Optical Pulses". Materials 13, nr 9 (1.05.2020): 2082. http://dx.doi.org/10.3390/ma13092082.

Pełny tekst źródła
Streszczenie:
Ge-Sb-Te-based phase change memory alloys have recently attracted a lot of attention due to their promising applications in the fields of photonics, non-volatile data storage, and neuromorphic computing. Of particular interest is the understanding of the structural changes and underlying mechanisms induced by short optical pulses. This work reports on structural changes induced by single nanosecond UV laser pulses in amorphous and epitaxial Ge2Sb2Te5 (GST) thin films. The phase changes within the thin films are studied by a combined approach using X-ray diffraction and transmission electron microscopy. The results reveal different phase transitions such as crystalline-to-amorphous phase changes, interface assisted crystallization of the cubic GST phase and structural transformations within crystalline phases. In particular, it is found that crystalline interfaces serve as crystallization templates for epitaxial formation of metastable cubic GST phase upon phase transitions. By varying the laser fluence, GST thin films consisting of multiple phases and different amorphous to crystalline volume ratios can be achieved in this approach, offering a possibility of multilevel data storage and realization of memory devices with very low resistance drift. In addition, this work demonstrates amorphization and crystallization of GST thin films by using only one UV laser with one single pulse duration and one wavelength. Overall, the presented results offer new perspectives on switching pathways in Ge-Sb-Te-based materials and show the potential of epitaxial Ge-Sb-Te thin films for applications in advanced phase change memory concepts.
Style APA, Harvard, Vancouver, ISO itp.
4

Stern, Keren, Yair Keller, Christopher M. Neumann, Eric Pop i Eilam Yalon. "Temperature-dependent thermal resistance of phase change memory". Applied Physics Letters 120, nr 11 (14.03.2022): 113501. http://dx.doi.org/10.1063/5.0081016.

Pełny tekst źródła
Streszczenie:
One of the key challenges of phase change memory (PCM) is its high power consumption during the reset operation, when the phase change material (typically Ge2Sb2Te5, i.e., GST) heats up to ∼900 K or more in order to melt. Here, we study the temperature-dependent behavior of PCM devices by probing the reset power at ambient temperatures from 80 to 400 K. We find that different device structures exhibit contrasting temperature-dependent behavior. The reset power in our confined-type PCM is nearly unchanged with ambient temperature, corresponding to a temperature-dependent thermal resistance, whereas results for mushroom-type PCM from the literature show a linear relation between power and temperature, suggesting a more constant thermal resistance. This discrepancy is ascribed to different temperature distributions and thermal properties of the dominant components of the PCM cell thermal resistance, as shown by electro-thermal modeling. In the confined cell, the thermal boundary resistance of the GST and the thermal conductivity of the bottom electrode dominate the thermal resistance, while for the mushroom cell, the GST thermal conductivity plays a greater role. These findings can help to design more power- and energy-efficient PCM devices by better focusing thermal management efforts on the key components of the device.
Style APA, Harvard, Vancouver, ISO itp.
5

Kim, Sung Soon, Jun Hyun Bae, Woo Hyuck Do, Kyun Ho Lee, Young Tae Kim, Young Kwan Park, Jeong Taek Kong i Hong Lim Lee. "Thermal Stress Model for Phase Change Random Access Memory". Solid State Phenomena 124-126 (czerwiec 2007): 37–40. http://dx.doi.org/10.4028/www.scientific.net/ssp.124-126.37.

Pełny tekst źródła
Streszczenie:
Thermal stress model considering the effect of phase transformation is proposed for Phase-Change Random Access Memory (PRAM). The results of simulation show that the high level of stress is generated on the junction where Ge2Sb2Te5(GST), TiN and SiO2 meet together. The high level of stress can also be observed in the interface between TiN and SiO2. From simulation results, it can be predictable that delamination between GST and TiN can occur during operation of PRAM. It is expected that the simulation model, which has been developed in this research, is very useful tool for PRAM device design.
Style APA, Harvard, Vancouver, ISO itp.
6

Raeis-Hosseini, Niloufar, i Junsuk Rho. "Dual-Functional Nanoscale Devices Using Phase-Change Materials: A Reconfigurable Perfect Absorber with Nonvolatile Resistance-Change Memory Characteristics". Applied Sciences 9, nr 3 (8.02.2019): 564. http://dx.doi.org/10.3390/app9030564.

Pełny tekst źródła
Streszczenie:
Integration of metamaterial and nonvolatile memory devices with tunable characteristics is an enthusing area of research. Designing a unique nanoscale prototype to achieve a metasurface with reliable resistive switching properties is an elusive goal. We demonstrate a method to exploit the advantages of a phase-change material (PCM) as a metamaterial light absorber and a nanoscale data storage device. We designed and simulated a metamaterial perfect absorber (MPA) that can be reconfigured by adjusting the visible light properties of a chalcogenide-based PCM. The suggested perfect absorber is based on a Ge2Sb2Te5 (GST) film, and is tuned between two distinct states by heat treatment. Furthermore, we fabricated and characterized a resistive switching memory (ReRAM) device with the same features. The MPA/ReRAM device with a conventional metal/dielectric/metal structure (Ag/GST/Al2O3/Pt) consisted of arrays of Ag squares patterned on a GST thin film and an alumina-coated Pt mirror on a glass substrate. Based on the numerical data, amorphous GST showed perfect absorbance in the visible spectrum, whereas, crystalline GST showed broadband perfect absorbance. The fabricated ReRAM device exhibited uniform, bidirectional, and programmable memory characteristics with a high ON/OFF ratio for nonvolatile memory applications. The elucidated origin of the bipolar resistive switching behavior is assigned to the formation and rupture of conductive filaments.
Style APA, Harvard, Vancouver, ISO itp.
7

Agarwal, Satish C. "Role of potential fluctuations in phase-change GST memory devices". physica status solidi (b) 249, nr 10 (17.08.2012): 1956–61. http://dx.doi.org/10.1002/pssb.201200362.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
8

Xue, Yuan, Sannian Song, Xiaogang Chen, Shuai Yan, Shilong Lv, Tianjiao Xin i Zhitang Song. "Enhanced performance of phase change memory by grain size reduction". Journal of Materials Chemistry C 10, nr 9 (2022): 3585–92. http://dx.doi.org/10.1039/d1tc06045g.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
9

Pacco, Antoine, Ju-Geng Lai, Pallavi Puttarame Gowda, Hanne De Coster, Jens Rip, Kurt Wostyn i Efrain Altamirano Sanchez. "Wet Chemical Recess Etching of Ge2Sb2Te5 for 3D PCRAM Memory Applications". ECS Meeting Abstracts MA2022-01, nr 28 (7.07.2022): 1262. http://dx.doi.org/10.1149/ma2022-01281262mtgabs.

Pełny tekst źródła
Streszczenie:
Memory cells comprising a Phase Change Material (PCM) are the building blocks of fast and non-volatile memory devices called Phase Change Random Access Memory (PCRAM) [1-3]. The working principle of this memory involves data retention in the form of a phase (amorphous or crystalline) and the set and reset can be done by Joule heating to induce an amorphous-to-crystalline or crystalline-to-amorphous transition respectively. Some chalcogenide materials experience this thermally driven phase change, GeSbTe (GST) being one of those alloys extensively studied. GST has also been adopted for the fabrication of the 1st generation X-point memory [4] and might be adopted in a 2nd generation X-point memory of a four-layer PCM structure [5]. However, this 2D scaling or stacking of PCRAM is limited by cost and therefore the development of 3D architectures is envisaged for decreasing the cost/bit [6]. A key requirement for the fabrication of this 3D architecture is the conformal deposition and etch-back of GST. Dry plasma etching might be limited to anisotropic recess while isotropic lateral recess is needed. Therefore, wet isotropic etching might be the process of choice. A few chemical solutions have been proposed in previous studies. Cheng et al. showed that GST could be etched in HNO3 but with a very high etch rate and with an unwanted surface composition change due to different oxidation and dissolution rates of the metalloids [7]. Wang et al. demonstrated that basic wet etching solutions led to a slower etch rate and a much smoother surface compared to acidic wet etching solutions [8]. Deng et al. showed a switch in the etch rate order between crystalline and amorphous GST depending on the H2O2 concentration in TMAH [9]. In this work, we present a controllable partial recess solution that leaves the GST surface smooth after recess. Wet recess of amorphous and crystalline blanket films, as well as patterned samples, was initially explored using the commodity chemistries Ammonium Peroxide Mixture (APM) and (Hydrochloric Peroxide Mixture) HPM. The etching of GST in HPM as a function of the H2O2 concentration was monitored by ICPMS and showed a well-controlled etch rate. However, some shortcomings of these H2O2-containing solutions, like roughness and selectivity, lead to a change of oxidizing agent from H2O2 to O3. In the O3-containing solutions, the selectivity towards Al2O3, SiO2, and TiN could be secured. The impact of the dissolved O3 concentration on surface roughness and etch rate as well as the uniformity of this wet etching process were assessed on a single wafer tool. Finally, the bulk and surface GST composition and oxidation post-recess were verified through XPS and ERD. REFERENCES: [1] D. Loke et al., “Breaking the Speed Limits of Phase-Change Memory.” Science, 2012, 336, 6088, 1566. [2] K. Ding et al., “Recipe for ultrafast and persistent phase-change memory materials.” NPG Asia Mater 12, 63, 2020. [3] F. Rao et al., “Reducing the stochasticity of crystal nucleation to enable sub-nanosecond memory writing.” Science, 2017, 358, 6369, 1423. [4] [internet] https://www.techinsights.com/blog/intel-3d-xpoint-memory-die-removed-intel-optanetm-pcm-phase-change-memory [5] [internet] https://www.techinsights.com/blog/memory/intels-2nd-generation-xpoint-memory [6] [internet] https://www.imec-int.com/en/imec-magazine/imec-magazine-october-2017/in-pursuit-of-high-density-storage-class-memory [7] H.Y. Cheng et al., “Wet-Etching Characteristics of Ge2Sb2Te5 Thin Films for Phase-Change Memory.” IEEE Trans. Magn., 41, 2, 2005. [8] L. Wang et al., “Basic Wet-Etching Solutions for Ge2Sb2Te5 Phase Change Material.” J. Electrochem. Soc., 157, H470, 2010. [9] C. Deng et al., “XPS study on the selective wet etching mechanism of GeSbTe phase change thin films with TMAH.” Proc. of SPIE, 8782, 87820N, 2012.
Style APA, Harvard, Vancouver, ISO itp.
10

Yin, You, i Sumio Hosaka. "Crystal Growth Suppression by N-Doping into Chalcogenide for Application to Next-Generation Phase Change Memory". Key Engineering Materials 497 (grudzień 2011): 101–5. http://dx.doi.org/10.4028/www.scientific.net/kem.497.101.

Pełny tekst źródła
Streszczenie:
In this work, we investigate the effect of the N-doping on microstructure and electrical properties of chalcogenide Ge2Sb2Te5(GST) films for application to multilevel-storage phase change memory (PCM). Crystal size can be markedly reduced from 16 nm to 5 nm by N-doping into GST. The crystal growth suppression is believed to be controlled by distributed fine nitride particles. The resistivity of N-GST as a function of annealing temperature exhibits a gradual change due to the crystal growth suppression. The characteristics imply that N-GST is suitable for application to multilevel-storage PCM as the next-generation nonvolatile memory.
Style APA, Harvard, Vancouver, ISO itp.
Więcej źródeł

Rozprawy doktorskie na temat "Phase change memory GST"

1

Giovanardi, Fabio <1984&gt. "Analysis of charge-transport properties in GST materials for next generation phase-change memory devices". Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2013. http://amsdottorato.unibo.it/5583/4/giovanardi_fabio_tesi.pdf.

Pełny tekst źródła
Streszczenie:
The quest for universal memory is driving the rapid development of memories with superior all-round capabilities in non-volatility, high speed, high endurance and low power. The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. To resolve this issue the industry is improving existing technologies such as Flash and exploring new ones. Among those new technologies is the Phase Change Memory (PCM), which overcomes some of the shortcomings of the Flash such as durability and scalability. This alternative non-volatile memory technology, which uses resistance contrast in phase-change materials, offers more density relative to DRAM, and can help to increase main memory capacity of future systems while remaining within the cost and power constraints. Chalcogenide materials can suitably be exploited for manufacturing phase-change memory devices. Charge transport in amorphous chalcogenide-GST used for memory devices is modeled using two contributions: hopping of trapped electrons and motion of band electrons in extended states. Crystalline GST exhibits an almost Ohmic I(V) curve. In contrast amorphous GST shows a high resistance at low biases while, above a threshold voltage, a transition takes place from a highly resistive to a conductive state, characterized by a negative differential-resistance behavior. A clear and complete understanding of the threshold behavior of the amorphous phase is fundamental for exploiting such materials in the fabrication of innovative nonvolatile memories. The type of feedback that produces the snapback phenomenon is described as a filamentation in energy that is controlled by electron–electron interactions between trapped electrons and band electrons. The model thus derived is implemented within a state-of-the-art simulator. An analytical version of the model is also derived and is useful for discussing the snapback behavior and the scaling properties of the device.
Lo sviluppo dei sistemi di memoria di futura generazione è guidato principalmente dalla ricerca di una tecnologia in grado di superare quelle attuali in ogni loro specifica di funzionamento, dalla ritenzione di dato alla velocità di accesso, migliorandone la durata e riducendo il dispendio energetico. Il sottosistema delle memorie assorbe una parte significativa delle risorse del macro sistema costituito dal calcolatore, tanto da aver quasi raggiunto il limite tecnologico nel caso delle odierne memorie di tipo DRAM. La soluzione più promettente sembra essere quella delle memorie a cambiamento di fase (PCM), in grado di colmare anche i limiti mostrati dalla tecnologia Flash nell’ambito della durata e scalabilità. I materiali che consentono di realizzare dispostivi a cambiamento di fase pilotato elettricamente appartengono alla famiglia dei calcogenuri. Tra i diversi composti calcogenuri quello attualmente identificato come soluzione più promettente è il Ge2Sb2Te5 (GST). Il trasporto di carica all’interno di dispositivi di memoria realizzati con tali materiali è stato modellato considerando l’azione di due contributi differenti: hopping di cariche intrappolate e moto di elettroni liberi in stati estesi. Il GST mostra un comportamento elettrico pressoché Ohmico in fase cristallina mentre, in fase amorfa, risulta essere poco conduttivo per basse correnti fino al superamento di una tensione di soglia oltre la quale si assiste al passaggio da uno stato altamente resistivo ad uno altamente conduttivo, caratterizzato da un andamento a resistenza differenziale negativa (NDR). Il meccanismo retroattivo che induce il fenomeno di snapback viene descritto come filamentazione in energia controllata dalle interazioni tra elettroni liberi ed elettroni intrappolati. Il modello fisico ricavato è stato implementato all’interno di un simulatore di dispositivi di ultima generazione ed è stato in seguito riprodotto in una versione analitica semplificata in grado, però, di permettere una prima analisi del comportamento elettrico del dispositivo e delle sue proprietà di scaling.
Style APA, Harvard, Vancouver, ISO itp.
2

Giovanardi, Fabio <1984&gt. "Analysis of charge-transport properties in GST materials for next generation phase-change memory devices". Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2013. http://amsdottorato.unibo.it/5583/.

Pełny tekst źródła
Streszczenie:
The quest for universal memory is driving the rapid development of memories with superior all-round capabilities in non-volatility, high speed, high endurance and low power. The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. To resolve this issue the industry is improving existing technologies such as Flash and exploring new ones. Among those new technologies is the Phase Change Memory (PCM), which overcomes some of the shortcomings of the Flash such as durability and scalability. This alternative non-volatile memory technology, which uses resistance contrast in phase-change materials, offers more density relative to DRAM, and can help to increase main memory capacity of future systems while remaining within the cost and power constraints. Chalcogenide materials can suitably be exploited for manufacturing phase-change memory devices. Charge transport in amorphous chalcogenide-GST used for memory devices is modeled using two contributions: hopping of trapped electrons and motion of band electrons in extended states. Crystalline GST exhibits an almost Ohmic I(V) curve. In contrast amorphous GST shows a high resistance at low biases while, above a threshold voltage, a transition takes place from a highly resistive to a conductive state, characterized by a negative differential-resistance behavior. A clear and complete understanding of the threshold behavior of the amorphous phase is fundamental for exploiting such materials in the fabrication of innovative nonvolatile memories. The type of feedback that produces the snapback phenomenon is described as a filamentation in energy that is controlled by electron–electron interactions between trapped electrons and band electrons. The model thus derived is implemented within a state-of-the-art simulator. An analytical version of the model is also derived and is useful for discussing the snapback behavior and the scaling properties of the device.
Lo sviluppo dei sistemi di memoria di futura generazione è guidato principalmente dalla ricerca di una tecnologia in grado di superare quelle attuali in ogni loro specifica di funzionamento, dalla ritenzione di dato alla velocità di accesso, migliorandone la durata e riducendo il dispendio energetico. Il sottosistema delle memorie assorbe una parte significativa delle risorse del macro sistema costituito dal calcolatore, tanto da aver quasi raggiunto il limite tecnologico nel caso delle odierne memorie di tipo DRAM. La soluzione più promettente sembra essere quella delle memorie a cambiamento di fase (PCM), in grado di colmare anche i limiti mostrati dalla tecnologia Flash nell’ambito della durata e scalabilità. I materiali che consentono di realizzare dispostivi a cambiamento di fase pilotato elettricamente appartengono alla famiglia dei calcogenuri. Tra i diversi composti calcogenuri quello attualmente identificato come soluzione più promettente è il Ge2Sb2Te5 (GST). Il trasporto di carica all’interno di dispositivi di memoria realizzati con tali materiali è stato modellato considerando l’azione di due contributi differenti: hopping di cariche intrappolate e moto di elettroni liberi in stati estesi. Il GST mostra un comportamento elettrico pressoché Ohmico in fase cristallina mentre, in fase amorfa, risulta essere poco conduttivo per basse correnti fino al superamento di una tensione di soglia oltre la quale si assiste al passaggio da uno stato altamente resistivo ad uno altamente conduttivo, caratterizzato da un andamento a resistenza differenziale negativa (NDR). Il meccanismo retroattivo che induce il fenomeno di snapback viene descritto come filamentazione in energia controllata dalle interazioni tra elettroni liberi ed elettroni intrappolati. Il modello fisico ricavato è stato implementato all’interno di un simulatore di dispositivi di ultima generazione ed è stato in seguito riprodotto in una versione analitica semplificata in grado, però, di permettere una prima analisi del comportamento elettrico del dispositivo e delle sue proprietà di scaling.
Style APA, Harvard, Vancouver, ISO itp.
3

Hernandez, Gerardo Rodriguez. "Study of mixed mode electro-optical operations of Ge2Sb2Te5". Thesis, University of Oxford, 2017. https://ora.ox.ac.uk/objects/uuid:5bb8c1f5-2f4b-4eb0-a61a-3978af04211f.

Pełny tekst źródła
Streszczenie:
Chalcogenide based Phase Change Materials are currently of great technological interest in the growing field of optoelectronics. Ge2Sb2Te5 (GST) is the most widely studied phase change material, and it has been commercially used in both optical and electronic data storage applications, due to its ability to switch between two different atomic configurations, at high speed and with low power consumption, as well as its high optical and electrical contrast between amorphous and crystalline states. Despite its well-known optical and electrical properties, the operation in combination of optical and electrical domains has not yet been fully investigated. This work studies the operation of GST nano-devices exposed to a combination of optical and electrical stimuli or mixed mode by asking, is it possible to electrically measure an optically induced phase change, or vice versa? If so, how do the optical and electrical responses relate to each other, and is it possible to operate GST with a combination of optical and electrical signals? What are the technical constraints that need to be considered in order to fabricate GST devices that could be operated either optically or electrically? In order to answer these questions, experiments that characterized the optical and electrical responses of GST based nano-devices were performed. It was found that different crystallization mechanisms may have influence in the response, and that the thermal and optical design characteristics of the device play a key role in its operation. Finally a proof of principle, of an opto-electonic memory device that can be read electrically, reset optically and write electrically, is presented. This opens up possibilities for the development of new opto-eloectronic applications such as non-volatile interfaces between future photonics and electronics, high speed optical communication detectors, high speed cameras, artificial retinas and many more.
Style APA, Harvard, Vancouver, ISO itp.
4

Kiouseloglou, Athanasios. "Caractérisation et conception d' architectures basées sur des mémoires à changement de phase". Thesis, Université Grenoble Alpes (ComUE), 2015. http://www.theses.fr/2015GREAT128/document.

Pełny tekst źródła
Streszczenie:
Les mémoires à base de semi-conducteur sont indispensables pour les dispositifs électroniques actuels. La demande croissante pour des dispositifs mémoires fortement miniaturisées a entraîné le développement de mémoires non volatiles fiables qui sont utilisées dans des systèmes informatiques pour le stockage de données et qui sont capables d'atteindre des débits de données élevés, avec des niveaux de dissipation d'énergie équivalents voire moindres que ceux des technologies mémoires actuelles.Parmi les technologies de mémoires non-volatiles émergentes, les mémoires à changement de phase (PCM) sont le candidat le plus prometteur pour remplacer la technologie de mémoire Flash conventionnelle. Les PCM offrent une grande variété de fonctions, comme une lecture et une écriture rapide, un excellent potentiel de miniaturisation, une compatibilité CMOS et des performances élevées de rétention de données à haute température et d'endurance, et peuvent donc ouvrir la voie à des applications non seulement pour les dispositifs mémoires, mais également pour les systèmes informatiques à hautes performances. Cependant, certains problèmes de fiabilité doivent encore être résolus pour que les PCM se positionnent comme un remplacement concurrentiel de la mémoire Flash.Ce travail se concentre sur l'étude de mémoires à changement de phase intégrées afin d'optimiser leurs performances et de proposer des solutions pour surmonter les principaux points critiques de la technologie, ciblant des applications à hautes températures. Afin d'améliorer la fiabilité de la technologie, la stœchiométrie du matériau à changement de phase a été conçue de façon appropriée et des dopants ont été ajoutés, optimisant ainsi la stabilité thermique. Une diminution de la vitesse de programmation est également rapportée, ainsi qu'un drift résiduel de la résistance de l'état de faiblement résistif vers des valeurs de résistance plus élevées au cours du temps.Une nouvelle technique de programmation est introduite, permettant d'améliorer la vitesse de programmation des dispositifs et, dans le même temps, de réduire avec succès le phénomène de drift en résistance. Par ailleurs, un algorithme de programmation des PCM multi-bits est présenté. Un générateur d'impulsions fournissant des impulsions avec la tension souhaitée en sortie a été conçu et testé expérimentalement, répondant aux demandes de programmation d'une grande variété de matériaux innovants et en permettant la programmation précise et l’optimisation des performances des PCM
Semiconductor memory has always been an indispensable component of modern electronic systems. The increasing demand for highly scaled memory devices has led to the development of reliable non-volatile memories that are used in computing systems for permanent data storage and are capable of achieving high data rates, with the same or lower power dissipation levels as those of current advanced memory solutions.Among the emerging non-volatile memory technologies, Phase Change Memory (PCM) is the most promising candidate to replace conventional Flash memory technology. PCM offers a wide variety of features, such as fast read and write access, excellent scalability potential, baseline CMOS compatibility and exceptional high-temperature data retention and endurance performances, and can therefore pave the way for applications not only in memory devices, but also in energy demanding, high-performance computer systems. However, some reliability issues still need to be addressed in order for PCM to establish itself as a competitive Flash memory replacement.This work focuses on the study of embedded Phase Change Memory in order to optimize device performance and propose solutions to overcome the key bottlenecks of the technology, targeting high-temperature applications. In order to enhance the reliability of the technology, the stoichiometry of the phase change material was appropriately engineered and dopants were added, resulting in an optimized thermal stability of the device. A decrease in the programming speed of the memory technology was also reported, along with a residual resistivity drift of the low resistance state towards higher resistance values over time.A novel programming technique was introduced, thanks to which the programming speed of the devices was improved and, at the same time, the resistance drift phenomenon could be successfully addressed. Moreover, an algorithm for programming PCM devices to multiple bits per cell using a single-pulse procedure was also presented. A pulse generator dedicated to provide the desired voltage pulses at its output was designed and experimentally tested, fitting the programming demands of a wide variety of materials under study and enabling accurate programming targeting the performance optimization of the technology
Style APA, Harvard, Vancouver, ISO itp.
5

Sevison, Gary Alan. "Silicon Compatible Short-Wave Infrared Photonic Devices". University of Dayton / OhioLINK, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1523553057993197.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
6

Aboujaoude, Andrea E. "Nanopatterned Phase-Change Materials for High-Speed, Continuous Phase Modulation". University of Dayton / OhioLINK, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1538243834791942.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
7

Seong, Nak Hee. "A reliable, secure phase-change memory as a main memory". Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/50123.

Pełny tekst źródła
Streszczenie:
The main objective of this research is to provide an efficient and reliable method for using multi-level cell (MLC) phase-change memory (PCM) as a main memory. As DRAM scaling approaches the physical limit, alternative memory technologies are being explored for future computing systems. Among them, PCM is the most mature with announced commercial products for NOR flash replacement. Its fast access latency and scalability have led researchers to investigate PCM as a feasible candidate for DRAM replacement. Moreover, the multi-level potential of PCM cells can enhance the scalability by increasing the number of bits stored in a cell. However, the two major challenges for adopting MLC PCM are the limited write endurance cycle and the resistance drift issue. To alleviate the negative impact of the limited write endurance cycle, this thesis first introduces a secure wear-leveling scheme called Security Refresh. In the study, this thesis argues that a PCM design not only has to consider normal wear-out under normal application behavior, most importantly, it must take the worst-case scenario into account with the presence of malicious exploits and a compromised OS to address the durability and security issues simultaneously. Security Refresh can avoid information leak by constantly migrating their physical locations inside the PCM, obfuscating the actual data placement from users and system software. In addition to the secure wear-leveling scheme, this thesis also proposes SAFER, a hardware-efficient multi-bit stuck-at-fault error recovery scheme which can function in conjunction with existing wear-leveling techniques. The limited write endurance leads to wear-out related permanent failures, and furthermore, technology scaling increases the variation in cell lifetime resulting in early failures of many cells. SAFER exploits the key attribute that a failed cell with a stuck-at value is still readable, making it possible to continue to use the failed cell to store data; thereby reducing the hardware overhead for error recovery. Another approach that this thesis proposes to address the lower write endurance is a hybrid phase-change memory architecture that can dynamically classify, detect, and isolate frequent writes from accessing the phase-change memory. This proposed architecture employs a small SRAM-based Isolation Cache with a detection mechanism based on a multi-dimensional Bloom filter and a binary classifier. The techniques are orthogonal to and can be combined with other wear-out management schemes to obtain a synergistic result. Lastly, this thesis quantitatively studies the current art for MLC PCM in dealing with the resistance drift problem and shows that the previous techniques such as scrubbing or error correction schemes are incapable of providing sufficient level of reliability. Then, this thesis proposes tri-level-cell (3LC) PCM and demonstrates that 3LC PCM can be a viable solution to achieve the soft error rate of DRAM and the performance of single-level-cell PCM.
Style APA, Harvard, Vancouver, ISO itp.
8

Huang, Bolong. "Theoretical study on phase change memory materials". Thesis, University of Cambridge, 2012. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.609986.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
9

Almoric, Jean. "Développement d'un nouvel instrument couplant FIB/SEM UHV et OTOF-SIMS à haute résolution spatiale pour la microélectronique et ses applications". Electronic Thesis or Diss., Aix-Marseille, 2021. http://www.theses.fr/2021AIXM0368.

Pełny tekst źródła
Streszczenie:
La spectrométrie de masse d’ion secondaire (SIMS) est probablement la technique d'analyse chimique la plus largement utilisée en science des semi-conducteurs et en métallurgie en raison de sa sensibilité ultime à tous les éléments notamment au plus légers. Avec la réduction de la taille des systèmes, l'imagerie chimique 3D haute résolution devient une condition préalable au développement de nouveaux matériaux. Dans cette thèse, nous rapportons le développement et l’optimisation d'un SIMS innovant implémenté dans un microscope électronique à balayage. L'équipement permet d’obtenir une cartographie chimique élémentaire à très haute résolution (~25nm). La capacité de la technique est démontrée avec la caractérisation à l'échelle nanométrique d’une part de superalliages métalliques nécessaire à la fabrication de pièces moteurs pour l’aviation et d’autre part d’alliages chalcogénures utilisés dans les mémoires à changement de phase de dernière génération développées en microélectronique
Secondary Ion Mass Spectrometry (SIMS) is probably the most widely used chemical analysis technique in semiconductor science and metallurgy because of its ultimate sensitivity to all elements, especially the lighter ones. With systems downsizing, high-resolution 3D chemical imaging is becoming a prerequisite for the development of new materials. In this thesis, we report the development and optimization of an innovative SIMS implemented in a scanning electron microscope. The equipment makes it possible to obtain elementary chemical mapping at very high resolution (~25nm). The capacity of the technique is demonstrated with the characterization at the nanometric scale on the one hand of metallic superalloys necessary for the manufacture of aircraft engine parts and on the other hand of chalcogenide alloys used in the latest generation phase change memories developed in microelectronics
Style APA, Harvard, Vancouver, ISO itp.
10

Huang, Ruomeng. "Confined nanoscale chalcogenide phase change material and memory". Thesis, University of Southampton, 2015. https://eprints.soton.ac.uk/379321/.

Pełny tekst źródła
Streszczenie:
The miniaturization of memory devices has been one of the major driving forces in the exploration of ever faster, smaller and more efficient memory concepts. Among all the competitors for the next generation of non-volatile memory, phase change materials based random access memory has emerged as a leading candidate. A better understanding of nanoscale properties of phase change materials and the ability of selective depositing them into confined nanostructures are substantially important in the long march towards smaller more densely packed memory bits. A novel top-down spacer etch technique has been developed for fabricating sub hundred nanometre phase change Ge2Sb2Te5 nanowires. Taking advantage of this technique which allows precise control over nanowire position and geometries, the contact properties between phase change material and metallic electrode in nanoscale can be quantitatively investigated. The results reveal a specific contact resistance of 7.56 x 10-5.
Style APA, Harvard, Vancouver, ISO itp.
Więcej źródeł

Książki na temat "Phase change memory GST"

1

Redaelli, Andrea, red. Phase Change Memory. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-69053-7.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
2

1976-, Chen Yiran, red. Nonvolatile memory design: Magnetic, resistive, and phase change. Boca Raton, FL: Taylor & Francis, 2012.

Znajdź pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
3

Lan, Rui. Thermophysical Properties and Measuring Technique of Ge-Sb-Te Alloys for Phase Change Memory. Singapore: Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-2217-8.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
4

Durable Phase-Change Memory Architectures. Elsevier, 2020. http://dx.doi.org/10.1016/s0065-2458(20)x0004-0.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
5

Asadinia, Marjan, i Hamid Sarbazi-Azad. Durable Phase-Change Memory Architectures. Elsevier Science & Technology, 2020.

Znajdź pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
6

Asadinia, Marjan, i Hamid Sarbazi-Azad. Durable Phase-Change Memory Architectures. Elsevier Science & Technology Books, 2020.

Znajdź pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
7

Muralimanohar, Naveen, Moinuddin K. Qureshi, Sudhanva Gurumurthi i Bipin Rajendran. Phase Change Memory: From Devices to Systems. Springer International Publishing AG, 2011.

Znajdź pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
8

Qureshi, Moinuddin K., Sudhanva Gurumurthi i Bipin Rajendran. Phase Change Memory: From Devices to Systems. Morgan & Claypool Publishers, 2011.

Znajdź pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
9

Qureshi, Moinuddin K., Sudhanva Gurumurthi i Bipin Rajendran. Phase Change Memory: From Devices to Systems. Morgan & Claypool Publishers, 2011.

Znajdź pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
10

Redaelli, Andrea. Phase Change Memory: Device Physics, Reliability and Applications. Springer, 2018.

Znajdź pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
Więcej źródeł

Części książek na temat "Phase change memory GST"

1

Jeyasingh, Rakesh, Ethan C. Ahn, S. Burc Eryilmaz, Scott Fong i H. S. Philip Wong. "Phase Change Memory". W Emerging Nanoelectronic Devices, 78–109. Chichester, United Kingdom: John Wiley & Sons Ltd, 2014. http://dx.doi.org/10.1002/9781118958254.ch05.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
2

Pirovano, Agostino. "An Introduction on Phase-Change Memories". W Phase Change Memory, 1–10. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-69053-7_1.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
3

Villa, Corrado. "PCM Array Architecture and Management". W Phase Change Memory, 285–311. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-69053-7_10.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
4

Atwood, Gregory. "PCM Applications and an Outlook to the Future". W Phase Change Memory, 313–24. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-69053-7_11.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
5

Ielmini, Daniele. "Electrical Transport in Crystalline and Amorphous Chalcogenide". W Phase Change Memory, 11–39. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-69053-7_2.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
6

Boniardi, Mattia. "Thermal Model and Remarkable Temperature Effects on the Chalcogenide Alloy". W Phase Change Memory, 41–64. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-69053-7_3.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
7

Redaelli, Andrea. "Self-Consistent Numerical Model". W Phase Change Memory, 65–88. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-69053-7_4.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
8

Gleixner, Robert. "PCM Main Reliability Features". W Phase Change Memory, 89–124. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-69053-7_5.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
9

Noé, Pierre, i Françoise Hippert. "Structure and Properties of Chalcogenide Materials for PCM". W Phase Change Memory, 125–79. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-69053-7_6.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
10

Sousa, Véronique, i Gabriele Navarro. "Material Engineering for PCM Device Optimization". W Phase Change Memory, 181–222. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-69053-7_7.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.

Streszczenia konferencji na temat "Phase change memory GST"

1

Jackson, D. C. S., M. Nardone, V. Karpov i I. Karpov. "Relaxation Oscillation in GST-Based Phase Change Memory Devices". W 2009 IEEE International Memory Workshop (IMW). IEEE, 2009. http://dx.doi.org/10.1109/imw.2009.5090605.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
2

Baldo, M., L. Laurin, E. Petroni, G. Samanni, M. Allegra, E. Gomiero, D. Ielmini i A. Redaelli. "Modeling Environment for Ge-rich GST Phase Change Memory Cells". W 2022 IEEE International Memory Workshop (IMW). IEEE, 2022. http://dx.doi.org/10.1109/imw52921.2022.9779290.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
3

Zheng, J. F., P. Chen, W. Hunks, W. Li, J. Cleary, J. Reed, J. Ricker i in. "MOCVD GST for high speed and low current Phase Change Memory". W 2011 11th Annual Non-Volatile Memory Technology Symposium (NVMTS). IEEE, 2011. http://dx.doi.org/10.1109/nvmts.2011.6137102.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
4

Lee, Jaeho, Takashi Kodama, Yoonjin Won, Mehdi Asheghi i Kenneth E. Goodson. "Thermoelectric Characterization of Ge2Sb2Te5 Films for Phase-Change Memory". W ASME 2012 Third International Conference on Micro/Nanoscale Heat and Mass Transfer. American Society of Mechanical Engineers, 2012. http://dx.doi.org/10.1115/mnhmt2012-75092.

Pełny tekst źródła
Streszczenie:
While thermoelectric effects can strongly influence the performance of phase-change memory (PCM), the thermoelectric properties of phase-change materials for thin film structure have received little attention. This work reports the temperature and phase dependent Seebeck coefficient of 25 nm and 125 nm thick Ge2Sb2Te5 (GST) films. The Seebeck coefficient of crystalline GST films varies strongly with film thickness, due to changes in crystallization effect and grain boundary scattering. Electrothermal simulations demonstrate that the measured thermoelectric properties can strongly influence the temperature distribution and figures of merit for PCM devices. These data will facilitate cell optimization of novel phase-change memories.
Style APA, Harvard, Vancouver, ISO itp.
5

Li, Zijian, Jaeho Lee, John P. Reifenberg, Mehdi Asheghi, H. S. Philip Wong i Kenneth E. Goodson. "In-Plane Thermal Conduction and Conductivity Anisotropy in Ge2Sb2Te5 Films for Phase Change Memory". W ASME 2010 International Mechanical Engineering Congress and Exposition. ASMEDC, 2010. http://dx.doi.org/10.1115/imece2010-40459.

Pełny tekst źródła
Streszczenie:
Thermal conduction governs the program/erase speed and power consumption of phase change memory (PCM) devices. This work presents the in-plane thermal conductivity measurement of Ge2Sb2Te5 (GST) films suspended in a microfabricated structure for the amorphous (a-GST), face-centered cubic (f-GST) and hexagonal close packed (h-GST) phases. The unique design of free-standing GST films eliminates the out-of-plane heat loss to the substrate and achieves high sensitivity to lateral heat conduction. The measured in-plane thermal conductivities of GST thin films are 0.18 ± 0.02 Wm−1K−1 for a-GST, 0.49 ± 0.04 Wm−1K−1 for f-GST and 1.03 ± 0.06 Wm−1K−1 for h-GST. The out-of-plane thermal conductivities are measured by using the 3ω technique. We report the in-plane thermal conductivity is 81% of the out-of-plane thermal conductivity for the crystalline phases while no anisotropy is observed for the amorphous phase. The microstructure of the GST thin film is responsible for the direction-dependent thermal conductivities.
Style APA, Harvard, Vancouver, ISO itp.
6

Lee, Jaeho, John P. Reifenberg, Mehdi Asheghi i Kenneth E. Goodson. "High Temperature Thermal Characterization of Ge2Sb2Te5 for Phase Change Memory". W ASME/JSME 2011 8th Thermal Engineering Joint Conference. ASMEDC, 2011. http://dx.doi.org/10.1115/ajtec2011-44230.

Pełny tekst źródła
Streszczenie:
We propose a novel design of Joule heating thermometry to measure thermal properties of Ge2Sb2Te5 (GST) films at temperatures relevant for the switching of phase change memory devices. Vertically stacked micro-fabricated heaters control temperature and measure thermal conductivity of thin films using the 3ω method. The thermal time constant of the experimental structure enables studies of short time scale crystallization and cycling effects for phase change materials. This work reports the thermal conductivity of GST films from the room temperature to above 400 Celsius in amorphous, face-centered cubic, and hexagonal close-packed phases.
Style APA, Harvard, Vancouver, ISO itp.
7

Yang, Yizhang, Taehee Jeong, Hendrik F. Hamann, Jimmy Zhu i Mehdi Asheghi. "Thermal Conductivity Measurements and Modeling of Phase-Change GST Materials". W ASME/JSME 2007 Thermal Engineering Heat Transfer Summer Conference collocated with the ASME 2007 InterPACK Conference. ASMEDC, 2007. http://dx.doi.org/10.1115/ht2007-32830.

Pełny tekst źródła
Streszczenie:
Phase-change technology has been widely used in rewritable disks for optical recording applications. Recently, it has also received attention as a candidate for future high storage density non-volatile random access memory, due to its much longer cycle life (∼1013) and fast data access time (∼100ns) compared with the existing Flash memory technology. In this paper, we present thermal conductivity data and models for phase-change GeSbTe material that would be helpful in performance optimization and improvement in the reliability (i.e., enhancement of data rate, cyclability, control of mark-edge jitter) of phase-change-based data storage devices and systems. We perform the thermal characterization of Ge4Sb1Te5 and Ge2Sb2Te5 phase-change materials for the application of optical recording and phase-change memory cell using the techniques of thermoreflectance and electrical resistance thermometry. The limits of lattice and electronic thermal conductivities are investigated to determine their relative contributions as a function of tellurium concentration at different crystalline structures.
Style APA, Harvard, Vancouver, ISO itp.
8

Song, Yibin, Ruixuan Huang, Yiying Zhang i Haiyang Zhang. "A study of GST etching process for phase change memory application". W 2016 China Semiconductor Technology International Conference (CSTIC). IEEE, 2016. http://dx.doi.org/10.1109/cstic.2016.7464012.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
9

Fantini, A., L. Perniola, M. Armand, J. F. Nodin, V. Sousa, A. Persico, J. Cluzel i in. "Comparative Assessment of GST and GeTe Materials for Application to Embedded Phase-Change Memory Devices". W 2009 IEEE International Memory Workshop (IMW). IEEE, 2009. http://dx.doi.org/10.1109/imw.2009.5090585.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
10

Chao, Der-Sheng, Frederick T. Chen, Yen-Ya Hsu, Wen-Hsing Liu, Chain-Ming Lee, Chih-Wei Chen, Wei-Su Chen, Ming-Jer Kao i Ming-Jinn Tsai. "Multi-level phase change memory using slow-quench operation: GST vs. GSST". W 2009 International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA). IEEE, 2009. http://dx.doi.org/10.1109/vtsa.2009.5159282.

Pełny tekst źródła
Style APA, Harvard, Vancouver, ISO itp.
Możesz być także zainteresowany rozszerzonymi bibliografiami na temat „Phase change memory GST” dla poszczególnych typów źródeł:
Artykuły w czasopismach Rozprawy doktorskie Książki
Oferujemy zniżki na wszystkie plany premium dla autorów, których prace zostały uwzględnione w tematycznych zestawieniach literatury. Skontaktuj się z nami, aby uzyskać unikalny kod promocyjny!

Do bibliografii