Gotowa bibliografia na temat „Neutral point clamp”

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Artykuły w czasopismach na temat "Neutral point clamp"

1

Yue, Yun Tao, and Zhi Yong Xu. "Research on Neutral-Point Balancing for Three-Level Space Voltage Vector Converter." Advanced Materials Research 748 (August 2013): 473–76. http://dx.doi.org/10.4028/www.scientific.net/amr.748.473.

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A novel hybrid clamped dual-PWM three-level converter topology is proposed for induction motor drives in this paper. The switching states of hybrid clamp three-level converters increase to sixty-four from twenty-seven switching states of diode clamp three-level converters. In order to realize optimization of its redundant voltage space vectors by detecting voltage of clamp capacitor and difference of capacitor voltage in DC side, Generating an optimized switching pattern, The hybrid clamped three-level converter increases the voltage levels number, reducing the harmonics associated to the commutation frequency and limiting the dv/dt by all the switches . It can quickly balance the DC voltage, Realized system of 4-Quardant Running. the control circuit and main circuit was designed with DSP and CPLD, experimentation results proved it is very effective and practicability.
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Sha, MaiChao, RuiJin Zhu, and XueJiao Gong. "Fixed frequency Finite Control Set Model Predictive Control For Three-level APF." E3S Web of Conferences 233 (2021): 04028. http://dx.doi.org/10.1051/e3sconf/202123304028.

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Active power filter can compensate harmonic and reactive power, Three level neutral point clamp (ANPC) has the characteristics of low output harmonic and low device loss. The control of three-level active power filter needs to consider multiple objectives. Finite control set model predictive control (FCS-MPC) is a new method which can add constraints and multi-objective control. According to the limit of the switch state, it can track the reference current, which has the characteristics of fast dynamic response and good compensation effect. This method not only keeps the neutral point voltage balance, but also solves the problem of unstable switching frequency.
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Shen, Xianshun, Ge Gao, Yanan Wu, et al. "Control parameters optimization of three-level neutral-point clamp rectifier for EAST low-frequency resonance suppressor." Fusion Engineering and Design 170 (September 2021): 112486. http://dx.doi.org/10.1016/j.fusengdes.2021.112486.

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Tahir, Zuraidi Md, Auzani Jidin, and Mohd Luqman Mohd Jamil. "Multi-carrier switching strategy for high-bandwidth potential balancing control of multilevel inverters." International Journal of Power Electronics and Drive Systems (IJPEDS) 12, no. 4 (2021): 2384. http://dx.doi.org/10.11591/ijpeds.v12.i4.pp2384-2392.

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<span lang="EN-US">This paper confers on investigation of a direct torque control (DTC) of induction motor drive by 3 level neutral point clamp (NPC) multilevel inverter. The imbalance problem may deteriorate the electric drive performances which might cause a short circuit condition. Various balancing control strategies were proposed, however, most of them employed complex space vector modulation (SVM) and hysteresis-based controller that generates variable switching frequencies. The proposed method will offer a reliable balancing control strategy with a constant switching frequency, and moreover, it will provide excellent electric drive performances. This research proposed a new multi carrier switching modulation strategy that establish a high-band-width control for neutral point potential in the NPC inverter. Potency of the proposed high-bandwidth potential balancing strategy is validated through the MATLAB/SIMULINK environment.</span>
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5

Dongsheng Zhou and D. G. Rouaud. "Dead-time effect and compensations of three-level neutral point clamp inverters for high-performance drive applications." IEEE Transactions on Power Electronics 14, no. 4 (1999): 782–88. http://dx.doi.org/10.1109/63.774219.

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Li, Wen-Juan, Ding-Sheng Li, and Jing-Wei Zhang. "Model-Based Design and Experimental Validation of Control System for a Three-Level Inverter." Electronics 11, no. 13 (2022): 1979. http://dx.doi.org/10.3390/electronics11131979.

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Considering the disadvantages of the traditional development pattern in an embedded control system for an inverter, that is, the single-process thinking and separation of software and hardware, a novel method, which is a model-based design, for developing a double closed-loop control system for the diode-clamped three-level inverter was proposed. System control models, including the PWM control algorithm model, the voltage control model, the neutral-point potential balancing model, and the frequency control model, were built with the MATLAB platform. The code-generation capacity and the operation effect were verified through a series of tests. The inverter with diode clamp and neutral-point potential control was developed. Codes were generated automatically and downloaded to the eZdsp28335 control chip. Experimental waveforms of the phase voltage, line voltage and current were analyzed under regulating the voltage and frequency. The experimental results demonstrate that the models and the generated codes are correct. Further studies have proven the feasibility of the system development model.
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7

Abadi, Mohsen Bandar, André Manuel Santos Mendes, and Sérgio Manuel Ângelo Cruz. "Method to diagnose open‐circuit faults in active power switches and clamp‐diodes of three‐level neutral‐point clamped inverters." IET Electric Power Applications 10, no. 7 (2016): 623–32. http://dx.doi.org/10.1049/iet-epa.2015.0644.

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Shojaei, Ali, Bahram Najafi, and Hani Vahedi. "Standalone Operation of Modified Seven-Level Packed U-Cell (MPUC) Single-Phase Inverter." Electronics 8, no. 3 (2019): 268. http://dx.doi.org/10.3390/electronics8030268.

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In this paper the standalone operation of the modified seven-level Packed U-Cell (MPUC) inverter is presented and analyzed. The MPUC inverter has two DC sources and six switches, which generate seven voltage levels at the output. Compared to cascaded H-bridge and neutral point clamp multilevel inverters, the MPUC inverter generates a higher number of voltage levels using fewer components. The experimental results of the MPUC prototype validate the appropriate operation of the multilevel inverter dealing with various load types including motor, linear, and nonlinear ones. The design considerations, including output AC voltage RMS value, switching frequency, and switch voltage rating, as well as the harmonic analysis of the output voltage waveform, are taken into account to prove the advantages of the introduced multilevel inverter.
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Martins Bezerra, Pedro André, Florian Krismer, Johann Walter Kolar, et al. "Experimental Efficiency Evaluation of Stacked Transistor Half-Bridge Topologies in 14 nm CMOS Technology." Electronics 10, no. 10 (2021): 1150. http://dx.doi.org/10.3390/electronics10101150.

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Different Half-Bridge (HB) converter topologies for an Integrated Voltage Regulator (IVR), which serves as a microprocessor application, were evaluated. The HB circuits were implemented with Stacked Transistors (HBSTs) in a cutting-edge 14 nm CMOS technology node in order to enable the integration on the microprocessor die. Compared to a conventional realization of the HBST, it was found that the Active Neutral-Point Clamped (ANPC) HBST topology with Independent Clamp Switches (ICSs) not only ensured balanced blocking voltages across the series-connected transistors, but also featured a more robust operation and achieved higher efficiencies at high output currents. The IVR achieved a maximum efficiency of 85.3% at an output current of 300 mA and a switching frequency of 50 MHz. At the maximum measured output current of 780 mA, the efficiency was 83.1%. The active part of the IVR (power switches, gate-drivers, and level shifters) realized a high maximum current density of 24.7 A/mm2.
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10

Sagot, J. C., C. Amoros, V. Candas, and J. P. Libert. "Sweating responses and body temperatures during nocturnal sleep in humans." American Journal of Physiology-Regulatory, Integrative and Comparative Physiology 252, no. 3 (1987): R462—R470. http://dx.doi.org/10.1152/ajpregu.1987.252.3.r462.

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The changes in the central control of sweating were investigated in five sleeping subjects under neutral and warm conditions [operative temperature (To) = 30, 33, and 34 degrees C; dew-point temperature = 10 degrees C]. Esophageal (Tes) and mean skin (Tsk) temperatures, chest sweat rate (msw,1), and concomitant electroencephalographic data were recorded. Throughout the night, msw,1 was measured under a local thermal clamp of 38 degrees C. Results showed that the thermal environment exerted a strong influence on both the levels and the time patterns of body temperatures. Moreover, local sweating rate correlated positively with Tes, and this relationship varied according to sleep stages. For a given Tes level, there was a sleep stage-related gradation in msw,1 that was higher in slow-wave sleep (SWS) than in stage 1-2 and the lowest in rapid-eye-movement (REM) sleep. This is explained by a change in the excitability or the sensitivity of the thermoregulatory system. The msw,1 differences between stage 1-2 and SWS are accounted for by a decrease in the Tes threshold (Tset) for sweating while the slope of the msw,1-Tes relation remains unchanged. The lower msw,1 in REM sleep is explained by a lesser slope for the msw,1-Tes relation without any Tset change from stage 1-2.
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