Rozprawy doktorskie na temat „Neuromorphic applications”

Les nanodispositifs spintroniques, qui exploitent à la fois les propriétés magnétiques et électriques des électrons, apportent diverses caractéristiques intéressantes et prometteuses pour le calcul neuromorphique. Les textures magnétiques, telles que les parois de domaine et les skyrmions, sont particulièrement intrigantes en tant que composants neuromorphiques, car elles peuvent prendre en charge différentes fonctionnalités grâce à la richesse de leurs mécanismes physiques. La façon dont la dynamique des skyrmions peut être utilisée pour construire du matériel neuromorphique économe en énergie, et comment l'apprentissage profond peut aider à réaliser des tests et des validations rapides et précis des propositions constituent les sujets centraux de cette thèse. Les principales contributions et innovations de cette thèse peuvent être résumées comme suit : 1. Études numériques et théoriques sur la dynamique des skyrmions dans les nanostructures confinées. Nous explorons la dynamique des skyrmions en termes de taille, de vitesse, d'énergie et de stabilité dans une nanopiste dont la largeur varie. Nous avons constaté que des skyrmions de petite taille pouvaient être obtenus en utilisant cette structure asymétrique. Nous obtenons également un compromis entre la largeur de la nanopiste (densité de stockage) et la vitesse de mouvement du skyrmion (vitesse d'accès aux données). Nous étudions la dynamique du skyrmion sous excitation de tension par l'effet d'anisotropie magnétique contrôlé par la tension dans un film mince circulaire. Nous constatons que le skyrmion respirant peut être analogisé comme un modulateur. Ces résultats pourraient nous aider à concevoir des dispositifs neuromorphiques efficaces. 2. Applications des dispositifs basés sur le skyrmion pour l'informatique neuromorphique. Nous présentons un dispositif compact de neurones de dopage Leaky-Integrate-Fire en exploitant la dynamique du skyrmion entraînée par le courant dans un nanotrack cunéiforme. Nous proposons un générateur de nombres aléatoires véritables basé sur le mouvement brownien thermique continu du skyrmion dans une géométrie confinée à température ambiante. Notre conception est prometteuse pour les systèmes de calcul neuromorphique émergents à faible puissance, tels que les réseaux neuronaux à impulsions et les réseaux neuronaux de calcul stochastique/probabiliste.3. Une approche axée sur les données pour la modélisation des systèmes physiques dynamiques basée sur les équations différentielles ordinaires (ODE) neuronales. Nous montrons que les formalismes adaptés des ODEs neurales, conçus pour la spintronique, peuvent prédire avec précision le comportement d'un nanodispositif non idéal, y compris le bruit, après entraînement sur un ensemble minimal de simulations micromagnétiques ou de données expérimentales, avec de nouvelles entrées et de nouveaux paramètres matériels n'appartenant pas aux données d'entraînement. Grâce à cette stratégie de modélisation, nous pouvons effectuer des tâches de calcul plus complexes, telles que les prédictions de séries temporelles Mackey-Glass et la reconnaissance de chiffres parlés, en utilisant les modèles entraînés de systèmes spintroniques, avec une précision élevée et une vitesse rapide par rapport aux simulations micromagnétiques conventionnelles<br>Spintronics nanodevices, which exploit both the magnetic and electrical properties of electrons, have emerged to bring various exciting characteristics promising for neuromorphic computing. Magnetic textures, such as domain walls and skyrmions, are particularly intriguing as neuromorphic components because they can support different functionalities due to their rich physical mechanisms. How the skyrmion dynamics can be utilized to build energy efficient neuromorphic hardware, and how deep learning can help achieve fast and accurate tests and validations of the proposals form the central topics of this thesis. The major contributions and innovations of this thesis can be summarized as follows: 1. Numerical and theoretical studies on skyrmion dynamics in confined nanostructures. We explore the skyrmion dynamics in terms of size, velocity, energy, and stability in a width-varying nanotrack. We found nanoscale skyrmion with small sizes could be obtained by employing this asymmetric structure. We also obtain a tradeoff between the nanotrack width (storage density) and the skyrmion motion velocity (data access speed). We study the skyrmion dynamics under voltage excitation through the voltage-controlled magnetic anisotropy effect in a circular thin film. We find that the breathing skyrmion can be analogized as a modulator. These findings could help us design efficient neuromorphic devices. 2. Skyrmion based device applications for neuromorphic computing. We present a compact Leaky-Integrate-Fire spiking neuron device by exploiting the current-driven skyrmion dynamics in a wedge-shaped nanotrack. We propose a True random number generators based on continuous skyrmion thermal Brownian motion in a confined geometry at room temperature. Our design are promising in emerging low power neuromorphic computing system, such as spiking neural network and stochastic/ probabilistic computing neuron network.3. A data-driven approach for modeling dynamical physical systems based on the Neural Ordinary Differential Equations (ODEs). We show that the adapted formalisms of Neural ODEs, designed for spintronics, can accurately predict the behavior of a non-ideal nanodevice, including noise, after training on a minimal set of micromagnetic simulations or experimental data, with new inputs and material parameters not belonging to the training data. With this modeling strategy, we can perform more complicated computational tasks, such as Mackey-Glass time-series predictions and spoken digit recognition, using the trained models of spintronic systems, with high accuracy and fast speed compared to conventional micromagnetic simulations

Electronic machines and computers have experienced a huge development during the last four decades, mainly thanks to the continuous scaling down of the hardware responsible of information processing and storage (i.e. transistors). However, as the size of these devices approaches inter-atomic distances, the fabrication costs increase exponentially. In order to solve this problem, the industry has started to consider new system architectures and hardware for processing and storing information. Inspired by nature, scientists and engineers have focused their attention on the human brain, which is the most powerful system known. The human brain can easily perform an infinity of operations that computers cannot do, it can naturally learn by adapting its physical structure, and it consumes much less energy. The reason is that human brains use a very sophisticated and dense neural network that process and stores the information in parallel. This massive parallelism is the genuine feature that even the most powerful computers developed to date cannot match, as they all rely in an architecture that process and stores information independently, creating a bottleneck that limits their performance. Therefore, emulating the functioning of the human brain using electronic circuits is extremely important, and it has become an obsession for the biggest enterprises. The first artificial neural networks for artificial intelligence (AI) systems relied on the use of field effect transistors, as they has been the basis of all modern electronic devices. However, recent studies indicate that memristors may be more suitable to emulate the interaction between neurons. More specifically, two neurons interact to each other through a synapse, which is a thin membrane that change its resistivity based on the electrical impulses released by the two neurons. The structure and working principle of synapses is strikingly similar to that of memristors, which moreover show the advantage of a simpler structure and a lower fabrication cost compared to transistors. However, not all memristors are suitable for emulating biological synapses. Most traditional memristors change their resistivity between two different states when a specific electrical impulse is applied. However, synapses change their resistivity with the time in a dynamic way, following some specific learning rules. In this PhD thesis I carry out a deep study about resistive switching in different materials, and I fabricate memristive devices that can accurately resemble several synaptic behaviors. One of the most innovative aspect of my investigation is that I use a new dielectric material (called hexagonal boron nitride) that holds a layered structure, and thanks to it my memristors show several properties never observed before. For example, Au/Ti/h-BN/Cu devices exhibit the coexistence of bipolar and threshold RS, which can be controlled by using different current limitations. The devices do not require forming process, due to the present of native defects in the h-BN stack during the growth. Doping the Cu substrate with Ni results in a lower amount of native defects, which reduces the current in high resistive state (but these devices require the use of a forming process). For both Cu and Ni-doped Cu electrodes, the current ON/OFF ratio can be improved by increasing the thickness of the h-BN stack. In Au/Ti/graphene/h-BN/graphene/Au devices the switching voltages increase and the currents in high resistive state are smaller than in the devices without graphene. The most probable reason for this observation is that multilayer graphene can block and slow down the migration of ions between the h-BN and the electrodes. Metal/h-BN/metal electronic synapses show an unprecedented relaxation process with very low variability in hundreds of cycles, and the power consumption is very low in both standby and volatile regime (i.e. 0.1 fW and 600 pW, respectively).<br>El cerebro humano puede realizar de forma sencilla infinidad de operaciones que los ordenadores no pueden hacer, pueden aprender naturalmente adaptando su estructura física, y consumen mucho menos energía. La razón es que el cerebro humano usa una sofisticada y muy densa red neuronal que procesa y almacena la información en paralelo. Este masivo paralelismo es la genuina característica que los ordenadores no pueden igualar, ya que éstos procesan y almacenan la información en unidades distintas, creando un embudo que limita sus prestaciones. Por lo tanto, emular el funcionamiento del cerebro utilizando componentes electrónicos es extremadamente importante, y se ha convertido en la obsesión de las mayores empresas. Las primeras redes neuronales artificiales para el desarrollo de inteligencia artificial están basadas en transistores, ya que éstos han sido la base de todos los dispositivos electrónicos modernos. Sin embargo, estudios recientes indican que los memristores podrían ser más idóneos para emular la interacción entre neuronas. En concreto, dos neuronas interactúan entre ellas a través de sinapsis, es decir, finas membranas que cambian su resistividad dependiendo de los impulsos eléctricos emitidos por las dos neuronas. La estructura y principio de funcionamiento de una sinapsis es muy similar al de un memristor, el cual presenta la ventaja de tener una estructura más simple y un coste de fabricación más bajo que un transistor. En esta tesis doctoral hemos desarrollado memristores avanzados utilizando materiales bidimensionales, como el grafeno y, especialmente, el nitruto de boto hexagonal con estructura multicapa. Nuestros experimentos y simulaciones indican que los dispositivos metal/h-BN/metal pueden ser utilizados como sinapsis electrónicas, ya que muestran comportamientos sinápticos en un único dispositivo. En nuestros dispositivos hemos observado short term plasticity, long term plasticity, spike timing dependent plasticity, y synapse relaxation. El régimen de funcionamiento puede ser controlado modificando la amplitud, duración e intervalo entre los pulsos aplicados. Además, las sinapsis electrónicas hechas mediante estructuras metal/h-BN/metal muestran un proceso de relajación muy repetitivo y con una baja variabilidad nunca observada anteriormente. Además, el consumo de potencia es muy bajo tanto en reposo (0.1 fW) como en modo volátil (600 pW).

La present tesi recull els resultats de la recerca orientada a aportar una metodologia de caracterització elèctrica, modelat i simulació per a dispositius de commutació resistiva, quan es consideren aplicacions de computació neuromòrfica basades en aprenentatge no-supervisat, àmpliament demandades en l’actualitat com a solució de baix consum a les següents problemàtiques: per una banda, la limitació de la velocitat en la transferència de dades entre les unitats de memoria i processament que té lloc en les arquitectures de computador convencional (von Neumann). Per altra banda, la necessitat creixent de sistemes computacionals que realitzin tasques de classificació, anàlisi i inferència de quantitats massives de dades (per exemple, per a aplicacions de Big Data), junt amb tasques de detecció de patrons, predicció de comportaments i presa de decisions (aplicacions enfocades a Internet-of-Things, entre d’altres). En concret, s’investiguen els dispositius Oxide-based Resistive Random Access Memory (OxRAM) com a candidats per a la implementació electrònica de sinapsis en xarxes neuronals artificials físiques, altrament anomenades arquitectures neuromòrfiques. En primer lloc, es presenta una introducció teòrica a les diferents tecnologies electròniques amb propietats de commutació resistiva i memòria no volàtil, junt amb les figures de mèrit de cadascuna d’aquestes, tan demostrades com projectades segons l’International Roadmap for Devices and Systems de 2018. Amb aquest primer capítol, es pretén proveïr al lector de les bases necessàries per a poder comprendre els resultats exposats en els següents capítols. A continuació i mitjançant un enfocament bottom-up dividit en tres capítols, es tracten els procediments i resultats de la caracterització elèctrica i modelat dels dispositius estudiats per a la implementació de sinapsis electròniques analògiques. Com a punt de partida, es verifica experimentalment que els dispositius compleixen els requisits necessaris per a l’aplicació indicada. Al següent capítol, es demostren de forma experimental dues regles d’aprenentatge fonamentals per a poder executar algorismes d’aprenentatge autònoms (no supervisats) sobre una arquitectura neuromòrfica basada en els dispositius analitzats. Les regles d’aprenentatge demostrades permeten que els dispositius emulin procesos i mecanismes d’aprenentatge reportats en el camp de les neurociències, tals com la dependència temporal de la plasticitat, o el fenòmen de condicionament clàssic, per al qual es replica l’experiment dels gossos de Pavlov, permetent establir els fonaments de l’aprenentatge associatiu en dos o més dispositius. Per a concloure aquesta part relativa a les sinapsis electròniques analògiques, es proposa l’adaptació hardware d’un algorisme d’aprenentatge no supervisat. L’algorisme dissenyat permet que el sistema organitzi les seves connexions de forma autònoma i no supervisada, de tal manera que, un cop entrenada, la xarxa neuronal física mostri una organització topogràfica a la seva capa de sortida, que és característica de les regions del cervell biològic dedicades al processament de la informació sensorial. A més, el disseny del sistema permet concatenar diverses xarxes neuronals per a poder executar tasques cognitives de naturalesa més complexa, tals com l’associació de diferents atributs a un mateix concepte, permetent la computació jeràrquica. L’últim capítol està dedicat a l’estudi de dispositius OxRAM quan es considera un mode d’operació de baix consum, per a la implementació de sinapsis binàries. De nou, amb una perspectiva bottom-up, es parteix de la caracterització elèctrica i modelat dels dispositius, que en aquest cas constitueixen un xip neuromòrfic. Es verifica una regla d’aprenentatge probabilística, que després s’empra en un algorisme d’aprenentatge no supervisat dissenyat per a la inferència i predicció de seqüències periòdiques. Per acabar, es discuteixen les diferències i similituds entre els dos algorismes descrits a la tesi, i es proposa com es poden fer servir cadascun d’aquests de forma conjunta i complementària.<br>The present thesis compiles the results of the research oriented to provide a methodology for the electrical characterization, modeling and simulation of resistive switching devices, taking into consideration neuromorphic applications based on unsupervised learning This is widely demanded today as a low-consumption solution to the following issues: on the one hand, the speed limitations that take place in data transfer between the memory and processing units that takes place in conventional computer architectures. On the other hand, the growing need for low-power computational systems that perform tasks of classification, analysis and inference of massive amounts of data (for example, for Big Data applications), together with pattern recognition, prediction of behaviors and decision-making tasks (for applications focused on Internet-of-Things, among others). Specifically, Oxide-based Resistive Random Access Memory (OxRAM) devices are investigated as candidates for the electronic implementation of synapses in physical artificial neural networks, also referred to as neuromorphic architectures. First of all, a theoretical introduction to the different electronic technologies with resistive switching and non-volatile memory properties is provided. The figures of merit demonstrated and projected of each one of them are indicated according to the International Roadmap for Devices and Systems of 2018. With this first chapter, the intention is to provide the reader with the necessary background required to understand the results outlined in the following chapters. Next, and by using a bottom-up approach divided into the three following chapters, the procedures and results of the electrical characterization and modeling of the OxRAM devices studied for the implementation of analog electronic synapses are discussed. As a starting point, it is experimentally verified that the devices meet the requirements for the indicated application. In the following chapter, two fundamental learning rules are demonstrated experimentally in order to permit the execution of an autonomous (unsupervised) learning algorithm on a neuromorphic architecture based on the tested devices. The proven learning rules allow the devices to emulate certain processes and learning mechanisms reported in the neuroscience field, such as spike-timing dependent plasticity, or the classical conditioning phenomenon, for which Pavlov’s dog experiment is replicated as to establish the foundations of associative learning, to be implemented between two or more synaptic devices. To conclude this part related to analog electronic synapses, the hardware adaptation of an unsupervised learning algorithm is proposed. The designed algorithm provides the system with the property of self-organization, in such a way that, once trained, the physical neuronal network shows a topographical organization in its output layer, which is characteristic of the sensory processing areas of the biological brain. Furthermore, the proposed design and algorithm allow the concatenation of several neuronal networks, in order to execute cognitive tasks of a more complex nature, such as the association of different attributes to the same concept, related to hierarchical computation. The last chapter is dedicated to the study of OxRAM devices when a low-power mode is considered, for the implementation of binary synapses. Again using a bottom-up perspective, the chapter begins with the electrical characterization and modeling of the devices, which in this case constitute a neuromorphic chip. A probabilistic learning rule is demonstrated, which is then used in an unsupervised on-line learning algorithm designed for the inference and prediction of periodic temporal sequences. Finally, the differences and similarities between the two algorithms described in the thesis are discussed, and a proposal is made as to how each of these can be used in a joint and complementary way.

Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2010.<br>Committee Chair: Paul Hasler; Committee Member: Christopher Rozell; Committee Member: David Anderson. Part of the SMARTech Electronic Thesis and Dissertation Collection.

In the last decade a large scientific community has focused on the study of the memristor. The memristor is thought to be by many the best alternative to CMOS technology, which is gradually showing its flaws. Transistor technology has developed fast both under a research and an industrial point of view, reducing the size of its elements to the nano-scale. It has been possible to generate more and more complex machinery and to communicate with that same machinery thanks to the development of programming languages based on combinations of boolean operands. Alas as shown by Moore’s law, the steep curve of implementation and of development of CMOS is gradually reaching a plateau. It is clear the need of studying new elements that can combine the efficiency of transistors and at the same time increase the complexity of the operations. Memristors can be described as non-linear resistors capable of maintaining memory of the resistance state that they reached. From their first theoretical treatment by Professor Leon O. Chua in 1971, different research groups have devoted their expertise in studying the both the fabrication and the implementation of this new promising technology. In the following thesis a complete study on memristors and memristive elements is presented. The road map that characterizes this study departs from a deep understanding of the physics that govern memristors, focusing on the HP model by Dr. Stanley Williams. Other devices such as phase change memories (PCMs) and memristive biosensors made with Si nano-wires have been studied, developing emulators and equivalent circuitry, in order to describe their complex dynamics. This part sets the first milestone of a pathway that passes trough more complex implementations such as neuromorphic systems and neural networks based on memristors proving their computing efficiency. Finally it will be presented a memristror-based technology, covered by patent, demonstrating its efficacy for clinical applications. The presented system has been designed for detecting and assessing automatically chronic wounds, a syndrome that affects roughly 2% of the world population, through a Cellular Automaton which analyzes and processes digital images of ulcers. Thanks to its precision in measuring the lesions the proposed solution promises not only to increase healing rates, but also to prevent the worsening of the wounds that usually lead to amputation and death.

Rapid advances in machine learning have made information analysis more efficient than ever before. However, to extract valuable information from trillion bytes of data for learning and decision-making, general-purpose computing systems or cloud infrastructures are often deployed to train a large-scale neural network, resulting in a colossal amount of resources in use while themselves exposing other significant security issues. Among potential approaches, the neuromorphic architecture, which is not only amenable to low-cost implementation, but can also deployed with in-memory computing strategy, has been recognized as important methods to accelerate machine intelligence applications. In this dissertation, theoretical and practical properties of a hybrid neural computing architecture are introduced, which utilizes a dynamic reservoir having the short-term memory to enable the historical learning capability with the potential to classify non-separable functions. The hybrid neural computing architecture integrates both spatial and temporal processing structures, sidestepping the limitations introduced by the vanishing gradient. To be specific, this is made possible through four critical features: (i) a feature extractor built based upon the in-memory computing strategy, (ii) a high-dimensional mapping with the Mackey-Glass neural activation, (iii) a delay-dynamic system with historical learning capability, and (iv) a unique learning mechanism by only updating readout weights. To support the integration of neuromorphic architecture and deep learning strategies, the first generation of delay-feedback reservoir network has been successfully fabricated in 2017, better yet, the spatial-temporal hybrid neural network with an improved delay-feedback reservoir network has been successfully fabricated in 2020. To demonstrate the effectiveness and performance across diverse machine intelligence applications, the introduced network structures are evaluated through (i) time series prediction, (ii) image classification, (iii) speech recognition, (iv) modulation symbol detection, (v) radio fingerprint identification, and (vi) clinical disease identification.<br>Doctor of Philosophy<br>Deep learning strategies are the cutting-edge of artificial intelligence, in which the artificial neural networks are trained to extract key features or finding similarities from raw sensory information. This is made possible through multiple processing layers with a colossal amount of neurons, in a similar way to humans. Deep learning strategies run on von Neumann computers are deployed worldwide. However, in today's data-driven society, the use of general-purpose computing systems and cloud infrastructures can no longer offer a timely response while themselves exposing other significant security issues. Arose with the introduction of neuromorphic architecture, application-specific integrated circuit chips have paved the way for machine intelligence applications in recently years. The major contributions in this dissertation include designing and fabricating a new class of hybrid neural computing architecture and implementing various deep learning strategies to diverse machine intelligence applications. The resulting hybrid neural computing architecture offers an alternative solution to accelerate the neural computations required for sophisticated machine intelligence applications with a simple system-level design, and therefore, opening the door to low-power system-on-chip design for future intelligence computing, what is more, providing prominent design solutions and performance improvements for internet of things applications.

L'ingénierie neuromorphique aborde de manière bio-inspirée le design des capteurs et ordinateurs. Elle prône l'imitation du vivant à l'échelle du transistor, afin de rivaliser avec la robustesse et la faible consommation des systèmes biologiques. Les caméras évènementielles ont vu le jour dans ce cadre. Elles possèdent des pixels indépendants qui détectent de manière asynchrone les changements dans leur champ visuel, avec une grande précision temporelle. Ces propriétés étant mal exploitées par les algorithmes usuels de vision par ordinateur, un nouveau paradigme encourageant de petits calculs à chaque évènement a été développé. Cette approche témoigne d'un potentiel à la fois pour la vision par ordinateur et en tant que modèle biologique. Cette thèse explore la vision par ordinateur évènementielle, afin de mieux comprendre notre système visuel et identifier des applications. Nous approchons le problème par la couleur, un aspect peu exploré des capteurs évènementiels. Nous présentons un cadriciel supportant les évènements couleur, ainsi que deux dispositifs expérimentaux l'utilisant : une caméra couleur évènementielle et un système pour la psychophysique visuelle destiné à l'étude du temps précis dans le cerveau. Nous considérons l'application du capteur couleur à la méthode de génie génétique Brainbow, et présentons un modèle mathématique de cette dernière<br>Neuromorphic engineering is a bio-inspired approach to sensors and computers design. It aims to mimic biological systems down to the transistor level, to match their unparalleled robustness and power efficiency. In this context, event-based vision sensors have been developed. Unlike conventional cameras, they feature independent pixels which asynchronously generate an output upon detecting changes in their field of view, with high temporal precision. These properties are not leveraged by conventional computer vision algorithms, thus a new paradigm has been devised. It advocates short calculations performed on each event to mimic the brain, and shows promise both for computer vision and as a model of biological vision. This thesis explores event-based computer vision to improve our understanding of visual perception and identify potential applications. We approach the issue through color, a mostly unexplored aspect of event-based sensors. We introduce a framework supporting color events, as well as two experimental devices leveraging it: a three-chip event-based camera performing absolute color measurements, and a visual psychophysics setup to study the role of precise-timing in the brain. We explore the possibility to apply the color sensor to the genetic engineering Brainbow method, and present a new mathematical model for the latter

La croissance exponentielle des données au cours des dernières années a entraîné une augmentation significative de la consommation d'énergie, créant ainsi un besoin urgent de technologies de mémoire innovantes pour surmonter les limitations des solutions conventionnelles. Cette inondation de données a entraîné une augmentation prévue de la consommation dans les centres de données, avec une multiplication par quatre des données d'ici 2025 par rapport au volume actuel. Pour relever ce défi, des technologies de mémoire émergentes telles que la RRAM (RAM résistive), la PCM (mémoire à changement de phase) et la MRAM (RAM magnéto-résistive) sont en cours de développement pour offrir une haute densité, des temps d'accès rapides et une non-volatilité, révolutionnant ainsi les solutions de stockage et de mémoire (Molas &amp; Nowak, 2021).Une technique prometteuse pour répondre au besoin de technologies de mémoire innovantes est l'utilisation de la modulation de fréquence pour moduler la résistance dans la PCM, qui est un aspect crucial de son utilisation en informatique neuromorphique. La PCM est une technologie de mémoire non volatile basée sur la transition de phase réversible entre les phases amorphe et cristalline de certains matériaux. La capacité de modifier les niveaux de conductance rend la PCM bien adaptée aux réalisations synaptiques en informatique neuromorphique. La cristallisation progressive du matériau à changement de phase et l'augmentation subséquente de la conductance du dispositif permettent à la PCM d'être utilisée dans des applications neuromorphiques. De plus, des réseaux neuronaux basés sur la mémoire PCM ont été développés, et l'effet de dérive de la résistance dans la PCM a été quantifié, ouvrant de nouvelles voies pour le développement d'accélérateurs neuromorphiques à base de memristors PCM. De plus, la modulation de fréquence a été identifiée comme une technique prometteuse pour moduler la résistance dans la PCM. Cette approche peut être appliquée à la PCM ainsi qu'à la RRAM, et on s'attend à ce qu'elle produise des effets d'apprentissage améliorés dans des réseaux plus complexes utilisant des cellules multi-niveaux (Wang et al., 2011). L'objectif principal de cette thèse est d'explorer des méthodes innovantes pour contrôler les niveaux de résistance dans les dispositifs PCM en mettant l'accent sur leur application dans les systèmes neuromorphiques. La recherche implique une compréhension approfondie des mécanismes sous-jacents aux dispositifs PCM et une identification des paramètres susceptibles d'influencer la fiabilité de ces dispositifs. De plus, la thèse vise à proposer une nouvelle approche pour moduler efficacement les niveaux de résistance dans les dispositifs PCM, contribuant ainsi aux avancées dans ce domaine<br>The exponential growth of data in recent years has led to a significant increase in energy consumption, creating a pressing need for innovative memory technologies to overcome the limitations of conventional solutions. This data deluge has resulted in a forecasted consumption surge in data centers, with an expected fourfold increase in data by 2025 compared to the present volume. To address this challenge, emerging memory technologies such as RRAM (Resistive RAM), PCM (Phase-Change Memory), and MRAM (Magnetoresistive RAM) are being developed to offer high density, fast access times, and non-volatility, thereby revolutionizing storage and memory solutions (Molas &amp; Nowak, 2021).One promising technique to address the need for innovative memory technologies is the use of frequency modulation to modulate resistance in PCM which is a crucial aspect of its use in neuromorphic computing. PCM is a non-volatile memory technology based on the reversible phase transition between amorphous and crystalline phases of certain materials. The ability to alter conductance levels makes PCM well-suited for synaptic realizations in neuromorphic computing. The progressive crystallization of the phase-change material and the subsequent increase in device conductance enable PCM to be used in neuromorphic applications. Additionally, PCM-based memristor neural networks have been developed, and the resistance drift effect in PCM has been quantified, opening up new paths for the development of PCM-based memristor neuromorphic accelerators. Furthermore, frequency modulation has been identified as a promising technique to modulate resistance in PCM. This approach can be applied to PCM as well as RRAM, and it is expected to yield improved learning effects in more complex networks using multi-level cells (Wang et al., 2011). The primary aim of this thesis is to explore innovative methods for controlling resistance levels in PCM devices with a focus on their application in neuromorphic systems. The research involves a comprehensive understanding of the mechanisms underlying PCM devices and an identification of parameters that may influence the reliability of these devices. Additionally, the thesis aims to propose a novel approach to effectively modulate resistance levels in PCM devices, contributing to advancements in this field

Dans cette thèse, nous étudions les applications potentielles des nano-dispositifs mémoires émergents dans les architectures de calcul. Nous montrons que des architectures neuro-inspirées pourraient apporter l'efficacité et l'adaptabilité nécessaires à des applications de traitement et de classification complexes pour la perception visuelle et sonore. Cela, à un cout moindre en termes de consommation énergétique et de surface silicium que les architectures de type Von Neumann, grâce à une utilisation synaptique de ces nano-dispositifs. Ces travaux se focalisent sur les dispositifs dit "memristifs", récemment (ré)-introduits avec la découverte du memristor en 2008 et leur utilisation comme synapse dans des réseaux de neurones impulsionnels. Cela concerne la plupart des technologies mémoire émergentes : mémoire à changement de phase - "Phase-Change Memory" (PCM), "Conductive-Bridging RAM" (CBRAM), mémoire résistive - "Resistive RAM" (RRAM)... Ces dispositifs sont bien adaptés pour l'implémentation d'algorithmes d'apprentissage non supervisés issus des neurosciences, comme "Spike-Timing-Dependent Plasticity" (STDP), ne nécessitant que peu de circuit de contrôle. L'intégration de dispositifs memristifs dans des matrices, ou "crossbar", pourrait en outre permettre d'atteindre l'énorme densité d'intégration nécessaire pour ce type d'implémentation (plusieurs milliers de synapses par neurone), qui reste hors de portée d'une technologie purement en "Complementary Metal Oxide Semiconductor" (CMOS). C'est l'une des raisons majeures pour lesquelles les réseaux de neurones basés sur la technologie CMOS n'ont pas eu le succès escompté dans les années 1990. A cela s'ajoute la relative complexité et inefficacité de l'algorithme d'apprentissage de rétro-propagation du gradient, et ce malgré tous les aspects prometteurs des architectures neuro-inspirées, tels que l'adaptabilité et la tolérance aux fautes. Dans ces travaux, nous proposons des modèles synaptiques de dispositifs memristifs et des méthodologies de simulation pour des architectures les exploitant. Des architectures neuro-inspirées de nouvelle génération sont introduites et simulées pour le traitement de données naturelles. Celles-ci tirent profit des caractéristiques synaptiques des nano-dispositifs memristifs, combinées avec les dernières avancées dans les neurosciences. Nous proposons enfin des implémentations matérielles adaptées pour plusieurs types de dispositifs. Nous évaluons leur potentiel en termes d'intégration, d'efficacité énergétique et également leur tolérance à la variabilité et aux défauts inhérents à l'échelle nano-métrique de ces dispositifs. Ce dernier point est d'une importance capitale, puisqu'il constitue aujourd'hui encore la principale difficulté pour l'intégration de ces technologies émergentes dans des mémoires numériques.

Les réseaux de neurones artificiels constituent des systèmes alternatifs pour effectuer des calculs complexes, ainsi que pour contribuer à l'étude des systèmes neuronaux biologiques. Ils sont capables de résoudre des problèmes complexes, tel que la prédiction de signaux chaotiques, avec des performances à l'état de l'art. Cependant, la compréhension du fonctionnement des réseaux de neurones dans la résolution de problèmes comme la prédiction reste vague ; l'analogie avec une boîte-noire est souvent employée. En combinant la théorie des systèmes dynamiques non linéaires avec celle de l'apprentissage automatique (Machine Learning), nous avons développé un nouveau concept décrivant à la fois le fonctionnement des réseaux neuronaux ainsi que les mécanismes à l'œuvre dans leurs capacités de prédiction. Grâce à ce concept, nous avons pu imaginer un processeur neuronal hybride composé d'un réseaux de neurones et d'une mémoire externe. Nous avons également identifié les mécanismes basés sur la synchronisation spatio-temporelle avec lesquels des réseaux neuronaux aléatoires récurrents peuvent effectivement fonctionner, au-delà de leurs états de point fixe habituellement utilisés. Cette synchronisation a entre autre pour effet de réduire l'impact de la dynamique régulière spontanée sur la performance du système. Enfin, nous avons construit physiquement un réseau récurrent à retard dans un montage électro-optique basé sur le système dynamique d'Ikeda. Celui-ci a dans un premier temps été étudié dans le contexte de la dynamique non-linéaire afin d'en explorer certaines propriétés, puis nous l'avons utilisé pour implémenter un processeur neuromorphique dédié à la prédiction de signaux chaotiques<br>Artificial neural networks are systems prominently used in computation and investigations of biological neural systems. They provide state-of-the-art performance in challenging problems like the prediction of chaotic signals. Yet, the understanding of how neural networks actually solve problems like prediction remains vague; the black-box analogy is often employed. Merging nonlinear dynamical systems theory with machine learning, we develop a new concept which describes neural networks and prediction within the same framework. Taking profit of the obtained insight, we a-priori design a hybrid computer, which extends a neural network by an external memory. Furthermore, we identify mechanisms based on spatio-temporal synchronization with which random recurrent neural networks operated beyond their fixed point could reduce the negative impact of regular spontaneous dynamics on their computational performance. Finally, we build a recurrent delay network in an electro-optical setup inspired by the Ikeda system, which at first is investigated in a nonlinear dynamics framework. We then implement a neuromorphic processor dedicated to a prediction task

La recherche dans le domaine de l'informatique neuro-inspirée suscite beaucoup d'intérêt depuis quelques années. Avec des applications potentielles dans des domaines tels que le traitement de données à grande échelle, la robotique ou encore les systèmes autonomes intelligents pour ne citer qu'eux, des paradigmes de calcul bio-inspirés sont étudies pour la prochaine génération solutions informatiques (post-Moore, non-Von Neumann) ultra-basse consommation. Dans ce travail, nous discutons les rôles que les différentes technologies de mémoire résistive non-volatiles émergentes (RRAM), notamment (i) Phase Change Memory (PCM), (ii) Conductive-Bridge Memory (CBRAM) et de la mémoire basée sur une structure Metal-Oxide (OXRAM) peuvent jouer dans des dispositifs neuromorphiques dédies. Nous nous concentrons sur l'émulation des effets de plasticité synaptique comme la potentialisation à long terme (Long Term Potentiation, LTP), la dépression à long terme (Long Term Depression, LTD) et la théorie STDP (Spike-Timing Dependent Plasticity) avec des synapses RRAM. Nous avons développé à la fois de nouvelles architectures de faiblement énergivore, des méthodologies de programmation ainsi que des règles d'apprentissages simplifiées inspirées de la théorie STDP spécifiquement optimisées pour certaines technologies RRAM. Nous montrons l'implémentation de systèmes neuromorphiques a grande échelle et efficace énergétiquement selon deux approches différentes: (i) des synapses multi-niveaux déterministes et (ii) des synapses stochastiques binaires. Des prototypes d'applications telles que l'extraction de schéma visuel et auditif complexe sont également montres en utilisant des réseaux de neurones impulsionnels (Feed-forward Spiking Neural Network, SNN). Nous introduisons également une nouvelle méthodologie pour concevoir des neurones stochastiques très compacts qui exploitent les caractéristiques physiques intrinsèques des appareils CBRAM.

The need and demand for continuous high-speed, energy-efficient hardware advancement is undisputed. Traditional computing system with von Neumann architecture leads to high energy consumption and latency due to a huge amount of data transfer between the separated memory unit and the logic unit. In response to this discrepancy, extensive research has been conducted to develop brain-inspired electronic devices that can provide alternate computing platforms needed for implementing hardware neural networks. Artificial synapse, which emulates the dynamics of biological synapses, such as “update” and “memorize,” is one approach toward solid-state implementation of bio-inspired devices. Recently, two-dimensional (2D) van der Waals (vdW) materials have been actively explored for such artificial synapses. The distinctive electronic, optoelectronic, and mechanical properties of two-dimensional (2D) materials make these quite attractive for a wide variety of applications. This thesis explores the electronic and optoelectronic properties of 2D materials for mimicking the synaptic performance of the neuron. Materials of interest include MoS2, which is semiconducting, and α-In2Se3, a ferroelectric semiconducting material, investigated as active elements for synaptic applications. In the first part of the dissertation, we try to understand the working mechanism, i.e., charge trapping and de-trapping in synaptic devices using MoS2 as the channel material in a simple back-gated configuration. To this end, we have used a high-k dielectric (Ta2O5) as the gate oxide, which is expected to reduce the voltage swing and hence the power consumption, which is beneficial when used in neuromorphic networks. The hysteresis in the transfer characteristics of the transistor arising out of the Ta2O5/MoS2 interface and interface trap charges within the oxide are exploited to demonstrate excitatory Post Synaptic current (EPSC) / Inhibitory Post Synaptic current (IPSC), Long Term Potentiation (LTP) / Long Term Depression (LTD), Spike Amplitude Dependent Plasticity (SADP), Spike Timing Dependent Plasticity (STDP) at a relatively lower energy budget. In the second part, we discuss the working mechanism of 2D ferroelectric semiconducting channel material (α-In2Se3) for synaptic applications. Ferroelectric materials have emerged as a promising candidate for enabling synaptic devices as they lead to fast operation, non-destructive readout, low-power, low variations, and high on/off ratios. The partial polarization switching behavior of the ferroelectric material can be exploited to emulate the biological synaptic functions by gradually modulating the channel conductance through an external electrical field. We also explored the continuous weight modulation through partial polarization of the channel displaying an excellent linear weight update trajectory with multiple stable conductance states. In the next part of the dissertation, we discuss artificial neural networks for pattern recognition using the conductance weights obtained from device-level emulation of synaptic dynamics. By updating the synaptic weights with conductance weight values on 18,000 digits, we achieved a successful recognition rate of 93% on the testing data. The introduction of 0.10 variance of noise pixels results in an accuracy of more than 70%, showing the strong fault-tolerant nature of the conductance states. These synaptic functionalities, learning rules, and device-to-subsystem-level simulation results based on α-In2Se3 could facilitate the development of more complex neuromorphic hardware systems based on FeS-FETs. In the last part of the dissertation, we introduce a light-sensing function merged into the artificial synapses to realize an optoelectronic synapse. The optical input signal (λ = 527 nm) is used as a presynaptic signal with various frequencies and strengths to imitate the synaptic functionalities such as short-term memory (STM) and long-term memory (LTM), paired-pulse facilitation (PPF), spike rate-dependent plasticity (SRDP) spike duration-dependent plasticity (SDDP) and memory functions like learning, forgetting, and relearning

碩士<br>國立交通大學<br>電子研究所<br>107<br>Resistive random access memory (RRAM) is the most promising nonvolatile memory in the future, due to its serval advantages, low power consumption, high operation speed, and 3D compatible architecture……etc. Another potential application of RRAM is to implement it to neuromorphic computing. To use RRAM as an electronic synapse, it should perform the capability of gradual resistance change. Furthermore, some electrical properties and metrics need to be considered, e.g., linearity, symmetry, dynamic range, etc. Many papers conclude that the higher linearity of resistance change, the better the learning accuracy we can achieve in the machine learning task. In this thesis, we mainly focus on ZrOx-based RRAM, trying to improve the nonlinearity by device design engineering. Firstly, by changing the bottom electrode from Pt to TiN, we successfully demonstrate ZrOx-based RRAM with gradual resistivity change. In addition, we propose a mechanism to explain the difference. Secondly, by introducing additional post-deposition annealing, the nonlinearity of the weight update is further improved from >9 to 4.45 for potentiation; >9 to 5.29 for depression. This can be explained by interface oxygen vacancies due to the formation of the TiON layer after annealing. In the third part, based on the previous report, a methodology to improve the nonlinearity, we used the AlOx as a barrier layer, because AlOx has low ion mobility due to the ALD process. By stacking AlOx under ZrOx, we obtained the bilayer structure RRAM. Compared to the single layer (ZrOx) device, the nonlinearity was further improved to 3.94 and 2.42 for potentiation and depression, respectively, and the methodology was confirmed. Additionally, with process parameter optimized, we have fabricated a synaptic RRAM with high linearity weight update, which nonlinearity is 1.3 for potentiation, and 1.82 for depression. In the future, this can be further applied to the neuromorphic computing system to serve as the electronic synapse.

A memristor, memory resistor, is a two-terminal nanodevice that can be made as thin as a single-atom-thick that has become of tremendous interest for its potential to revolutionise electronics, computing, computer architectures, and neuromorphic engineering. This thesis encompasses two major parts containing original contributions, (Part I) modelling and fabrication, and (Part II) circuit application and computing. Each part contains three chapters. The fundamentals necessary for understanding the main idea of each chapter are provided therein. A background chapter revolving around memristors and memristive devices is given. A system overview links the two parts together. A brief description of the two parts is as follows: Part I—modelling and fabrication is relevant to modelling and fabrication of memristors. A basic modelling approach following the early modelling by Hewlett- Packard is presented and tested with several simple circuits. Memristor fabrication process and materials are discussed and two different fabrication runs along with initial measurement results are presented. SPICE modelling for two memristive devices, (i) the memristor and (ii) the complementary resistive switch are also provided. Part II—nanocrossbar array and memristive-based memory and computing provides an analytical approach for crossbar arrays based on memristive devices. Proposed designs for memristor-based content addressable memories and their analysis are given. This part provides a binary/ternary content addressable memory structure based on a new complementary resistive switch. A number of fundamental building blocks for analogue and digital computing are also presented in this section. The observation of implementing a learning process based on a pair of spikes is also shown and an extension of such a process to a relatively large scale structure based on SPICE simulation is reported. In addition to these original contributions, the thesis offers an introductory background on memristors, in the area of materials and applications. The thesis also provides a system overview of the targeted system (a CMOS-memristor imager system), which provides a the link between the two parts of the thesis. In addition to the original contributions in the area of modelling and characterisation, an overview on the understanding of the memristor element via the quasistatic expansion of Maxwell’s equations is discussed.<br>Thesis (Ph.D.) -- University of Adelaide, School of Electrical and Electronic Engineering, 2012.

碩士<br>國立交通大學<br>電子研究所<br>108<br>In this thesis, we characterize the negative voltage read induced conductance change in a hafnium oxide RRAM synapse. An analytical model is developed to describe the conductance evolution with the number of read cycles. The proposed model includes the impact of read voltage and initial conductance level on conductance state stability. We found that the current degradation induced by read pulses is determined by cumulative read time, rather than the duration of a single read pulse. A two-stage featured conductance evolution is observed. The conductance reduction reveals an inverse power-law dependence on cumulative read number in the second stage. We discover that the measured power factor is dependent on read voltages. On the other hand, the measured transition read number between the two stages is affected by both read voltages and initial conductance levels. To describe the conductance evolution, we present an analytical model to simulate the transition read number at different read voltages and initial conductance levels. The proposed model is in great consistency with measurement results. Our model is not only capable of describing the conductance evolution in a wide range of read cycle numbers but also provides physical insights to read-induced conductance changes in RRAM synapses.

碩士<br>國立中山大學<br>材料與光電科學學系研究所<br>102<br>The information stored in human brain is different from computer, it storages and transmits messages through analog signal instead of digital signal. In this study, the lithium silicate resistive random access memory (RRAM) mimics synaptic-like biological behavior with multi-bit function. It is helpful for the development of artificial neural network and analog storage by emulating learning rules in the brain. The lithium silicate thin film was prepared by RF sputtering, and it was fabricated the RRAM with Pt/LiSiOx/TiN structure. Though the electrical analysis, the lithium silicate RRAM shows abnormal resistive switching behaviors, especially the high resistance states distribute in a wide range. Based on the corroboration of conduction current fitting analysis, a model was proposed to explain the electrical resistive switching behaviors. By controlling the stop-voltage, the device can achieve multi-bit function and perform complementary resistive switches (CRS). Generally, CRS consists of two anti-serial RRAMs to solve the sneak path problem. However, the lithium silicate RRAM can archive CRS in a single device due to the dual-ion effect (Li+ and O2-). The lithium silicate RRAM device is demonstrated advanced synaptic function such as synaptic plasticity, a spike-timing-dependent plasticity (STDP), a short-term memory (STM) and long-term memory function (LTM), which is relying on the synaptic plasticity with a continuous transition between intermediate resistance states. Further, after a constant voltage applying, the irreversible switching from LRS to HRS is recovered, and the device reveals good endurance again.

<div> <div> <div> <p>Process variations and increasing leakage current are major challenges toward memory realization in deeply-scaled CMOS devices. Spintronic devices recently emerged as one of the leading candidates for future information storage due to its potential for non-volatility, high speed, low power and good endurance. In this thesis, we start with the basic concepts and applications of three spintronic devices, namely spin or- bit torque (SOT) based spin-valves, SOT-based magnetic tunnel junctions and the magnetic skyrmion (MS) for both logic and machine learning hardware. </p> <p>We propose a new Spin-Orbit Torque based Domino-style Spin Logic (SOT-DSL) that operates in a sequence of Preset and Evaluation modes of operations. During the preset mode, the output magnet is clocked to its hard-axis using spin Hall effect. In the evaluation mode, the clocked output magnet is switched by a spin current from the preceding stage. The nano-magnets in SOT-DSL are always driven by orthogonal spins rather than collinear spins, which in turn eliminates the incubation delay and allows fast magnetization switching. Based on our simulation results, SOT-DSL shows up to 50% improvement in energy consumption compared to All-Spin Logic. Moreover, SOT-DSL relaxes the requirement for buffer insertion between long spin channels, and significantly lowers the design complexity. This dissertation also covers two applications using MS as information carriers. MS has been shown to possess several advantages in terms of unprecedented stability, ultra-low depinning current density, and compact size. </p><p><br></p><p>We propose a multi-bit MS cell with appropriate peripheral circuits. A systematic device-circuit-architecture co-design is performed to evaluate the feasibility of using MS-based memory as last-level caches for general purpose processors. To further establish the viability of skyrmions for other applications, a deep spiking neural network (SNN) architecture where computation units are realized by MS-based devices is also proposed. We develop device architectures and models suitable for neurons and synapses, provide device-to-system level analysis for the design of an All-Spin Spiking Neural Network based on skyrmionic devices, and demonstrate its efficiency over a corresponding CMOS implementation.</p> <div> <div> <div> <p><br></p><p>Apart from the aforementioned applications such as memory storage elements or logic operation, this research also focuses on the implementation of spin-based device to solve combinatorial optimization problems. Finding an efficient computing method to solve these problems has been researched extensively. The computational cost for such optimization problems exponentially increases with the number of variables using traditional von-Neumann architecture. Ising model, on the other hand, has been proposed as a more suitable computation paradigm for its simple architecture and inherent ability to efficiently solve combinatorial optimization problems. In this work, SHE-MTJs are used as a stochastic switching bit to solve these problems based on the Ising model. We also design an unique approach to map bi-prime factorization problem to our proposed device-circuit configuration. By solving coupled Landau- Lifshitz-Gilbert equations, we demonstrate that our coupling network can factorize up to 16-bit binary numbers. </p> </div> </div> </div> </div> </div> </div>

Since the discovery of graphene, the field of 2D materials has garnered massive interest from a materials science, basic physics and device application point of view. This results from the diverse range of electronic and transport properties observed in these systems. For example, graphene, which has a gapless Dirac fermionic band structure with extremely high carrier mobility, shows low photoresponse due to the absence of a band gap. However, layered transition metal dichalcogenides (TMDCs) such as MoS2, which possess a semiconducting band structure with disorder dominated hopping like transport mechanism and low carrier mobility, demonstrates high photoresponse due to the presence of a band gap. One of the major benefits of 2D materials is the possibility of stacking together isolated atomic planes of different materials in a layer by layer manner forming an atomic Lego or a van der Waals heterostructure. Proximity induced interaction between two or more 2D crystals with varied crystal structure and electronic properties leads to a plethora of possibilities for the emergence of new physics and/or device functionality. Consequently, van der Waals heterostructures have been utilized to design devices for a wide variety of applications such as electronic, piezoelectric, thermoelectric, optoelectronic and non-volatile information storage to name a few. For optoelectronic and memory-based applications, charge transfer between the constituent layers of the van der Waals heterostructure has proven to be of immense importance. There are reports of excellent photodetectors based on MoS2 graphene heterostructures where a transfer of photogenerated carriers from the MoS2 to graphene layer leads to high responsivity figures of ∼ 5 × 108 AW−1 at room temperature. In this thesis, we study the effect of vertical charge transfer in TMDC based van der Waals heterostructures aimed at non-volatile memory, memristor and bio-inspired synaptic applications. For this purpose, we use a trilayer stack of MoS2, hBN and graphene. Here hBN acts as a tunnel barrier separating the MoS2 channel from the graphene floating gate (FG). This design is motivated by our investigations into the ON/OFF switching mechanism in back gated TMDC FETs where we observed clear signatures of percolative switching in a disordered channel with low subthreshold slopes. An improvement in the subthreshold slope is brought about by capacitance engineering via extension of the FG, leading tohigh quality MoS2 FETs with near-ideal subthreshold slope (≈ 80 mV/decade) maintained for almost four decades of change in conductance. The device also demonstrates a large anti-hysteresis in the transfer characteristics due to the transfer of charges from the channel to the FG. This, coupled with a low OFF state current makes the MoS2 FG device ideal for energy efficient memory applications. The charge transfer process also leads to a hysteresis in the output characteristics which is indicative of a memristor like behaviour. Furthermore, the quanta of charge transferred can be controlled using short time period pulses at the gate and drain terminal. This leads to a multi-state memory device with repeated increase and decrease of the channel conductance resulting from the accumulation or depletion of electronic charges on the graphene FG. Pulsed charge transfer mediated changes in device conductance is analogous to the pulsed potentiation and depression of a biological synapse which is mediated via controlled release of neurotransmitters into the synaptic cleft. In addition to pulsed potentiation and depression, the device successfully replicates other synaptic properties such as paired pulse facilitation (PPF) and spike time dependent plasticity (STDP) while maintaining a low power dissipation (∼5 fJ per pulse), making it ideal for future neuromorphic applications.

This work reports the fabrication and electrical characterization of Metal-Insulator-Metal (MIM) devices for neuromorphic applications using zinc-tin-oxide (ZTO) and indium-gallium-zinc-oxide (IGZO) as the switching layers and molybdenum (Mo) for the devices ‘contacts. A lithographic mask was used along with physical vapor deposition (PVD) processes for the production of the different samples’ layers. Using ZTO as a switching layer in order to replace other elements that are becoming scarce such as indium or gallium is of relevant importance, therefore it was first attempted a ZTO based MIM device. Upon electrical characterization the ZTO devices show an analog behavior without the need of current compliance (being therefore self-limited), good multilevel storage property, reliability and a stable state retention for long periods of time. It is suspected a 2D type of switching mechanism, based on the tunneling through a Schottky barrier at the interface, however the details of the exact mechanism aren’t yet clear. Furthermore, the device is highly prone to interact with humidity present in the atmosphere and some fabrication steps, which is a possible explanation for the anticlockwise RESET. A second batch of ZTO devices was fabricated in order to remediate the RESET process, using a passivation step, however the RESET direction wasn’t affected although the rectification properties of the devices were enhanced. Since upon pulse testing the ZTO devices behaved erratically, this switching layer was discarded and IGZO used instead. With this alternative amorphous oxide semiconductor material, the symmetry and linearity of the conductance change was evaluated and transition from STP (Short-Term Potentiation) to LTP (Long-Term Potentiation) successfully demonstrated upon pulse repetition, showing similar decay fashion to human memory, following a Kohlrausch-Williams-Watts function (commonly called “stretched-exponential function”).

<div>Germanium-based MOS device which is considered as one of the promising alternative channel materials has been studied with well-known FinFET, nanowire structures and HKMG (High-k metal gate). Recent introduction of Ferroelectric (FE) Zr-doped HfO₂ (Hf_xZr_1-xO₂, HZO) has opened various possibilities both in memory and logic</div><div>applications.</div><div><br></div><div>First, integration of FE HZO into the conventional Ge platform was studied to demonstrate Ge FeFET. The FE oxide was deposited with optimized atomic layer deposition (ALD) recipe by intermixing HfO₂ and ZrO₂. The HZO film was characterized with FE tester, XRD and AR-XPS. Then, it was integrated into conventional gate stack of Ge devices to demonstrate Ge FeFETs. Polarization switching was measured with ultrafast measurement set-up down to 100 ps.</div><div><br></div><div>Then, HZO layer was controlled for the first demonstration of hysteresis-free Ge negative capacitance (NC) CMOS FinFETs with sub-60mV/dec SS bi-directionally at room temperature towards possible logic applications. Short channel effect in Ge NCFETs were compared with our reported work to show superior robustness. For smaller widths that cannot be directly written by the e-beam lithography tool, digital etching on Ge fins were optimized.</div><div>Lastly, Ge FeFET-based synaptic device for neuromorphic computing was demonstrated. Optimum pulsing schemes were tested for both potentiation and depression which resulted in highly linear and symmetric conductance profiles. Simulation was done to analyze Ge FeFET's role as a synaptic device for deep neural network.</div>

碩士<br>國立交通大學<br>電子研究所<br>107<br>Neuromorphic computing is expected to emulate brain functions in the near future. There are several nonvolatile memory such as PCRAM, CBRAM, RRAM have been proposed as synaptic memory device. All of above, RRAM is the most promising candidate, due to its several advantages, low power consumption, simple structure, excellent endurance, high operation speed. However, the desirable characteristic of synaptic device is different from traditional RRAM. It requires analog switching behavior and multi-level conductance states, which are beneficial to learning accuracy. In this thesis, the bipolar resistive switching behavior and synaptic characteristics are investigated in TiOx-based synaptic memory device. There are three parts in this thesis. First, different thickness TiOx film are deposited in TiN/Ti/TiOx/TiN structure. The relationship between thickness and electrical characteristics is discussed. The thickness of the TiOx switching layer determine the working operation current of the devices. The thicker layer device can work at lower compliance current and make smaller conductive filament. In addition, the influence of different pulse amplitudes applied on potentiation and depression is investigated. When lower pulse amplitude was applied on the device, conductance can gradually change and the nonlinearity is better. However, dynamic range become small and noise increase. The second part is that different Ti thickness effect on TiOx-based synaptic device. We compare their electrical characteristics and synaptic characteristics. We observed that the analog behavior can be improved after inserting a thin Ti layer. Different thickness of Ti layer make different thickness of interfacial layer, which leads the TiOx- based memory device has different capability to form and rupture the filament. As a result, they perform different electrical characteristics and weight update behavior. The other part is that comparing ZrOx/TiOx synaptic device and TiOx synaptic device. The ZrOx/TiOx synaptic device shows more stable analog switching and the nonlinearity of potentiation and depression can be improved to 2.08 and 1.84. Furthermore, it exhibits good endurance and data retention properties.It demonstrates good performance not only for data storage application but also for mimicking biological synapse.

碩士<br>國立交通大學<br>電子研究所<br>107<br>Due to that the device toward more powerful, Artificial Intelligence (AI) computing become more and more popular. Neuromorphic computing is one of the most popular model of AI computing. By simulating the weight update of synapses between the neuro cells when the human brain accepts outside signal, we can use a new way to update the hardware condition instead of software. It is expected that the AI computing become much faster and much lower power consumption. According to oxygen vacancy rich layer model and low oxygen vacancy mobility model, we add AlOx layer between TiOx and HfOx for improving the device’s performance. Based on TEM and EDX analyses, we find that Al doped into HfOx layer to form HfAlOx compound film. Based on such the oxygen vacancy mobility of HfAlOx layer formation, would lead to narrow the second filament. Through experiments, 1nm thick AlOx layer employed in the TiN/TiO/HfAlOx/TiN device exhibits the best property. Such device obtains excellent properties such as faster speed device (both set and reset pulse width is 1us) with good nonlinearity (3.39 for potentiation and 2.87 for depression behavior) and best nonlinearity (2.15 for potentiation and 1.52 for depression behavior with 10us pulse width) with 500 conductance states and retention with more than 104 s.

Enormous demands for fast and low-power computing and memory building blocks for consumer electronics, such as smartphones or tablets, have led to the emergence of silicon nanowire transistors a decade ago. Along with the Si-based nanotechnology, the silicon compatible optical and chemical sensing applications have boosted the research on hybrid devices that combine the organic and inorganic materials. Apart from the revolution in the device dimensions, the rapid growth of artificial intelligence in the software industry brunch requires the next generation’s computers with the revolutionized hybrid device architecture. Implementing such new devices can effectively perform machine learning tasks without the massive consumption of energy. The hybrid Si nanowire devices have an excellent capability to replace the conventional computing element by providing new functionalities of combined materials to the traditional transistor devices preserving the advantage of CMOS technology. A goal of this thesis is to develop functional hybrid Si nanowire-based transistors modulated by the stimuli-dependent gate to go beyond the current digital building blocks. The hybrid devices converge semiconductor channel and various materials from organic molecules to silicate composite as a gate of the transistor. External stimuli change the electronic state of the gate materials which is transformed to the gate potential of the transistors. First, this thesis studies the electronic characteristics of the Si nanowire FETs under the optical stimulus. Optical stimulus induces the strong conductance change on bare Si nanowire FETs. Under the light with low power intensity, the transistor shows an unconventional negative photoconductance (NPC) which is dependent on the doping concentration of the nanowire and the wavelength of the incident light. The dopants ions and surface states cause photo-generated hot electrons trapping which restricts conventional photoconductance in the semiconductor. In the hybrid device, however, the gate material on the Si dioxide layer plays a significant role in the optoelectronic modulation of the FET device. This thesis demonstrates that an organic photochromic material, porphyrin, wrapping around the nanowire channel acts as an optical gate of the Si nanowire transistor. The diffusive property of electrons in the molecular film decides the optical switching dynamics and efficiency. Further, this thesis introduces new functional gate material, sol-gel derived ion-doped silicate film, based on the availability of stimulus-dependent gate modulation. This amorphous and transparent silicate film shows memristive property due to the ionic redistribution in the film under bias condition. Interestingly, the sol-gel film-coated Si nanowire FETs the devices show a double gate effect cooperating with a back gate under light illumination which is due to the channel separation in the fin structure of the nanowire. In addition, the sol-gel silicate film-coated Si nanowire transistor emulates the neuronal plasticity with pulsed gate stimulation, namely “neurotransistor.” Because of the mobile ions in the silicate film, the transistor has a short-term memory and mimics membrane potential change of the neuron cell. The neurotransistor could be used as a computing node in the physical neural network for hardware machine learning. This work demonstrates that the physical properties of the gate material decide the transfer characteristics and time-dependent dynamics of the hybrid Si nanowire transistors. The optical and neuromorphic gate features of the hybrid transistors would accelerate the advancement of an optical or brain-like computing machine.

This thesis presents a versatile study on the design and Very Large Scale Integration(VLSI) implementation of various synaptic plasticity rules ranging from phenomenological rules, to biophysically realistic ones. In particular, the thesis aims at developing novel spike timing-based learning circuits that advance the current neuromorphic systems, in terms of power consumption, compactness and synaptic modification (learning) abilities. Furthermore, the thesis investigates the usefulness of the developed designs and algorithms in specific engineering tasks such as pattern classification. To follow the mentioned goals, this thesis makes several original contributions to the field of neuromorphic engineering, which are briefed in the following. First, a programmable multi-neuron neuromorphic chip is utilised to implement a number of desired rate- and timing-based synaptic plasticity rules. Specific software programs are developed to set up and program the neuromorphic chip, in a way to show the required neuronal behaviour for implementing various synaptic plasticity rules. The classical version of Spike Timing Dependent Plasticity (STDP), as well as the triplet-based STDP and the rate-based Bienenstock-Cooper-Munro (BCM) rules are implemented and successfully tested on this neuromorphic device. In addition, the implemented triplet STDP learning mechanism is utilised to train a feedforward spiking neural network to classify complex rate-based patterns, with a high classification performance. In the next stage, VLSI designs and implementations of a variety of synaptic plasticity rules are studied and weaknesses and strengths of these implementations are highlighted. In addition, the applications of these VLSI learning networks, which build upon various synaptic plasticity rules are discussed. Furthermore, challenges in the way of implementing these rules are investigated and effective ways to address those challenges are proposed and reviewed. This review provides us with deep insight into the design and application of synaptic plasticity rules in VLSI. Next, the first VLSI designs for the triplet STDP learning rule are developed, which significantly outperform all their pair-based STDP counterparts, in terms of learning capabilities. It is shown that a rate-based learning feature is also an emergent property of the new proposed designs. These primary designs are further developed to generate two different VLSI circuits with various design goals. One of these circuits that has been fabricated in VLSI as a proof of principle chip, aimed at maximising the learning performance—but this results in high power consumption and silicon real estate. The second design, however, slightly sacrifices the learning performance, while remarkably improves the silicon area, as well as the power consumption of the design, in comparison to all previous triplet STDP circuits, as well as many pair-based STDP circuits. Besides, it significantly outperforms other neuromorphic learning circuits with various biophysical as well as phenomenological plasticity rules, not only in learning but also in area and power consumption. Hence, the proposed designs in this thesis can play significant roles in future VLSI implementations of both spike timing and rate based neuromorphic learning systems with increased learning abilities. These systems offer promising solutions for a wide set of tasks, ranging from autonomous robotics to brain machine interfaces.