Rozprawy doktorskie na temat „Multiprocessor machine”
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Monti, Jean-Marc. "Interprocessor communication supports for a multiprocessor dataflow machine". Thesis, McGill University, 1991. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=60009.
Pełny tekst źródłaIn this thesis, an inter-processor communication mechanism is proposed. With this mechanism, a multiprocessor MDFA system can be constructed, based on a distributed memory organization. An efficient inter-processor synchronization and communication support is presented, for sending and receiving data through an interconnection network. An Interprocessor Communication Unit (ICU) has been designed to implement the above mechanism in the MDFA. A simulation testbed has been implemented to study the performance of the multiprocessor. It includes an assembler, with multiprocessor extensions, and a multiprocessor simulator. An analysis based on the simulations results is presented, focusing on the impact of long latency operations on program performance.
Waters, Andrew Philip. "Program analysis and scheduling for a synchronous multiprocessor machine". Thesis, Royal Holloway, University of London, 1996. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.362649.
Pełny tekst źródłaMartel, Sylvain. "Design of a multiprocessor DSP-based machine suited for intensive real-time applications". Thesis, McGill University, 1989. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=61918.
Pełny tekst źródłaMahmoud, Mohamedin Mohamed Ahmed. "ByteSTM: Java Software Transactional Memory at the Virtual Machine Level". Thesis, Virginia Tech, 2012. http://hdl.handle.net/10919/31314.
Pełny tekst źródłaMaster of Science
Gaildrat, Véronique. "Contribution a l'etude et a la conception d'une machine parallele pour la production rapide d'images de synthese : la machine voxar, conception de l'application synthese d'images realistes". Toulouse 3, 1988. http://www.theses.fr/1988TOU30199.
Pełny tekst źródłaDiTomaso, Dominic F. "Reactive and Proactive Fault-Tolerant Network-on-Chip Architectures using Machine Learning". Ohio University / OhioLINK, 2015. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1439478822.
Pełny tekst źródłaToch, Lamiel. "Contributions aux techniques d’ordonnancement sur plates-formes parallèles ou distribuées". Electronic Thesis or Diss., Besançon, 2012. http://www.theses.fr/2012BESA2045.
Pełny tekst źródłaWorks presented in this document tackle scheduling of parallel applications in either parallel (cluster) or distributed (computing grid) platforms. In our researches we were concentrated on either scheduling of applications modeled by a DAG, directed acyclic graph, for computing grid or scheduling of parallel programs (parallel jobs) represented by a rectangular shape whose the two dimensions are the number of requested processors and the execution time. The researches follow three main topics. The first topic concerns the scheduling of a set of instances of an application for computing grid. The second topic deals with the scheduling of parallel jobs inclusters. The third one tackles the scheduling of parallel jobs in multiprocessor machines. We brought contributions on these three topics. The first contribution under the first topic consists of the advanced experimental study of three algorithms for scheduling a set of instances of an application on a heterogeneous platform without communication costs : a list-based algorithm, a steady-state algorithm and genetic algorithm. Moreover we integrate communications in this genetic algorithm. The second contribution under the second topic is the design of a new technique for scheduling parallel jobs in clusters : job folding which uses virtualization of processors. The third contribution deals with a new technique which comes from statistics and signal cessing applied to scheduling of parallel jobs in a multiprocessor machine. Eventually we givesome works that we carried out but which did not give significant results for scheduling
Muller, Gilles. "Conception et realisation d'une machine multiprocesseur sure de fonctionnement". Rennes 1, 1988. http://www.theses.fr/1988REN10044.
Pełny tekst źródłaBen, Ismail Tarek. "Synthèse au niveau système et conception de systèmes mixtes logiciels-matériels". Grenoble INPG, 1996. http://www.theses.fr/1996INPG0003.
Pełny tekst źródłaPark, Chee-Hang. "Algorithmes de jointure parallele et n-aire : application aux reseaux locaux et aux machines bases de donnees multiprocesseurs". Paris 6, 1987. http://www.theses.fr/1987PA066569.
Pełny tekst źródłaKurdila, Andrew John. "Concurrent multiprocessors in computational mechanics for constrained dynamical systems". Diss., Georgia Institute of Technology, 1988. http://hdl.handle.net/1853/15845.
Pełny tekst źródłaMoreaud, Stéphanie. "Mouvement de données et placement des tâches pour les communications haute performance sur machines hiérarchiques". Phd thesis, Université Sciences et Technologies - Bordeaux I, 2011. http://tel.archives-ouvertes.fr/tel-00635651.
Pełny tekst źródłaKiriwas, Anton. "Directory-based Cache Coherence in SMTp Machines without Memory Overhead using Sparse Directories". Honors in the Major Thesis, University of Central Florida, 2004. http://digital.library.ucf.edu/cdm/ref/collection/ETH/id/714.
Pełny tekst źródłaBachelors
Engineering and Computer Science
Computer Science
LAHJOMRI, MOHAMMED ZAKARIA. "Conception et evaluation d'un mecanisme de memoire virtuelle partagee sur une machine multiprocesseur a memoire distribuee". Rennes 1, 1994. http://www.theses.fr/1994REN10010.
Pełny tekst źródłaKhelifi, Djoudi. "Etude et réalisation d'un multiprocesseur microprogrammable pseudo-redondant pour la commande de machines électriques". Grenoble 2 : ANRT, 1986. http://catalogue.bnf.fr/ark:/12148/cb375987258.
Pełny tekst źródłaNg, Paulino. "Conception d'architectures testables et détermination des vecteurs de test pour les circuits spécifiques fortement intégrés de la machine MaRS (machine à réduction symbolique)". Toulouse, ENSAE, 1990. http://www.theses.fr/1990ESAE0003.
Pełny tekst źródłaMuseux, Nicolas. "Aide au placement d'applications de traitement du signal sur machines parallèles multi-SPDM. Rencontre de la parallélisation automatique et de la programmation par contraintes". Paris, ENMP, 2001. http://www.theses.fr/2001ENMP1048.
Pełny tekst źródłaPrakash, S. R. "Hyperplane Partitioning : An Approach To Global Data Partitioning For Distributed Memory Machines". Thesis, Indian Institute of Science, 1998. https://etd.iisc.ac.in/handle/2005/175.
Pełny tekst źródłaPrakash, S. R. "Hyperplane Partitioning : An Approach To Global Data Partitioning For Distributed Memory Machines". Thesis, Indian Institute of Science, 1998. http://hdl.handle.net/2005/175.
Pełny tekst źródłaLiang, Yan. "Mise en œuvre d'un simulateur en OCCAM pour la conception d'architectures parallèles à base d'une structure multiprocesseur hiérarchique". Compiègne, 1989. http://www.theses.fr/1989COMPD176.
Pełny tekst źródłaThe simulation has become an indispensable phase for conception of parallel processing systems, and enables to avoid construction of expensive prototypes. In this paper, a parallel process-oriented simulator written in OCCAM language has been developed. Our objective is to conceive a simulator adapted to a network of transputers for prototyping parallel processing systems by connecting directly the serial transputer channels. As a simulation example, a parallel processor system (coprocessor) based on hierarchical structure : master-slave has been realized at the processor-memory-switch level. The performance analysis is obtained via two queuing models : the former as independent M/M/1 systems and the latter as a M/M/s system. The experimental performance is measured respectively based on the independent tasks and the sequential tasks. The comparison of analytic and experimental results enables us to constate the advantage and limit of the coprocessor and to encourage us to its implementation
Favre, Michel. "Un système Prolog parallèle pour machines à mémoire distribuée". Phd thesis, Grenoble INPG, 1992. http://tel.archives-ouvertes.fr/tel-00341008.
Pełny tekst źródłaGuillot, Bernard. "Réalisation d'un outil autonome pour l'écriture et l'interrogation de systèmes de gestion de bases de données et de connaissances sur une machine multiprocesseur : évolution du concept de bases de données vers la manipulation d'objets image et graphique". Compiègne, 1986. http://www.theses.fr/1986COMPI219.
Pełny tekst źródłaGuillot, Bernard. "Réalisation d'un outil autonome pour l'écriture et l'interrogation de systèmes de gestion de bases de données et de connaissance sur une machine multiprocesseur évolution du concept de base de données vers la manipulation d'objets image et graphique". Grenoble 2 : ANRT, 1986. http://catalogue.bnf.fr/ark:/12148/cb375993889.
Pełny tekst źródłaWu, Shu-Chin, i 吳淑琴. "A Concurrent-Access File Server for Mach-Based Multiprocessor Machine". Thesis, 1994. http://ndltd.ncl.edu.tw/handle/31910301498502170728.
Pełny tekst źródła國立臺灣大學
資訊工程研究所
82
Multimedia is popular and file sizes grow larger and larger. Although micro processor is getting powerful today, the overall performance od systems with massive data will be influenced by I/O speed. Current file systems, such as MS-DOS, and UNIX, are not suitable for large files because they only access one block of data at a time. Suppose the size of a file is 16K bytes and it is stored on a disk continuously. When a user wants to get the whole data of this file at once, these systems need to issue 32 disk requests to get data. It wastes time. Thus, we build a file server, called Archer, such that it good performance for large files. Archer adopts contiguous allocation and disk arrays to improve I/O speed. It is established on a multiprocessor machine. Thus, clients can mount more than one Archer servers, which sit on different hosts. When one host crashes, clients can access data through another host as no matter happens. Furthermore, current file systems can communicate with Archer through NFS interface.
Grigoriu, Liliana. "Multiprocessor Scheduling with Availability Constraints". 2010. http://hdl.handle.net/1969.1/ETD-TAMU-2010-05-7694.
Pełny tekst źródłaLIU, GUANG-XIN, i 劉光新. "The architectural features and performance analysis of a multiprocessor database machine". Thesis, 1989. http://ndltd.ncl.edu.tw/handle/35793579620275015781.
Pełny tekst źródłaMeyer, Andrew J. "Design and implementation of a multiprocessor control system for multi-axis, cross-coupled machine control". 1995. http://catalog.hathitrust.org/api/volumes/oclc/34106325.html.
Pełny tekst źródłaTypescript. eContent provider-neutral record in process. Description based on print version record. Includes bibliographical references (leaves 195-197).
Schneider, Donovan A. "Complex query processing in multiprocessor database machines". 1990. http://catalog.hathitrust.org/api/volumes/oclc/23438092.html.
Pełny tekst źródłaTypescript. Vita. eContent provider-neutral record in process. Description based on print version record. Includes bibliographical references (leaves 149-153).
Yim, Hiu Shan. "Evaluating the performance characteristics of a virtual machine used on simultaneous multi-threaded (SMT) processors". 2008. http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.17260.
Pełny tekst źródłaSupplementary File: Original Document in MS Word. "Graduate Program in Electrical and Computer Engineering." Includes bibliographical references (p. 51-53).
Valluri, Madhavi Gopal. "Evaluation Of Register Allocation And Instruction Scheduling Methods In Multiple Issue Processors". Thesis, 1999. https://etd.iisc.ac.in/handle/2005/1532.
Pełny tekst źródłaValluri, Madhavi Gopal. "Evaluation Of Register Allocation And Instruction Scheduling Methods In Multiple Issue Processors". Thesis, 1999. http://etd.iisc.ernet.in/handle/2005/1532.
Pełny tekst źródła