Rozprawy doktorskie na temat „Multimedia signal processing”
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Sprawdź 28 najlepszych rozpraw doktorskich naukowych na temat „Multimedia signal processing”.
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Athanasiadis, Tasso, i tas atha@bigpond net au. "Signal Processing Techniques for Mobile Multimedia Systems". RMIT University. Electrical and Computer Engineering, 2007. http://adt.lib.rmit.edu.au/adt/public/adt-VIT20080123.115457.
Pełny tekst źródłaGuo, Liwei. "Restoration and modeling for multimedia compression /". View abstract or full-text, 2008. http://library.ust.hk/cgi/db/thesis.pl?ECED%202008%20GUOL.
Pełny tekst źródłaBakken, Marianne. "Signal Processing for Communicating Gravity Wave Images from the NTNU Test Satellite". Thesis, Norges teknisk-naturvitenskapelige universitet, Institutt for elektronikk og telekommunikasjon, 2012. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-19229.
Pełny tekst źródłaHouas, Heykel. "Allocation de ressources pour la transmission de données multimedia scalables". Phd thesis, Université de Cergy Pontoise, 2009. http://tel.archives-ouvertes.fr/tel-00767889.
Pełny tekst źródłaOberhofer, Robert. "Pitch adaptive variable bitrate CELP speech coding". Thesis, University of Ulster, 1998. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.264811.
Pełny tekst źródłaDeBardelaben, James Anthony. "An optimization-based approach for cost-effective embedded DSP system design". Diss., Georgia Institute of Technology, 1998. http://hdl.handle.net/1853/15757.
Pełny tekst źródłaShen, Ju. "Computational Multimedia for Video Self Modeling". UKnowledge, 2014. http://uknowledge.uky.edu/cs_etds/26.
Pełny tekst źródłaSezer, Osman Gokhan. "Data-driven transform optimization for next generation multimedia applications". Diss., Georgia Institute of Technology, 2011. http://hdl.handle.net/1853/42765.
Pełny tekst źródłaNarapareddy, Yagna Brahma Sai. "QoE Performance Evaluation by Introducing Video Freeze on Mobile Multimedia". Thesis, Blekinge Tekniska Högskola, Institutionen för tillämpad signalbehandling, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:bth-18995.
Pełny tekst źródłaUzuegbunam, Nkiruka M. A. "SELF-IMAGE MULTIMEDIA TECHNOLOGIES FOR FEEDFORWARD OBSERVATIONAL LEARNING". UKnowledge, 2018. https://uknowledge.uky.edu/ece_etds/124.
Pełny tekst źródłaYang, Yimin. "Exploring Hidden Coherent Feature Groups and Temporal Semantics for Multimedia Big Data Analysis". FIU Digital Commons, 2015. http://digitalcommons.fiu.edu/etd/2254.
Pełny tekst źródłaDikbas, Salih. "A low-complexity approach for motion-compensated video frame rate up-conversion". Diss., Georgia Institute of Technology, 2011. http://hdl.handle.net/1853/42730.
Pełny tekst źródłaIrani, Ramin. "Error Detection for DMB Video Streams". Thesis, Blekinge Tekniska Högskola, Sektionen för ingenjörsvetenskap, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:bth-5086.
Pełny tekst źródłaLaurier, Cyril François. "Automatic Classification of musical mood by content-based analysis". Doctoral thesis, Universitat Pompeu Fabra, 2011. http://hdl.handle.net/10803/51582.
Pełny tekst źródłaEn esta tesis, nos centramos en la clasificación automática de música a partir de la detección de la emoción que comunica. Primero, estudiamos cómo los miembros de una red social utilizan etiquetas y palabras clave para describir la música y las emociones que evoca, y encontramos un modelo para representar los estados de ánimo. Luego, proponemos un método de clasificación automática de emociones. Analizamos las contribuciones de descriptores de audio y cómo sus valores están relacionados con los estados de ánimo. Proponemos también una versión multimodal de nuestro algoritmo, usando las letras de canciones. Finalmente, después de estudiar la relación entre el estado de ánimo y el género musical, presentamos un método usando la clasificación automática por género. A modo de recapitulación conceptual y algorítmica, proponemos una técnica de extracción de reglas para entender como los algoritmos de aprendizaje automático predicen la emoción evocada por la música
Kharbouche, Said. "Fonctions de Croyance et Indexation MultimodaleApplication à l'Identification de Personnes dans des Albums". Phd thesis, Université de Rouen, 2006. http://tel.archives-ouvertes.fr/tel-00232806.
Pełny tekst źródłaKaraman, Svebor. "Indexation de la Vidéo Portée : Application à l'Étude Épidémiologique des Maladies Liées à l'Âge". Phd thesis, Université Sciences et Technologies - Bordeaux I, 2011. http://tel.archives-ouvertes.fr/tel-00689855.
Pełny tekst źródłaPALLONE, Grégory. "DILATATION ET TRANSPOSITION SOUS CONTRAINTES PERCEPTIVES DES SIGNAUX AUDIO : APPLICATION AU TRANSFERT CINEMA-VIDEO". Phd thesis, Université de la Méditerranée - Aix-Marseille II, 2003. http://tel.archives-ouvertes.fr/tel-00003363.
Pełny tekst źródła25 images/s, implique l'accélération ou le ralentissement de la
bande-son lors du transfert d'un format vers l'autre. Ceci
provoque une modification temporelle du signal sonore, et par
conséquent une modification spectrale avec altération du timbre.
Les studios de post-production audiovisuelle souhaitent compenser
cet effet par l'application d'une transformation sonore adéquate.
L'objectif de ce travail est de fournir à l'industrie
audiovisuelle un système permettant de pallier la modification de
timbre engendrée par le changement de vitesse de lecture. Ce
système se compose d'une part d'un algorithme de traitement et
d'autre part d'une machine sur lequel il est implanté.
L'algorithme est conçu et développé pour répondre aux contraintes
liées à la qualité sonore et à la compatibilité multicanal. La
machine, baptisée HARMO, est conçue spécifiquement par la société
GENESIS sur la base de processeurs de signaux numériques, et doit
répondre à la contrainte de temps-réel. Cet aspect "valorisation"
conduit à intégrer dans le projet les contraintes de coût et de
délai de réalisation.
Un état de l'art basé sur une bibliographie quasi-exhaustive
aboutit à une classification originale des méthodes de dilatation
et de transposition existantes. Ceci nous amène à distinguer et à
étudier les méthodes classiques temporelles et fréquentielles, et
à introduire les méthodes temps-fréquence. Cette classification
est à la base de plusieurs méthodes innovantes :
1. deux méthodes temps-fréquence dont l'analyse est adaptée à l'audition,
2. deux méthodes couplées qui associent les avantages des méthodes temporelles et fréquentielles,
3. une méthode temporelle basée sur une amélioration des méthodes existantes.
Les algorithmes sont évalués grâce à une banque de sons-test
spécifiquement élaborée pour mettre en évidence les défauts
caractéristiques des algorithmes. Notre choix final s'est porté
sur l'approche temporelle, que nous optimisons par l'adjonction de
critères de segmentation basés sur l'autocorrélation normalisée et
la détection de transitoires. Cet algorithme s'intègre dans un
logiciel qui a été structuré pour un fonctionnement temps-réel et
multicanal sur le système HARMO.
Liu, Ming. "Analyse et optimisation du système asiatique de diffusion terrestre et mobile de la télévision numérique". Phd thesis, INSA de Rennes, 2011. http://tel.archives-ouvertes.fr/tel-00662247.
Pełny tekst źródłaOliver, Gil José Salvador. "On the design of fast and efficient wavelet image coders with reduced memory usage". Doctoral thesis, Universitat Politècnica de València, 2008. http://hdl.handle.net/10251/1826.
Pełny tekst źródłaOliver Gil, JS. (2006). On the design of fast and efficient wavelet image coders with reduced memory usage [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/1826
Palancia
Pinto, Cristiane Zakimi Correia. "Qualidade de experiência de vídeo em aplicação interativa transmídia de televisão digital terrestre". Universidade de São Paulo, 2014. http://www.teses.usp.br/teses/disponiveis/3/3142/tde-28082015-103035/.
Pełny tekst źródłaAt the same time that transmedia productions are becoming more common, legal changes are occurring in Brazil that bring an increase on daily interactivity use. One of that was the adoption of a terrestrial digital television system that, when compared to legacy analog broadcast systems, yields more than sounds and images of better quality, but also makes it possible to receive TV signals on portable devices and mobile television receivers besides enabling interactivity. Owing to the importance of television as a media platform in Brazil (it is present in 96,9% households) a analysis of Quality of Experience (QoE) was made, measuring the user perception with an interactive application of terrestrial digital television. Such an application was developed using NCL language, which is the standard declarative language of Brazilian digital television system (ISDB-TB). In that application a secondary video is loaded through a broadband Internet access simultaneously with the main video being received thru broadcasting. A test platform was created where IP packet losses was introduced in a controlled way affecting the secondary video, as it is expected to occur in a real network. Video quality was assessed for each loss level with objective metrics in order to compare QoE in each situation.
"Energy and Quality-Aware Multimedia Signal Processing". Doctoral diss., 2012. http://hdl.handle.net/2286/R.I.15781.
Pełny tekst źródłaDissertation/Thesis
Ph.D. Electrical Engineering 2012
Wires, Kent Eugene. "Arithmetic units for digital signal processing and multimedia /". Diss., 2000. http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqdiss&rft_dat=xri:pqdiss:9995545.
Pełny tekst źródłaCheng, Le-Tien, i 鄭樂天. "Implementation of Multimedia Digital Signal Processing Module Using Partial Reconfiguration Architecture". Thesis, 2009. http://ndltd.ncl.edu.tw/handle/13047088512639675017.
Pełny tekst źródła元智大學
資訊工程學系
97
In this thesis, we propose the implement of multimedia digital image processing module using partial reconfiguration method, we choose discrete cosine transform (DCT) and inverse discrete cosine transform (IDCT) as the example, the use characteristic of the matrix transpose to build a architecture easier using partial reconfiguration implement discrete cosine transform and inverse discrete cosine transform. we use the Verilog HDL within Xilinx ISE 9.2i design tool to complete this architecture. After that, we use FPGA for function simulation and verify computation data
Chao, Wei-Min, i 趙維民. "Design and Implementation of Pyramid Architecture for Image Signal Processing in Multimedia Applications". Thesis, 2011. http://ndltd.ncl.edu.tw/handle/48940862255957534055.
Pełny tekst źródła國立臺灣大學
電子工程學研究所
99
Image-processing algorithms have played an essential role in our daily life for entertainment, video communication, and computer vision. Various kinds of algorithms are linked together to carry out a super filtering to retrieve meaningful information from 2-D images. To carry out these algorithms in the real-time performance with the modern VLSI design, parallelism is a major architecture design skill to seek for a way to a framework with many computing units and separated memory modules. Larger problems can be divided into several tasks with pieces of the interested data and solved simultaneously on this architecture. During the parallelizing, it is usually a bottleneck to get data ready for computing units and keep dependency. In this dissertation, we address designing image-processing algorithms in tiles and discuss benefits and issues. We then proposed a pyramid architecture for tile-based image-processing algorithms to be efficiently applied in various kinds of systems. In applications using CMOS image sensors, an image processing is crucial to generating high quality images. The on-chip line buffer normally dominates the total area and power dissipation due to the needed filter window buffering. As the image resolution and filter support increases, the area and power requirement increase accordingly. We propose the pyramid architecture design to efficiently process a system that the image pipeline is between an image sensor and a video coding engine. By utilizing the features of pyramid structure and block-based video/image encoder, the proposed architecture is scalable from low to high resolution and filter size. The input image is partitioned into floors of tiles to reduce frame-line buffers. Two computing schemes, immediate result reuse (IRR) and vertical snack scan (VSS), are utilized to reduce the overlapping redundant computation. A 90nm CMOS chip design with the 7×5 filter support for 3840×2160 Quad Full High Definition (QFHD) video at 30 frames/s is designed to demonstrate the performance of power and area efficiency. Compared with the traditional architecture with frame-line buffers, the proposed design has shown the power consumption is reduced by 25% to 108mW from 145mW. The chip area is reduced by 65% to 309K from 888K logic gates. The external memory bandwidth increases to 8286Mbits/s from 5972Mbits/s for YUV4:2:0, from 7963Mbits/s for YUV4:2:2, and is reduced by 30% from 11944Mbits/s for YUV4:4:4 videos. In computer-vision applications using scale-invariant feature transform (SIFT), the kernel size is a key to build a Gaussian pyramid to extract features in scale-space representations. The SIFT implementations typically involve the use of a high-power, general-purposed processor to keep high-quality results but achieve the less-than-real-time performance. For resource-limited embedded systems, the algorithm is simplified to the 3×3 or 7×7 kernel size such that a small 320×240 resolution with a weakened capability of feature extraction is feasible with the modern ASIC or a FPGA platform. We carefully examine the algorithm and separate it into the low-level and feature-level processes. A 90nm CMOS SIFT accelerator with the 15×11 filter support for 3 scales in an octave is designed by extending single-pyramid to multiple-pyramid architecture. The design integrates 791K logic gates and 204K SRAM bits. The synthesis result shows it works at 270MHz to achieve 1280×960 octaves at 204 frames/s. Compared with the software implementation on a single-core processor, the speedup is 48.5 times and the algorithm quality degrades 4.3% in the repeatability. Compared with the frame-line-buffer architecture, the SRAM usage is reduced by 89.23% from 1894 to 204 Kbits, the area efficiency is improved by 7.3 times, and the algorithm quality is improved by 34.8% in the repeatability for a single-object test. The proposed design takes additional 312 Mbytes/s bandwidth to process 640×480 videos at 30 frames/s. The architecture provides the feasibility to trade-off the global bandwidth and local SRAM usage according to system constrains. The global bandwidth can be reduced by 79% to 66 Mbytes/s while the SRAM usage increases by 7.82 times to 1597 Kbits.
Wang, Mei-Rong, i 王美蓉. "Implementation of an Integrated Signal Processing Board for a Versatile Multimedia System Based on TMS320C80". Thesis, 1998. http://ndltd.ncl.edu.tw/handle/06309175934824831413.
Pełny tekst źródłaMeei-Rong, Wang, i 王美蓉. "Implementation of an Integrated Signal Processing Board for a Versatile Multimedia System Based on TMS320C80". Thesis, 1998. http://ndltd.ncl.edu.tw/handle/97266196783399958732.
Pełny tekst źródła國立雲林科技大學
電子與資訊工程技術研究所
86
This thesis presents the design and implementation of a DSP board based on the TMS320C80 multimedia video processor (MVP).We integrate various multi-media IC components to establish a PC-based versatile multimedia codec (VMMC)system.The architecture of this VM C board comprises a high-performance C80 parel-le programmable processor, memory ( SRAM, DRAM, VRAM, EPROM ), and peipheral devices ( video capture/display, PCI interface, etc. ).In this thesis, we concentrate on the design tasks of the C80 processor, and the associated cont-rol circuits for memory and peripherals. A couple of Altera's programmable logic devices(PLD) EPM7128 are employed to embed the control circuits designed to coordinate the memory and peripherals. We use the AHDL hardware description language to verify our design, and the ORCAD capture tool for schematic entry. The VMMC board system is built as a mother board with PCI interface and epansion slots suitable for mounting daughter boards, whereby special-purpose ASIC's can be experimented with. By emphasizing on the core processor C80, we present our research and development work as follows: 1. investigation of the basic functions of peripheral devices, 2. design techniques and control flows for C80 and peripherals,3. flowcharts and illustrations of software programs,4. extensive simulation results and physical measurement of the system timing for VMMC control circuits.
Zhu, Jihai. "Low-complexity block dividing coding method for image compression using wavelets : a thesis presented in partial fulfillment of the requirements for the degree of Master of Engineering in Computer Systems Engineering at Massey University, Palmerston North, New Zealand". 2007. http://hdl.handle.net/10179/704.
Pełny tekst źródłaGrégory, Païs. "Analyse conjointe texte et image pour la caractérisation de films d'animation". Phd thesis, 2010. http://tel.archives-ouvertes.fr/tel-00750619.
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