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Gotowe bibliografie tematyczne / Modern multi-core systems

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Gotowa bibliografia na temat „Modern multi-core systems”

Autor: Grafiati

Data publikacji: 6 września 2023

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Artykuły w czasopismach na temat "Modern multi-core systems"

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Bucaioni, Alessio, Saad Mubeen, Federico Ciccozzi, Antonio Cicchetti, and Mikael Sjödin. "Modelling multi-criticality vehicular software systems: evolution of an industrial component model." Software and Systems Modeling 19, no. 5 (2020): 1283–302. http://dx.doi.org/10.1007/s10270-020-00795-5.

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Abstract Software in modern vehicles consists of multi-criticality functions, where a function can be safety-critical with stringent real-time requirements, less critical from the vehicle operation perspective, but still with real-time requirements, or not critical at all. Next-generation autonomous vehicles will require higher computational power to run multi-criticality functions and such a power can only be provided by parallel computing platforms such as multi-core architectures. However, current model-based software development solutions and related modelling languages have not been desig

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Chen, Kuo Yi, Fuh Gwo Chen, and Jr Shian Chen. "A Cost-Effective Hardware Approach for Measuring Power Consumption of Modern Multi-Core Processors." Applied Mechanics and Materials 110-116 (October 2011): 4569–73. http://dx.doi.org/10.4028/www.scientific.net/amm.110-116.4569.

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Multiple processor cores are built within a chip by advanced VLSI technology. With the decreasing prices, multi-core processors are widely deployed in both server and desktop systems. The workload of multi-threaded applications could be separated to different cores by multiple threads, such that application threads can run concurrently to maximize overall execution speed of the applications. Moreover, for the green trend of computing nowadays, most of modern multi-core processors have a functionality of dynamic frequency turning. The power-level tuning techniques are based on Dynamic Voltage a

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Pryadko, S. A., A. S. Krutogolova, A. S. Uglyanitsa, and A. E. Ivanov. "Multi-core processors use for numerical problems solutions." Radio industry (Russia) 30, no. 4 (2020): 98–105. http://dx.doi.org/10.21778/2413-9599-2020-30-4-98-105.

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Problem statement. The use of programming technologies on modern multicore systems is an integral part of an enterprise whose activities involve multitasking or the need to make a large number of calculations over a certain time. The article discusses the development of such technologies aimed at increasing the speed of solving various issues, for example, numerical modeling.Objective. Search for alternative ways to increase the speed of calculations by increasing the number of processors. As an example of increasing the calculation speed depending on the number of processors, the well-known h

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Burns, Ethan, Seth Lemons, Wheeler Ruml, and Rong Zhou. "Suboptimal and Anytime Heuristic Search on Multi-Core Machines." Proceedings of the International Conference on Automated Planning and Scheduling 19 (October 16, 2009): 42–49. http://dx.doi.org/10.1609/icaps.v19i1.13375.

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In order to scale with modern processors, planning algorithms must become multi-threaded. In this paper, we present parallel shared-memory algorithms for two problems that underlie many planning systems: suboptimal and anytime heuristic search. We extend a recently-proposed approach for parallel optimal search to the suboptimal case, providing two new pruning rules for bounded suboptimal search. We also show how this new approach can be used for parallel anytime search. Using temporal logic, we prove the correctness of our framework, and in an empirical comparison on STRIPS planning, grid path

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Zhao, Huatao, Xiao Luo, Chen Zhu, Takahiro Watanabe, and Tianbo Zhu. "Behavior-aware cache hierarchy optimization for low-power multi-core embedded systems." Modern Physics Letters B 31, no. 19-21 (2017): 1740067. http://dx.doi.org/10.1142/s021798491740067x.

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In modern embedded systems, the increasing number of cores requires efficient cache hierarchies to ensure data throughput, but such cache hierarchies are restricted by their tumid size and interference accesses which leads to both performance degradation and wasted energy. In this paper, we firstly propose a behavior-aware cache hierarchy (BACH) which can optimally allocate the multi-level cache resources to many cores and highly improved the efficiency of cache hierarchy, resulting in low energy consumption. The BACH takes full advantage of the explored application behaviors and runtime cache

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Hanafi Por, Porya Soltani, Abbas Ramazani, and Mojtaba Hosseini Toodeshki. "Temperature and performance evaluation of multiprocessors chips by optimal control method." Bulletin of Electrical Engineering and Informatics 12, no. 2 (2023): 749–59. http://dx.doi.org/10.11591/eei.v12i2.4291.

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Multi-core processors support all modern electronic devices nowadays. However, temperature and performance management are one of the most critical issues in the design of today’s microprocessors. In this paper, we propose a framework by using an optimal control method based on fan speed and frequency control of the multi-core processor. The goal is to optimize performance and at the same time avoid violating an expected temperature. Our proposed method uses a high-precision thermal and power model for multi-core processors. This method is validated on asymmetric ODROID-XU4 multi-core processor

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Chen, Yong Heng, Wan Li Zuo, and Feng Lin He. "Optimization Strategy of Bidirectional Join Enumeration in Multi-Core CPUS." Applied Mechanics and Materials 44-47 (December 2010): 383–87. http://dx.doi.org/10.4028/www.scientific.net/amm.44-47.383.

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Most contemporary database systems query optimizers exploit System-R’s Bottom-up dynamic programming method (DP) to find the optimal query execution plan (QEP) without evaluating redundant sub-plans. As modern microprocessors employ multiple cores to accelerate computations, the parallel optimization algorithm has been proposed to parallelize the Bottom-up DP query optimization process. However Top-down DP method can derive upper bounds for the costs of the plans it generates which is not available to typical Bottom-up DP method since such method generate and cost all subplans before consideri

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Sibai, Fadi N., and Ali El-Moursy. "Performance evaluation and comparison of parallel conjugate gradient on modern multi-core accelerator and massively parallel systems." International Journal of Parallel, Emergent and Distributed Systems 29, no. 1 (2013): 38–67. http://dx.doi.org/10.1080/17445760.2012.762774.

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Filman, Robert E., and Paul H. Morris. "Compiling Knowledge-Based Systems to Ada: The PrkAda Core." International Journal on Artificial Intelligence Tools 06, no. 03 (1997): 341–64. http://dx.doi.org/10.1142/s0218213097000190.

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This paper describes the implementation of PrkAda, a system for delivering, in Ada, Artificial Intelligence and object-oriented applications developed using the ProKappa system. (ProKappa is a modern, multi-paradigm knowledge-based–system development tool. It includes facilities for dynamic object management, rule-based processing, daemons, and graphical developer and end-user interfaces. ProKappa is a successor system to KEE.) Creating PrkAda required creating a run-time, Ada-language, object-system "core," and developing a compiler to Ada from ProTalk (ProKappa's high-level, backtracking-bas

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Rudenko, O., I. Domanov, and V. Kravchenko. "TECHNICAL APPROACH IN EVALUATING OF THE CHARACTERISTICS OF MULTI-CORE BALANCED NONQUADDED CABLES FOR DIGITAL COMMUNICATION SYSTEMS." Наукові праці Державного науково-дослідного інституту випробувань і сертифікації озброєння та військової техніки, no. 4 (August 19, 2020): 107–17. http://dx.doi.org/10.37701/dndivsovt.4.2020.12.

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The article proposes a variant of the technical approach in evaluating of the characteristics of multi-core balanced nonquadded cables for digital communication systems. The list of modern standards of the International Electrotechnical Commission, and also the National standards of Ukraine and the international standards which are created on their basis is presented. The proposed standards define the general requirements for communication cables, offer verifying methods for the design, structural dimensions, and materials of elements, marking and packaging. In addition, the provisions o

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