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Rozprawy doktorskie na temat „Memory and power applications”

Autor: Grafiati
Data publikacji: 7 lipca 2024
Data aktualizacji: 31 lipca 2025

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1

Wang, Xin. "Power Efficient Embedded Memory Design for Mobile Video Applications." Thesis, North Dakota State University, 2015. https://hdl.handle.net/10365/27621.

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This thesis mainly addresses the issue of low-power technology for streaming media applications. In order to ensure high output video quality under low-voltage supply, the proposed 8-bit pixel memory is sized by different bit positions. A novel MSEpixel estimation method is then developed according to bit failure rates to directly evaluate the video quality for every 8-bit sizing combination. Based on this estimation, one area-priory and one quality-priority mobile video applications are proposed by SPIDER algorithms. The results show that both luma and chroma data should be considered.
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SELMO, SIMONE. "Functional analysis of In-based nanowires for low power phase change memory applications." Doctoral thesis, Università degli Studi di Milano-Bicocca, 2017. http://hdl.handle.net/10281/153247.

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Phase change memories (PCMs), based on chalcogenide alloys (mainly Ge2Sb2Te5), are the most promising candidate for the realization of “Storage Class Memories”, which would fill the gap between ‘‘operation’’ and ‘‘storage’’ memories. PCMs are also one of the few currently available technologies for the implementation of nanoeletronic synapses in high density neuromorphic systems. The main improvements needed in order to exploit the full potential of PCMs in these innovative applications are the reduction of the programming currents and power consumption, and further cell downscaling. Thanks to
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Morrison, Matthew Arthur. "Theory, Synthesis, and Application of Adiabatic and Reversible Logic Circuits For Security Applications." Scholar Commons, 2013. https://scholarcommons.usf.edu/etd/5082.

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Programmable reversible logic is emerging as a prospective logic design style for implementation in modern nanotechnology and quantum computing with minimal impact on circuit heat generation. Adiabatic logic is a design methodology for reversible logic in CMOS where the current flow through the circuit is controlled such that the energy dissipation due to switching and capacitor dissipation is minimized. Recent advances in reversible logic using and quantum computer algorithms allow for improved computer architectures. Production of cost-effective Secure Integrated Chips, such as Smart Cards,
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Ramclam, Kenneth M. "Low-Power and Robust Level-Shifter with Contention Mitigation for Memory and Standalone Applications." Scholar Commons, 2015. https://scholarcommons.usf.edu/etd/5555.

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The scaling down of transistor sizes has imposed significant challenges in today's technology. Memories such as eDRAM, are experiencing poor retention time because of challenges such as reference voltage variation, high transistor leakage, and low cell capacitance. It can be seen that we must consider not only the first order effects, but also the second order effects to ensure we keep up with current technology trends such as Moore's law. In this thesis we explore various circuit level techniques on level shifters in order to achieve better retention time. With our research, we have addressed
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Lai, Farley. "Stream processing optimizations for mobile sensing applications." Diss., University of Iowa, 2017. https://ir.uiowa.edu/etd/5797.

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Mobile sensing applications (MSAs) are an emerging class of applications that process continuous sensor data streams to make time-sensitive inferences. Representative application domains range from environmental monitoring, context-aware services to recognition of physical activities and social interactions. Example applications involve city air quality assessment, indoor localization, pedometer and speaker identification. The common application workflow is to read data streams from the sensors (e.g, accelerometers, microphone, GPS), extract statistical features, and then present the inferred
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6

Mandlekar, Anup Shrikant. "An Application Framework for a Power-Aware Processor Architecture." Thesis, Virginia Tech, 2012. http://hdl.handle.net/10919/34484.

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The instruction-set based general purpose processors are not energy-efficient for event-driven applications. The E-textiles group at Virginia Tech proposed a novel data-flow processor architecture design to bridge the gap between event-driven applications and the target architecture. The architecture, although promising in terms of performance and energy-efficiency, was explored for limited number of applications. This thesis presents a model-driven approach for the design of an application framework, facilitating rapid development of software applications to test the architecture performance.
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7

Cortes, Christoffer, and Adam Krauser. "Android : Resource Consumption in Native and Web Applications." Thesis, Blekinge Tekniska Högskola, Sektionen för datavetenskap och kommunikation, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:bth-4681.

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There is an ongoing debate by people in the industry whether to make native or web applications. These discussions mostly surround issues about development costs, user experience and capabilities. Another aspect of this debate is the fact that mobile devices have varying hardware specifications which is another factor to consider when making this decision. What we want to shed some light on is how performance is affected on the device when using these two different approaches of application development. The use of CPU/RAM and Energy is our primary concern and in our experiment we measure these
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8

Mugisha, Dieudonne Manzi. "Exploiting Application Behaviors for Resilient Static Random Access Memory Arrays in the Near-Threshold Computing Regime." DigitalCommons@USU, 2015. https://digitalcommons.usu.edu/etd/4550.

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Near-Threshold Computing embodies an intriguing choice for mobile processors due to the promise of superior energy efficiency, extending the battery life of these devices while reducing the peak power draw. However, process, voltage, and temperature variations cause a significantly high failure rate of Level One cache cells in the near-threshold regime a stark contrast to designs in the super-threshold regime, where fault sites are rare. This thesis work shows that faulty cells in the near-threshold regime are highly clustered in certain regions of the cache. In addition, popular mobile benchm
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9

Mahato, Prabir. "Study and development of resistive memories for flexible electronic applications." Thesis, Lyon, 2020. http://www.theses.fr/2020LYSEI134.

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L’avènement de l’électronique flexible a entraîné des recherches rapides sur des capteurs, des dispositifs bio-implantables et portables pour l’évaluation de maladies telles que l’épilepsie, la maladie de Parkinson et les crises cardiaques. Les dispositifs de mémoire sont des composants majeurs dans tous les circuits électroniques, uniquement secondaires aux transistors, par conséquent de nombreux efforts de recherche sont consacrés au développement de dispositifs de mémoire flexibles. Les mémoires à accès aléatoire à pont conducteur (CBRAM) basées sur la création / dissolution d'un filament m
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10

Ly, Aliou. "Développement d’un oscillateur paramétrique optique continu intense et à faible bruit pour des applications aux communications quantiques." Thesis, Université Paris-Saclay (ComUE), 2017. http://www.theses.fr/2017SACLS528/document.

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La portée des communications quantiques est limitée à quelques dizaines de km en raison de l’atténuation dans les fibres. Les répéteurs quantiques (relais quantiques synchronisés par des mémoires quantiques photoniques) furent introduits afin d’accroître ces distances. Or, pour le moment, les mémoires les plus performantes fonctionnent à des longueurs d’onde n’appartenant pas à la bande C télécom. Afin de profiter de ces mémoires, l’utilisation d’interfaces quantiques (milieu non linéaire quadratique) fut proposée comme alternative. En ajoutant ainsi par somme de fréquences un photon de pompe
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11

Mbaye, Amadou. "Linéarisation des amplificateurs de puissance large-bande pour des applications de communications tactiques et de diffusion audio ou vidéo numérique." Thesis, Paris Est, 2015. http://www.theses.fr/2015PEST1021/document.

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L'amplificateur de puissance est le module le plus critique dans les équipements de communication radio. Il détermine la qualité de la liaison par sa linéarité et a une contribution conséquente dans la consommation de l'émetteur ; environ 60% de l'énergie consommée est consacré à l'amplification. Il est donc crucial de le faire fonctionner avec un rendement énergétique élevé. Cependant, ces deux spécifications principales de l'amplificateur que sont la linéarité et le rendement énergétique sont antagoniques. Par conséquent, la conception d'un module d'amplification de puissance suppose de trou
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12

Du, Nan. "Beyond "More than Moore": Novel applications of BiFeO3 (BFO)-based nonvolatile resistive switches." Doctoral thesis, Universitätsbibliothek Chemnitz, 2016. http://nbn-resolving.de/urn:nbn:de:bsz:ch1-qucosa-202508.

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The size reduction of transistors has been the main reason for a successful development of semiconductor integrated circuits over the last decades. Because of the physically limited downscaling of transistors, alternative technologies namely the information processing and nonvolatile resistive switches (also termed memristors) have come into focus. Memristors reveal a fast switching speed, long retention time, and stable endurance. Nonvolatile analog bipolar resistive switching with a considerable large On/Off ratio is reported in BiFeO3 (BFO)-based resistive switches. So far resistive switche
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13

Hitchcock, Yvonne Roslyn. "Elliptic curve cryptography for lightweight applications." Thesis, Queensland University of Technology, 2003. https://eprints.qut.edu.au/15838/1/Yvonne_Hitchcock_Thesis.pdf.

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Elliptic curves were first proposed as a basis for public key cryptography in the mid 1980's. They provide public key cryptosystems based on the difficulty of the elliptic curve discrete logarithm problem (ECDLP) , which is so called because of its similarity to the discrete logarithm problem (DLP) over the integers modulo a large prime. One benefit of elliptic curve cryptosystems (ECCs) is that they can use a much shorter key length than other public key cryptosystems to provide an equivalent level of security. For example, 160 bit ECCs are believed to provide about the same level of security
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14

Hitchcock, Yvonne Roslyn. "Elliptic Curve Cryptography for Lightweight Applications." Queensland University of Technology, 2003. http://eprints.qut.edu.au/15838/.

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Elliptic curves were first proposed as a basis for public key cryptography in the mid 1980's. They provide public key cryptosystems based on the difficulty of the elliptic curve discrete logarithm problem (ECDLP) , which is so called because of its similarity to the discrete logarithm problem (DLP) over the integers modulo a large prime. One benefit of elliptic curve cryptosystems (ECCs) is that they can use a much shorter key length than other public key cryptosystems to provide an equivalent level of security. For example, 160 bit ECCs are believed to provide about the same level of security
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15

Katrue, Srikanth. "Power reduction techniques for memory elements /." Online version of thesis, 2007. http://hdl.handle.net/1850/5720.

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16

Feki, Anis. "Conception d’une mémoire SRAM en tension sous le seuil pour des applications biomédicales et les nœuds de capteurs sans fils en technologies CMOS avancées." Thesis, Lyon, INSA, 2015. http://www.theses.fr/2015ISAL0018/document.

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L’émergence des circuits complexes numériques, ou System-On-Chip (SOC), pose notamment la problématique de la consommation énergétique. Parmi les blocs fonctionnels significatifs à ce titre, apparaissent les mémoires et en particulier les mémoires statiques (SRAM). La maîtrise de la consommation énergétique d’une mémoire SRAM inclue la capacité à rendre la mémoire fonctionnelle sous très faible tension d’alimentation, avec un objectif agressif de 300 mV (inférieur à la tension de seuil des transistors standard CMOS). Dans ce contexte, les travaux de thèse ont concerné la pr
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17

Dancy, Abram P. (Abram Paul). "Power supplies for ultra low power applications." Thesis, Massachusetts Institute of Technology, 1996. http://hdl.handle.net/1721.1/10069.

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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1996.<br>Includes bibliographical references (p. 101-103).<br>by Abram P. Dancy.<br>M.Eng.
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18

Nizamuddin, Muhammad Ali. "Predistortion for Nonlinear Power Amplifiers with Memory." Thesis, Virginia Tech, 2002. http://hdl.handle.net/10919/36184.

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<p>The fusion of voice and data applications, along with the demand for high data-rate applications such as video-on-demand, is making radio frequency (RF) spectrum an increasingly expensive commodity for current and future communications. Although bandwidth-efficient digital modulation alleviates part of the problem by requiring a minimal use of spectral resources, they put an extra design burden on RF engineers. RF transmitters and power amplifiers account for more than half the total maintenance cost of a base-station, while occupying nearly the same portion of space. Therefore, powe
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19

Zhu, Zhichun. "Power considerations for memory-related microarchitecture designs." W&M ScholarWorks, 2003. https://scholarworks.wm.edu/etd/1539623427.

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The fast performance improvement of computer systems in the last decade comes with the consistent increase on power consumption. In recent years, power dissipation is becoming a design constraint even for high-performance systems. Higher power dissipation means higher packaging and cooling cost, and lower reliability. This Ph.D. dissertation will investigate several memory-related design and optimization issues of general-purpose computer microarchitectures, aiming at reducing the power consumption without sacrificing the performance. The memory system consumes a large percentage of the system
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20

Hanai, Ryo. "Memory management for real-time applications." 京都大学 (Kyoto University), 2007. http://hdl.handle.net/2433/135980.

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21

Dulloor, Subramanya R. "Systems and applications for persistent memory." Diss., Georgia Institute of Technology, 2015. http://hdl.handle.net/1853/54396.

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Performance-hungry data center applications demand increasingly higher performance from their storage in addition to larger capacity memory at lower cost. While the existing storage technologies (e.g., HDD and flash-based SSD) are limited in their performance, the most prevalent memory technology (DRAM) is unable to address the capacity and cost requirements of these applications. Emerging byte-addressable, non-volatile memory technologies (such as PCM and RRAM) offer performance within an order of magnitude of DRAM, prompting their inclusion in the processor memory subsystem. Such load/store
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22

Choi, David Suho. "Integration of non-volatile memory with volatile memory for embedded memory architectures and signal processing applications." Diss., Restricted to subscribing institutions, 2008. http://proquest.umi.com/pqdweb?did=1692120591&sid=1&Fmt=2&clientId=1564&RQT=309&VName=PQD.

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23

Neagu, Mădălin. "Self-healing and secure low-power memory systems." Doctoral thesis, Universitat Politècnica de Catalunya, 2017. http://hdl.handle.net/10803/460893.

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The main objective of this thesis is to bring new contributions to the self-healing and secure systems domain. In particular, to develop a self-healing technique for memory systems and to increase security of memory systems, techniques which favor low-power consumption. In order to achieve the main objective, three major research objectives were proposed: design of an error detection and correction scheme for errors that occur in memory systems and integrate them in a memory system, design techniques to increase the security and data privacy of memory systems against different types of attacks
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24

Ruppert, Eric. "The consensus power of shared-memory distributed systems." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 2000. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape3/PQDD_0028/NQ49848.pdf.

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25

Hettiaratchi, Sambuddhi Sinha Bandara. "Power optimized memory access in high-level synthesis." Thesis, Imperial College London, 2003. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.407906.

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Tolentino, Matthew Edward. "Managing Memory for Power, Performance, and Thermal Efficiency." Diss., Virginia Tech, 2009. http://hdl.handle.net/10919/26301.

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Extraordinary improvements in computing performance, density, and capacity have driven rapid increases in system energy consumption, motivating the need for energy-efficient performance. Harnessing the collective computational capacity of thousands of these systems can consume megawatts of electrical power, even though many systems may be underutilized for extended periods of time. At scale, powering and cooling unused or lightly loaded systems can waste millions of dollars annually. To combat this inefficiency, we propose system software, control systems, and architectural techniques t
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27

Harel, Nissim. "Memory Optimizations for Distributed Stream-based Applications." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/13988.

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Distributed stream-based applications manage large quantities of data and exhibit unique production and consumption patterns that set them apart from general-purpose applications. This dissertation examines possible ways of creating more efficient memory management schemes. Specifically, it looks at the memory reclamation problem. It takes advantage of special traits of streaming applications to extend the definition of the garbage collection problem for those applications and include not only data items that are not reachable but also items that have no effect on the final outcome of the appl
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Hernandez, Allison 1979. "Analysis of magnetic random access memory applications." Thesis, Massachusetts Institute of Technology, 2002. http://hdl.handle.net/1721.1/8461.

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Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2002.<br>Includes bibliographical references (p. 45-47).<br>Magnetic Random Access Memory (MRAM) is considered to be the most viable option for nonvolatile memory in the computer industry. This need for nonvolatile computer memory has resulted in the dramatic evolution of MRAM technology in the past ten years. Currently in the latter stages of development, emphasis is being put on experiments concerning optimization of density and reduction of the switching fields of the magnetic elements. Appli
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29

Guo, Weimin M. Eng Massachusetts Institute of Technology. "Orthopaedic applications of ferromagnetic shape memory alloys." Thesis, Massachusetts Institute of Technology, 2008. http://hdl.handle.net/1721.1/45957.

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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2008.<br>Includes bibliographical references (leaves 36-40).<br>Ferromagnetic shape memory alloys (FSMAs) are a new class of magnetic field-actuated active materials with no current commercial applications. By applying a magnetic field of around 0.4 T, they can exert a stress of approximately 1.5 MPa, exhibiting a strain of up to 6%. This thesis evaluates their technical and commercial feasibility in orthopaedic applications. Remote actuation is a key advantage FSMAs have over current implant m
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Chou, Wu-chun. "Coding applications in volume holographic memory systems." Diss., The University of Arizona, 1999. http://hdl.handle.net/10150/283998.

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Volume holographic memory (VHM) systems are page-oriented optical data storage systems with a relatively large storage capacity, a high aggregate data transfer rate, and a fast access time as compared with other conventional mass data storage systems. In addition to the noise sources commonly present in a conventional communication channel, the VHM systems use a two-dimensional (2-D) data format and therefore suffers from 2-D electrical/optical hybrid noises. In this dissertation, we apply digital communication coding techniques to such a page-oriented optical memory system. To establish a cod
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Chitty, R., L. Capote, J. Kaschmitter, and D. Tuckerman. "Compact Memory Module for High Performance Applications." International Foundation for Telemetering, 1989. http://hdl.handle.net/10150/614702.

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International Telemetering Conference Proceedings / October 30-November 02, 1989 / Town & Country Hotel & Convention Center, San Diego, California<br>A common problem in many space applications is the need for a reliable large memory capacity in a light weight, low volume package. The Fairchild Space Company (FSC) is developing a high density static RAM based on VHSIC Hybrid Wafer Scale Integration (HWSI) technology for use in high reliability applications. Advances in interconnect technology and electronic packaging result in a bit density of 2.1 x 10⁷ bits per cu. in. Emphasis will be placed
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Xu, Bin. "Shape memory polymeric nanocomposites for biological applications." Thesis, Heriot-Watt University, 2011. http://hdl.handle.net/10399/2489.

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The aim of this work is to develop novel shape memory polymers (SMPs) and nanocomposites for potential biological applications. A kind of commercial SMP, shape memory polyurethane (SMPU), was used to prepare nanocomposites by incorporating nano-clay into the SMPU substrate. The mechanical behaviour, thermal property and shape memory efficiency were studied with various nanofiller loadings. Chemical synthesis methods were also employed to prepare the other designable SMP and its nanocomposites, i.e. the shape memory polystyrene co-polymer (SMPS). Multiple technologies were adopted to enhance th
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Hotton, Matthew. "The clinical applications of working memory training." Thesis, University of Oxford, 2016. https://ora.ox.ac.uk/objects/uuid:62a7a411-9624-4fc6-9330-3a279013db42.

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Working memory is involved in a variety of cognitive tasks, with working memory capacity predicting an individual's ability to process information and focus attention on taskrelated information. Subsequently, recent research has investigated whether working memory capacity can be improved through training and whether improvements generalise to other cognitive, behavioural or emotional domains. This training is typically adaptive in nature, changing in difficulty according to participant ability, and can be completed in the participant's home on a computer, giving it the potential to be an easi
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34

Josefson, Carl Elof. "Evaluation of ferroelectric materials for memory applications." Thesis, Monterey, California : Naval Postgraduate School, 1990. http://handle.dtic.mil/100.2/ADA232112.

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Thesis (M.S. in Electrical Engineering)--Naval Postgraduate School, June 1990.<br>Thesis Advisor(s): Panholzer, R. Second Reader: Neighbours, J.R. "June 1990." Description based on signature page. DTIC Identifiers(s): Nonvolitile memories, ferroelectric materials. Author(s) subject terms: Ferrorelectric, nonvolatile memory, radiation hard. Includes bibliographical references (p. 80-86). Also available online.
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Salén, Filip. "Visualization of Dynamic Memory in C++ Applications." Thesis, Luleå tekniska universitet, Institutionen för system- och rymdteknik, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-75286.

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Optimized memory management is important for a demanding application to achieve high-performance results. But un-optimized or unwanted memory behaviors can usually be difficult to detect without an overview of how memory is structured during run-time. This thesis explores real-time visualization of dynamic memory allocation for applications using the memory pool allocation technique. In the thesis, technical and graphical challenges are described together with their solutions and the design choices that were made. The final result is a program that can visualize dynamic memory management in re
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36

Blomster, Katie Ann. "Schemes for reducing power and delay in SRAMs." Online access for everyone, 2006. http://www.dissertations.wsu.edu/Thesis/Summer2006/k%5Fblomster%5F071706.pdf.

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Qi, Huan. "Memory, Movement, and MoodRetrieving the Power of Architecture as a Physical Container of Memory." University of Cincinnati / OhioLINK, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1397734632.

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38

Cheng, Yong. "Power electronics controller prototyping tool for power system applications." Master's thesis, Mississippi State : Mississippi State University, 2006. http://sun.library.msstate.edu/ETD-db/ETD-browse/browse.

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39

Das, Sauparna 1979. "Magnetic machines and power electronics for power MEMS applications." Thesis, Massachusetts Institute of Technology, 2005. http://hdl.handle.net/1721.1/34465.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005.<br>Includes bibliographical references (p. 321-323).<br>This thesis presents the modeling, design, and characterization of microfabricated, surface-wound, permanent-magnet (PM) generators, and their power electronics, for use in Watt-level Power MEMS applications such as a microscale gas turbine engine. The generators are three-phase, axial-flux, synchronous machines, comprising a rotor with an annular PM and ferromagnetic core, and a stator with multi-turn surface windings on a
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Balachandran, Ajith. "Novel power electronic device structures for power conditioning applications." Thesis, University of Sheffield, 2014. http://etheses.whiterose.ac.uk/9574/.

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The work presented in this thesis contains an investigation into the methods by which the semiconductor device performance can be improved with an aim to reduce the overall losses in the power conversion system. The types of devices discussed and evaluated in this thesis include Silicon MOSFETs, IGBT, CIGBT and GaN HEMT devices. The performance improvement methods suggested in literature usually involve a trade-off of device characteristics with one another. Therefore an investigation into new device technologies and structures is deemed necessary such that the performance trade-off can be avo
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41

Kameswar, Rao Vaddina. "Evaluation of A Low-power Random Access Memory Generator." Thesis, Linköping University, Department of Electrical Engineering, 2006. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-7823.

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<p>In this work, an existing RAM generator is analysed and evaluated. Some of the aspects that were considered in the evaluation are the optimization of the basic SRAM cell, how the RAM generator can be ported to newer technologys, automating the simulation process and the creation of the workflow for the energy model.</p><p>One of the main focus of this thesis work is to optimize the basic SRAM cell. The SRAM cell which is used in the RAM generator is not optimized for area nor power. A compact layout is suggested which saves a lot of area and power. The technology that is used to create the
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42

Mohan, Nitin. "Low-Power High-Performance Ternary Content Addressable Memory Circuits." Thesis, University of Waterloo, 2006. http://hdl.handle.net/10012/2873.

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Ternary content addressable memories (TCAMs) are hardware-based parallel lookup tables with bit-level masking capability. They are attractive for applications such as packet forwarding and classification in network routers. Despite the attractive features of TCAMs, high power consumption is one of the most critical challenges faced by TCAM designers. This work proposes circuit techniques for reducing TCAM power consumption. The main contribution of this work is divided in two parts: (i) reduction in match line (ML) sensing energy, and (ii) static-power reduction techniques. The ML se
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ZHOU, YUAN. "POWER VARIATIONS AND TEST SCHEDULING FOR EMBEDDED MEMORY ARRAYS." University of Cincinnati / OhioLINK, 2006. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1140810178.

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Ramamoorthy, Saravanan. "LOW-POWER ADDRESS POINTER DESIGN FOR FIFO MEMORY CIRCUITS." Available to subscribers only, 2009. http://proquest.umi.com/pqdweb?did=1796420511&sid=1&Fmt=2&clientId=1509&RQT=309&VName=PQD.

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Alghanim, Abdulrahman A. "High power waveform measurement system enabling characterisation of high power devices including memory effects." Thesis, Cardiff University, 2008. http://orca.cf.ac.uk/54653/.

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The increasing demand for higher data rates in wireless communication systems has led to the more effective and efficient use of all allocated frequency bands. In order to use the whole bandwidth at maximum efficiency, one needs to have RF power amplifiers with a higher linear level and memory-less performance. This is considered to be a major challenge to circuit designers. In this thesis the linearity and memory are studied and examined via the behaviour of the inter-modulation distortion (IMD). A major source of the in-band distortion can be shown to be influenced by the out-of-band impedan
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Mou, Duan. "Complex oxide films for memory and detector applications." Doctoral thesis, KTH, Electronic Systems Design, 1998. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-2715.

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Ansari, Mohammad M. "Efficient execution of concurrent applications using transactional memory." Thesis, University of Manchester, 2009. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.496238.

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Challenges in the research and development of uniprocessors have led to the rise of multi-cores. However, multi-cores introduce new challenges to software development: applications will need to be developed using concurrent programming techniques and highly scalable to improve performance on successive generations of multi-cores, i.e. as the number of cores increases. Traditionally concurrent programming has employed locks to safeguard concurrent access to shared data, but these are known to be challenging to use, and only a minority of developers have the expertise to write correct, let alone
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Zaffaroni, Paolo. "Nonlinear long memory models with applications in finance." Thesis, London School of Economics and Political Science (University of London), 1997. http://etheses.lse.ac.uk/1468/.

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The last decade has witnessed a great deal of research in modelling volatility of financial asset returns, expressed by time-varying variances and covariances. The importance of modelling volatility lies in the dependence of any financial investment decision on the expected risk and return as formalized in classical asset pricing theory. Precise evaluation of volatilities is a compulsory step in order to perform correct options pricing according to recent theories of the term structure of interest rates and for the construction of dynamic hedge portfolios. Models of time varying volatility rep
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Tsung, Chih-qu, and 鄭智聰. "Design and Applications of Low-Power Memory Generators." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/6g3e4k.

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碩士<br>國立中山大學<br>資訊工程學系研究所<br>96<br>Memory unit has become a major core component in most SoC designs, and thus reusable memory IP is crucial in speeding up the design process. In this thesis, we develop a low-power SRAM generator to reduce the design efforts by producing all the files required in traditional cell-based design flow. Several methods are used to reduce power consumption in the memory circuits, including hierarchical word-line architecture and block amplifiers. The SRAM generator can be extended to generate cache memory with mixed hard IP and soft IP where cache memory cells are h
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Panda, Soumya Ranjan. "Junctionless Nanowire : Towards Logic Circuits and Memory Applications." Thesis, 2017. http://ethesis.nitrkl.ac.in/8924/1/2017_MT_SRPanda.pdf.

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The increasing prominence of portable systems and the need to limit the power consumption (and hence heat dissipation) in very high density VLSI chips have led to rapid and innovative development of short channel multi-gate devices during the recent decades. The driving forces of these portable devices require low power consumption and must be good resilient to noise as they are being driven by very small voltages. These short channel devices need high electrostatic control over the channel which can be achieved by multiple-gate metal oxide semiconductors field effect transistors (MG-MOSFET).
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