Gotowa bibliografia na temat „Integrated Scheduler Architecture”
Utwórz poprawne odniesienie w stylach APA, MLA, Chicago, Harvard i wielu innych
Zobacz listy aktualnych artykułów, książek, rozpraw, streszczeń i innych źródeł naukowych na temat „Integrated Scheduler Architecture”.
Przycisk „Dodaj do bibliografii” jest dostępny obok każdej pracy w bibliografii. Użyj go – a my automatycznie utworzymy odniesienie bibliograficzne do wybranej pracy w stylu cytowania, którego potrzebujesz: APA, MLA, Harvard, Chicago, Vancouver itp.
Możesz również pobrać pełny tekst publikacji naukowej w formacie „.pdf” i przeczytać adnotację do pracy online, jeśli odpowiednie parametry są dostępne w metadanych.
Artykuły w czasopismach na temat "Integrated Scheduler Architecture"
M. Shahane, Priti, i Narayan Pisharoty. "Implementation of ISLIP scheduler for NOC router on FPGA". International Journal of Engineering & Technology 7, nr 2.12 (3.04.2018): 268. http://dx.doi.org/10.14419/ijet.v7i2.12.11302.
Pełny tekst źródłaZagan, Ionel, i Vasile Găitan. "Hardware RTOS: Custom Scheduler Implementation Based on Multiple Pipeline Registers and MIPS32 Architecture". Electronics 8, nr 2 (14.02.2019): 211. http://dx.doi.org/10.3390/electronics8020211.
Pełny tekst źródłaWang, Hong Chun, i Wen Sheng Niu. "Design and Analysis of AFDX Network Based High-Speed Avionics System of Civil Aircraft". Advanced Materials Research 462 (luty 2012): 445–51. http://dx.doi.org/10.4028/www.scientific.net/amr.462.445.
Pełny tekst źródłaS., Manishankar, i S. Sathayanarayana. "Performance evaluation and resource optimization of cloud based parallel Hadoop clusters with an intelligent scheduler." International Journal of Engineering & Technology 7, nr 4.20 (29.11.2018): 4220. http://dx.doi.org/10.14419/ijet.v7i4.13372.
Pełny tekst źródłaChen, Chi-Ting, Ling-Ju Hung, Sun-Yuan Hsieh, Rajkumar Buyya i Albert Y. Zomaya. "Heterogeneous Job Allocation Scheduler for Hadoop MapReduce Using Dynamic Grouping Integrated Neighboring Search". IEEE Transactions on Cloud Computing 8, nr 1 (1.01.2020): 193–206. http://dx.doi.org/10.1109/tcc.2017.2748586.
Pełny tekst źródłaAudah, Lukman, Zhili Sun i Haitham Cruickshank. "QoS based Admission Control using Multipath Scheduler for IP over Satellite Networks". International Journal of Electrical and Computer Engineering (IJECE) 7, nr 6 (1.12.2017): 2958. http://dx.doi.org/10.11591/ijece.v7i6.pp2958-2969.
Pełny tekst źródłaGuzmán Ortiz, Eduardo, Beatriz Andres, Francisco Fraile, Raul Poler i Ángel Ortiz Bas. "Fleet management system for mobile robots in healthcare environments". Journal of Industrial Engineering and Management 14, nr 1 (28.01.2021): 55. http://dx.doi.org/10.3926/jiem.3284.
Pełny tekst źródłaDong, Zihang, Yunming Cao, Naixue Xiong i Pingping Dong. "EE-MPTCP: An Energy-Efficient Multipath TCP Scheduler for IoT-Based Power Grid Monitoring Systems". Electronics 11, nr 19 (28.09.2022): 3104. http://dx.doi.org/10.3390/electronics11193104.
Pełny tekst źródłaLyu, Chenghao, Qi Fan, Fei Song, Arnab Sinha, Yanlei Diao, Wei Chen, Li Ma i in. "Fine-grained modeling and optimization for intelligent resource management in big data processing". Proceedings of the VLDB Endowment 15, nr 11 (lipiec 2022): 3098–111. http://dx.doi.org/10.14778/3551793.3551855.
Pełny tekst źródłaDossis, Michael F. "Formal ESL Synthesis for Control-Intensive Applications". Advances in Software Engineering 2012 (27.06.2012): 1–30. http://dx.doi.org/10.1155/2012/156907.
Pełny tekst źródłaRozprawy doktorskie na temat "Integrated Scheduler Architecture"
Saranya, N. "Efficient Schemes for Partitioning Based Scheduling of Real-Time Tasks in Multicore Architecture". Thesis, 2015. https://etd.iisc.ac.in/handle/2005/4495.
Pełny tekst źródłaCzęści książek na temat "Integrated Scheduler Architecture"
Guevara, Ivan, Hafiz Ahmad Awais Chaudhary i Tiziana Margaria. "Model-Driven Edge Analytics: Practical Use Cases in Smart Manufacturing". W Lecture Notes in Computer Science, 406–21. Cham: Springer Nature Switzerland, 2022. http://dx.doi.org/10.1007/978-3-031-19762-8_29.
Pełny tekst źródłaMueller-Gritschneder, Daniel, Eric Cheng, Uzair Sharif, Veit Kleeberger, Pradip Bose, Subhasish Mitra i Ulf Schlichtmann. "Cross-Layer Resilience Against Soft Errors: Key Insights". W Dependable Embedded Systems, 249–75. Cham: Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-52017-5_11.
Pełny tekst źródłaLane, Jo Ann, i Barry Boehm. "System-of-Systems Cost Estimation". W Emerging Systems Approaches in Information Technologies, 204–13. IGI Global, 2010. http://dx.doi.org/10.4018/978-1-60566-976-2.ch012.
Pełny tekst źródłaLane, Jo Ann, i Barry Boehm. "System-of-Systems Cost Estimation". W Enterprise Information Systems, 986–96. IGI Global, 2011. http://dx.doi.org/10.4018/978-1-61692-852-0.ch406.
Pełny tekst źródłaBreur, Tom. "Business Intelligence Architecture in Support of Data Quality". W Information Quality and Governance for Business Intelligence, 363–81. IGI Global, 2014. http://dx.doi.org/10.4018/978-1-4666-4892-0.ch019.
Pełny tekst źródłaSandhu, Rajinder, Adel Nadjaran Toosi i Rajkumar Buyya. "An API for Development of User-Defined Scheduling Algorithms in Aneka PaaS Cloud Software". W Handbook of Research on Cloud Computing and Big Data Applications in IoT, 170–87. IGI Global, 2019. http://dx.doi.org/10.4018/978-1-5225-8407-0.ch009.
Pełny tekst źródłaDavey, K., A. Moergeli, J. J. Brady, S. A. Saki, R. J. F. Goodfellow i A. Del Amo. "Bart Silicon Valley Phase II – integrated cost & schedule life-cycle comparative risk analysis of single-bore versus twin-bore tunneling". W Tunnels and Underground Cities: Engineering and Innovation meet Archaeology, Architecture and Art, 4425–34. CRC Press, 2020. http://dx.doi.org/10.4324/9781003031659-15.
Pełny tekst źródłaDavey, K., A. Moergeli, J. J. Brady, S. A. Saki, R. J. F. Goodfellow i A. Del Amo. "Bart Silicon Valley Phase II – integrated cost & schedule life-cycle comparative risk analysis of single-bore versus twin-bore tunneling". W Tunnels and Underground Cities: Engineering and Innovation meet Archaeology, Architecture and Art, 4425–34. CRC Press, 2019. http://dx.doi.org/10.1201/9780429424441-468.
Pełny tekst źródłaDavey, K., A. Moergeli, J. J. Brady, S. A. Saki, R. J. F. Goodfellow i A. Del Amo. "Bart Silicon Valley Phase II – integrated cost & schedule life-cycle comparative risk analysis of single-bore versus twin-bore tunneling". W Tunnels and Underground Cities: Engineering and Innovation meet Archaeology, Architecture and Art, 4425–34. CRC Press, 2020. http://dx.doi.org/10.1201/9781003031659-15.
Pełny tekst źródłaAlhakkak, Nada M. "BigGIS With Hadoop in MapReduce Environment". W Handbook of Research on Digital Research Methods and Architectural Tools in Urban Planning and Design, 25–32. IGI Global, 2019. http://dx.doi.org/10.4018/978-1-5225-9238-9.ch002.
Pełny tekst źródłaStreszczenia konferencji na temat "Integrated Scheduler Architecture"
Jessop, Simon, Scott Valentine i Michael Roemer. "CBM Integrated Maintenance Scheduler". W ASME Turbo Expo 2008: Power for Land, Sea, and Air. ASMEDC, 2008. http://dx.doi.org/10.1115/gt2008-51375.
Pełny tekst źródłaKohutka, Lukas, i Viera Stopjakova. "ASIC Architecture and Implementation of RED Scheduler for Mixed-Criticality Real-Time Systems". W 2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES). IEEE, 2020. http://dx.doi.org/10.23919/mixdes49814.2020.9156070.
Pełny tekst źródłaKohutka, Lukas. "A New FPGA - based Architecture of Task Scheduler with Support of Periodic Real-Time Tasks". W 2022 29th International Conference on Mixed Design of Integrated Circuits and System (MIXDES). IEEE, 2022. http://dx.doi.org/10.23919/mixdes55591.2022.9838055.
Pełny tekst źródłaCarlos Junior, Francisco, Ivan Silva i Ricardo Jacobi. "A Partially Shared Thin Reconfigurable Array For Multicore Processor". W IX Simpósio Brasileiro de Engenharia de Sistemas Computacionais. Sociedade Brasileira de Computação - SBC, 2019. http://dx.doi.org/10.5753/sbesc_estendido.2019.8645.
Pełny tekst źródłaLaliberty, Thomas J., David W. Hildum, Norman M. Sadeh, John McA’Nulty, Dag Kjenstad, Robert V. E. Bryant i Stephen F. Smith. "A Blackboard Architecture for Integrated Process Planning/Production Scheduling". W ASME 1996 Design Engineering Technical Conferences and Computers in Engineering Conference. American Society of Mechanical Engineers, 1996. http://dx.doi.org/10.1115/96-detc/dfm-1291.
Pełny tekst źródłaYuan, Chengyin, i Placid Ferreira. "An Integrated Environment for the Design and Control of Deadlock-Free Flexible Manufacturing Cells". W ASME 2004 International Mechanical Engineering Congress and Exposition. ASMEDC, 2004. http://dx.doi.org/10.1115/imece2004-61213.
Pełny tekst źródłaFessy, Antoine, Sivananthan Jothee, Sebastien Jacquemin, Jonathan Sammon, Carolina Cruz, Igor Ferreira, Jill Bell, Hariz Akmal Hosen i Amirul Asraf Askat. "Leveraging an Integrated Execution Model, Digital FEED Platform and Product Standardisation to Improve Project CAPEX". W Offshore Technology Conference Asia. OTC, 2022. http://dx.doi.org/10.4043/31583-ms.
Pełny tekst źródłaLima, Clecio D., Kentaro Sano, Hiroaki Kobayashi, Tadao Nakamura i Michael J. Flynn. "A Technology-Scalable Multithreaded Architecture". W Simpósio de Arquitetura de Computadores e Processamento de Alto Desempenho. Sociedade Brasileira de Computação, 2001. http://dx.doi.org/10.5753/sbac-pad.2001.22197.
Pełny tekst źródłaLiu, Yuan, Manuj Dhingra i J. V. R. Prasad. "Benefits of Active Compressor Stability Management on Turbofan Engine Operability". W ASME Turbo Expo 2008: Power for Land, Sea, and Air. ASMEDC, 2008. http://dx.doi.org/10.1115/gt2008-51307.
Pełny tekst źródłaStough, John, Tom DuBois, Leslie Hyatt, Alan Hammond i Chris Kellow. "A Holistic Approach to Open Systems Architecture for Army Aviation". W Vertical Flight Society 75th Annual Forum & Technology Display. The Vertical Flight Society, 2019. http://dx.doi.org/10.4050/f-0075-2019-14551.
Pełny tekst źródła