Książki na temat „Integrated circuits Very large scale integration Design and construction Data processing”

Rubin, Steven. Computer aids for VLSI design. Reading, Mass: Addison-Wesley, 1987.

Walker, Duncan Moore Henry. Yield simulation for integrated circuits. Boston: Kluwer Academic Publishers, 1987.

Brackenbury, Linda E. M. Design of VLSI systems -: A practical introduction. London: Macmillan, 1987.

Wong, D. F. Simulated annealing for VLSI design. Boston: Kluwer Academic, 1988.

Lengauer, Thomas. Combinatorial algorithms for integrated circuit layout. Chichester: Wiley, 1990.

1958-, Leeser M., Brown G. 1960- i Cornell University. Mathematical Sciences Institute., red. Hardware specification, verification, and synthesis: Mathematical aspects : proceedings. Berlin: Springer-Verlag, 1990.

Attia, John Okyere. PSPICE and MATLAB for electronics: An integrated appraoch. Boca Raton, Fla: CRC Press, 2002.

Fabricius, Eugene D. Introduction to VLSI design. New York: McGraw-Hill, 1990.

Advanced Research Working Conference on Correct Hardware Design Methodologies (1995 Frankfurt/Main, Germany). Correct hardware design and verification methods: IFIP WG 10.5 advanced research working conference, CHARME '95, Frankfurt/Main, Germany, October 2-4, 1995 : proceedings. Berlin: Springer, 1995.

Holden, Tony. Knowledge based CAD and microelectronics. Amsterdam: North-Holland, 1987.

Joobbani, Rostam. An artificial intelligence approach to VLSI routing. Boston: Kluwer Academic Publishers, 1986.

Attia, John Okyere. PSPICE and MATLAB for electronics: An integrated approach. Wyd. 2. Boca Raton: CRC Press, 2010.

Ravikumār, C. P. Parallel methods for VLSI layout design. Norwood, N.J: Ablex, 1996.

Cornell University. Mathematical Sciences Institute. Workshop. Hardware specification, verification, and synthesis: Mathematical aspects : proceedings. Berlin: Springer-Verlag, 1990.

Trimberger, Stephen. An introduction to CAD for VLSI. Boston: Kluwer Academic Publishers, 1987.

Bellaouar, Abdellatif. Low-power digital VLSI design: Circuits and systems. Boston: Kluwer Academic Publishers, 1995.

1959-, Nakhla Michel S., i Zhang Q. J, red. Modeling and simulation of high speed VLSI interconnects. Boston: Kluwer Academic Publishers, 1994.

1937-, Ruehli A. E., red. Circuit analysis, simulation and design. Amsterdam: North-Holland, 1987.

1937-, Ruehli A. E., red. Circuit analysis, simulation, and design: Part 1. Amsterdam: North-Holland, 1986.

Smith, Stewart G. Serial-data computation. Boston: Kluwer Academic Publishers, 1988.

International Workshop on Logic and Architecture Synthesis for Silicon Compilers (1988 Grenoble, France). Logic and architecture synthesis for silicon compilers: Proceedings of the International Workshop onLogic and Architecture Synthesis for Silicon Compilers held in Grenoble, France, 25-27 May, 1988. Amsterdam: North-Holland, 1989.

International Workshop on Logic and Architecture Synthesis for Silicon Compilers (1988 Grenoble, France). Logic and architecture synthesis for silicon compilers: Proceedings of the International Workshop on Logic and Architecture Synthesis for Silicon Compilers held in Grenoble, France, 25-27 May, 1988. Amsterdam: North-Holland, 1989.

International Conference on VLSI Design (8th 1995 New Delhi, India). Proceedings of the 8th International Conference on VLSI Design, January 4-7, 1995, New Delhi, India. Los Alamitos, Calif: IEEE Computer Society Press, 1995.

Great, Lakes Symposium on VLSI (1st 1991 Kalamazoo Mich ). Proceedings, First Great Lakes Symposium on VLSI, March 1-2, 1991, Kalamazoo, Michigan. Los Alamitos, Calif: IEEE Computer Society Press, 1991.

Lamb, Peter Russell. Object-oriented techniques for mixed-mode circuit simulation. Konstanz: Hartung-Gorre, 1991.

McCalla, William J. Fundamentals of computer-aided circuit simulation. Boston: Kluwer Academic Publishers, 1987.

Stok, Leon. Architectural synthesis and optimization of digital systems / door Leon Stok. Helmond [Netherlands]: Wibro Dissertatiedrukkerij, 1991.

IFIP WG 10.5 Advanced Research Working Conference CHARME '95 (1995 Frankfurt/Main, Germany). Correct hardware design and verification methods: IFIP WG 10.5 advanced research working conference, CHARME '95, Frankfurt/Main, Germany, October 2-4, 1995 : proceedings. Berlin: Springer, 1995.

Advanced Research Working Conference on Correct Hardware Design Methodologies (1995 Frankfurt/Main, Germany). Correct hardware design and verification methods: IFIP WG10.5 advanced research working conference, CHARME 9̕5, Frankfurt/Main, Germany, October 2-4, 1995 : proceedings. Berlin: Springer, 1995.

Healey, Steven Thomas. Abstract partitioning and routing of logic networks for custom module generation. Urbana, Ill. (1304 W. Springfield Ave., Urbana 61801-2987): Dept. of Computer Science, University of Illinois at Urbana-Champaign, 1987.

Bürgin, Felix. Low-power circuit architectures and clocking strategies for digital hearing aids. Konstanz: Hartung-Gorre, 2008.

Golze, Ulrich. VLSI chip design with the hardware description language VERILOG: An introduction based on a large RISC processor design. Berlin: Springer, 1996.

Hill, Fredrick J. Computer aided logical design with emphasis on VLSI. Wyd. 4. New York: Wiley, 1993.

Fabricius, Eugene D. Introduction to VLSI design. New York: McGraw-Hill, 1990.

Stroobandt, Dirk. A priori wire length estimates for digital design. Boston: Kluwer Academic Publishers, 2001.

Leung, Steven S. ASIC system design with VHDL: A paradigm. Boston: Kluwer Academic Publishers, 1989.

Anner, George E. Planar processing primer. New York, N.Y: Van Nostrand Reinhold, 1990.

H, Meng Teresa, i Malik Sharad, red. Asynchronous circuit design for VLSI signal processing. Boston: Kluwer Academic, 1994.

Castellano, Robert N. Semiconductor device processing: Technology trends in the VLSI era. Philadelphia, Pa., U.S.A: Gordon and Breach Science Publishers, 1993.

1945-, Stroeve Pieter, i American Chemical Society. Division of Industrial and Engineering Chemistry., red. Integrated circuits: Chemical and physical processing : developed from the winter symposium. Washington, D.C: American Chemical Society, 1985.

Kong, Jeong-Taek. Digital timing macromodeling for VLSI design verification. Boston: Kluwer Academic, 1995.

Wassner, Jürgen. Data statistics and low-power digital VLSI. Konstanz: Hartung-Gorre, 2001.

Minato, Shin-ichi. Binary decision diagrams and applications for VLSI CAD. Boston: Kluwer Academic Publishers, 1996.

PATMOS 2002 (12th 2002 Seville, Spain). Integrated circuit design: Power and timing modeling, optimization and simulation ; 12th international workshop, PATMOS 2002, Seville, Spain, September 11-13, 2002 ; proceedings. Berlin: Springer, 2002.

Chatterjee, Pallab. Legacy data: A structured methodology for device migration in DSM technology. Boston: Kluwer Academic Publishers, 2003.

Devadas, Srinivas. Logic synthesis. New York: McGraw-Hill, 1994.

McGeer, Patrick C. Integrating functional and temporal domains in logic design: The false path problem and its implications. Boston: Kluwer Academic, 1991.

Maheshwari, Naresh. Timing analysis and optimization of sequential circuits. Boston, Mass: Kluwer Academic, 1999.

Zobrist, George W. Progress in Computer Aided Vlsi Design: Implementations (Progress in Computer-Aided V L S I Design). Ablex Pub, 1990.

Zobrist, George W. Progress in Computer Aided Vlsi Design: Techniques (Progress in Computer-Aided V L S I Design). Ablex Publishing Corporation, 1990.