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1

Alles, Joan. "Investigations on flashover of polluted insulators : Influence of silicone coating on the behavior of glass insulators under steep front impulse". Thesis, Lyon, 2017. http://www.theses.fr/2017LYSEC058.

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Cette thèse s’inscrit dans le cadre de l’amélioration du comportement électrique des isolateurs de lignes haute tension ; l’objectif est d’assurer une meilleure fiabilité et qualité d’alimentation en énergie électrique. Ce travail a été motivé par la nécessité de répondre à trois questions liées au comportement des isolateurs verre en zone polluée. La première porte sur la recherche d’une méthode permettant de calculer la tension de contournement des chaînes polluées selon le type d’isolateur et ses caractéristiques. La deuxième question concerne la différence de comportement entre les isolateurs en verre et les isolateurs en porcelaine de type « outerrib » ; ce type d’isolateurs présente une forme spécifique adaptée aux environnements à forte pollution. Les tensions de contournement ainsi que les trajectoires de l’arc sur les isolateurs en verre sont très différentes de celles observées avec les isolateurs en porcelaine. Et la troisième question est relative à la défaillance des isolateurs recouverts de silicone lors des essais en chocs (des impulsions de tension) à front raide. En effet, les isolateurs recouverts d’une couche de 0.3 mm (ou plus) de silicone hydrophobe explosent lorsqu’ils sont soumis à des impulsions de tension à front raide d’amplitude très élevée pendant un temps très court. Différents mécanismes pouvant être à l’origine de l’explosion/éclatement des isolateurs recouverts d’une couche de silicone sont discutés. Il ressort des différents tests et analyses que le mécanisme le plus probable semble être la fragmentation par plasma. En effet, suite à l’application d’une tension à front raide, d’amplitude très élevée, des canaux (fissures) microscopiques prennent naissance là où le champ électrique est le plus intense. L’application répétitive des chocs de tension conduit au développement de décharges dans ces canaux (rupture diélectrique de l’air) c’est-à-dire des arcs (canaux de plasma) qui se développent/propagent dans le volume de l’isolateur. La puissance déchargée (c’est-à-dire l’énergie stockée dans les condensateurs du générateur en des temps très courts) dans ces canaux à chaque choc étant très élevée, elle conduit à l’explosion de l’isolateur après quelques chocs (parfois 5 ou 6 suffisent): c’est la fragmentation par plasma
This thesis deals with the improvement of the electrical behavior of insulators of high voltage lines; the objective is to ensure better reliability and quality of power supply. This work was motivated by the need to answer three questions related to the behavior of glass insulators in polluted areas. The first one concerns the search for method for calculating the flashover voltage of polluted chains according to the type of insulator and its characteristics. The second question concerns the difference in behavior between glass insulators and "outerrib" porcelain insulators; this type of insulator has a specific shape adapted to environments with high pollution. The flashover voltages as well as the trajectories of the arc on glass insulators are very different from those observed with porcelain insulators. And the third issue is the failure of silicon-coated insulators during shock tests (pulses) with a steep front. Indeed, insulators coated with a layer of 0.3 mm (or more) of hydrophobic silicone explode when subjected to very high amplitude steep-edge voltage pulses for a very short time. Different mechanisms that may be responsible for the explosion / puncturing of insulators covered with a layer of silicone are discussed. It appears from the various tests and analyzes that the most probable mechanism seems to be plasma fragmentation (cracking). Indeed, following the application of a steep front voltage, of very high amplitude, microscopic channels (fissures) originate where the electric field is most intense. The repetitive application of impulse voltages (shocks) leads to the development of discharges in these channels (breakdown of the air), i.e.; arcs (plasma channels) which develop / propagate in the volume of the insulator. The discharged power (i.e.; the energy stored in the capacitors of the generator in a very short times) in these channels (cracks) at each shock being very high, leads to the explosion of the insulator after some shocks (5 to 6 sometimes): it is the fragmentation by plasma or plasma cracking
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2

Nguyen, Duc Hai. "Source-insulator interaction in high-voltage pollution tests". Thesis, McGill University, 1989. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=74235.

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This work develops a digital-computer simulation of the interaction between an artificially polluted insulator and a high-voltage direct-current (HVDC) or an alternating-current (AC) source configuration.
The polluted-insulator model includes conditions for the existance of arcs on contaminated surfaces; arc motion, speed of arc propagation, and arc reignition criteria; and thermodynamic phenomena in an unbridged wet layer. The effect of the source parameters on the leakage current waveform, the dynamic voltage drop and the critical flashover voltage is systematically investigated and supported by experimental results. The simulation results are used to establish the HV test source requirements and provide guidance for the design of the test source.
For an AC source, it is important to consider the equivalent shunt capacitance in addition to the short-circuit current and the transformer reactance/resistance ratio when interpreting pollution test results. The use of series capacitance to compensate for a weak source is also considered.
In the case of a DC source, the mean voltage drop during a critical leakage current impulse proves to be a better indicator of the error in the measured critical voltage. The studies are extended for the DC source configurations most commonly used by power utilities today.
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3

Šedivý, Matúš. "Vliv vysokého napětí na různé materiály v nízkém a vysokém vakuu". Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2017. http://www.nusl.cz/ntk/nusl-318194.

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The beginning of this thesis contains an overview of properties of the insulators, and description of insulators that were used for in depth research of surface breakdown in vacuum. Furthermore, this work focuses on mechanisms of an electric breakdown initiation at the interface of the solid insulator and surrounding low pressure gas. Multiple methods for measurements of dielectric strength are examined. The experimental part describes the measurements performed in the vacuum chamber. The results of these measurements are then analysed. In conclusion, used insulators are compared and suggestions for further work are given.
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4

Heinle, Ulrich. "Vertical High-Voltage Transistors on Thick Silicon-on-Insulator". Doctoral thesis, Uppsala universitet, Fasta tillståndets elektronik, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-3179.

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More and more electronic products, like battery chargers and power supplies, as well as applications in telecommunications and automotive electronics are based on System-on-Chip solutions, where signal processing and power devices are integrated on the same chip. The integration of different functional units offers many advantages in terms of reliability, reduced power consumption, weight and space reduction, leading to products with better performance at a hopefully lower price. This thesis focuses on the integration of vertical high-voltage double-diffused MOS transistors (DMOSFETs) on Silicon-on-Insulator (SOI) substrates. MOSFETs possess a number of features which makes them indispensable for Power Integrated Circuits (PICs): high switching speed, high efficiency, and simple drive circuits. SOI substrates combined with trench technology is superior to traditional Junction Isolation (JI) techniques in terms of cross-talk and leakage currents. Vertical DMOS transistors on SOI have been manufactured and characterized, and an analytical model for their on-resistance is presented. A description of self-heating and operation at elevated temperatures is included. Furthermore, the switching dynamics of these components is investigated by means of device simulations with the result that the dissipated power during unclamped inductive switching tests is reduced substantially compared to bulk vertical DMOSFETs. A large number of defects is created in the device layer if the trenches are exposed to high temperatures during processing. A new fabrication process with back-end trench formation is introduced in order to minimize defect generation. In addition, a model for the capacitive coupling between trench-isolated structures is developed.
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5

Warnock, Shireen M. "Dielectric reliability in high-voltage GaN metal-insulator-semiconductor high electron mobility transistors". Thesis, Massachusetts Institute of Technology, 2017. http://hdl.handle.net/1721.1/112032.

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Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.
Cataloged from PDF version of thesis.
Includes bibliographical references.
As the demand for more energy-efficient electronics increases, GaN has emerged as a promising transistor material candidate for high-voltage power management applications. The AlGaN/GaN Metal-Insulator-Semiconductor High Electron Mobility Transistor (MIS-HEMT) constitutes the most suitable device structure for this application as it offers lower gate leakage than its HEMT counterpart. GaN has excellent material properties, but there are still many challenges to overcome before its widespread commercial deployment. Time-dependent dielectric breakdown (TDDB), a catastrophic condition arising after prolonged high-voltage gate stress, is a particularly important concern. This thesis investigates this crucial reliability issue in depth. Using a robust characterization strategy, we have studied not only the dielectric breakdown behavior in GaN MIS-HEMTs but also the evolution of the device subthreshold characteristics in the face of high bias stress. This allows us to work towards understanding on a more physical level the underlying degradation behind dielectric breakdown in order to inform future device lifetime models. We begin by looking at positive gate stress TDDB, a classic condition studied in the silicon CMOS community for many years. In order to understand the impact of TDDB, we must also understand how transient degradation effects such as threshold voltage (VT) shift may impact our results and ensure we can disentangle the permanent degradation associated with TDDB. With the foundational understanding of TDDB we establish under these positive gate stress conditions, we turn our attention to OFF-state stress which is a more relevant stress condition that mimics the most common state of these GaN power switching transistors in power management circuits. In order to develop accurate lifetime models for GaN MIS-HEMTs, we show that much care must be taken to ensure that device lifetime does not become distorted by transient trapping-related degradation effects. It is also crucial to have a physics-based lifetime model that gives confidence in making lifetime projections from data collected in the span of hours to lifetime estimations on the order of many years.
by Shireen Warnock.
Ph. D.
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6

Noborio, Masato. "Fundamental Study on SiC Metal-Insulator-Semiconductor Devices for High-Voltage Power Integrated Circuits". 京都大学 (Kyoto University), 2009. http://hdl.handle.net/2433/78006.

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7

Banik, Apu. "Condition assessment of high voltage insulators in different environments with non-sinusoidal excitation". Thesis, Queensland University of Technology, 2020. https://eprints.qut.edu.au/206148/1/Apu_Banik_Thesis.pdf.

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This project was a step forward in investigating the effect of supply voltage harmonic contents on the measured leakage current of polluted insulators operating in different environments. This study was then used as a basis for developing a sound theoretical understanding of the effects of supply voltage harmonic contents on the measured leakage current characteristics. This study was also used to develop a new condition monitoring index for the polluted insulator under harmonically distorted supply voltage.
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8

Vosloo, Wallace L. (Wallace Lockwood). "A comparison of the performance of high-voltage insulator materials in a severely polluted coastal environment". Thesis, Stellenbosch : Stellenbosch University, 2002. http://hdl.handle.net/10019.1/52625.

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Thesis (PhD)--University of Stellenbosch, 2002.
ENGLISH ABSTRACT: The main aim of this research programme was to compare the relative performance of different insulator materials used in South Africa when subjected to a severe marine pollution environment. A test programme and procedure, test facility and instrumentation were established. Some novel instrumentation and monitoring equipment were developed and built specifically for this research programme, supported by data analysing software programs. In order to compare material performance only, all non-material design variables between the test insulators had to be removed (e.g. creepage distance, connecting length, inter-shed spacing, profile, etc.). To achieve this some of the test insulators had to be specially manufactured. Leakage current, electrical discharge activity, climatic and environmental data was collected successfully over a one-year test period, starting with new test insulators. The peak and energy values of the leakage current were identified as the two main parameters needed to describe the leakage current activity on the test insulators. A correlation was found between the climatic and environmental data and the leakage current data, and it was found that the leakage current can be determined successfully from some of the climatic and environmental parameters monitored by using multiple regression techniques. Surface conductivity and energy were found to be the best parameters to show the maximum and continuous interaction of the insulator material surface with the electrolytic pollution layer. A natural ageing and pollution test procedure was developed, which has become a South African standard and is gaining international acceptance. A model and hypothesis are proposed to describe the electrical discharge activity that takes place on the test insulators and explain the difference in leakage current performance of the various materials. Keywords: Insulator, Pollution, High Voltage, Leakage current, Material performance.
AFRIKAANSE OPSOMMING: Die hoofdoel van hierdie navorsingsprogram was om die relatiewe prestasie van verskillende isolatormateriale wat in Suid-Afrika gebruik word te vergelyk in 'n swaar besoedelde marine omgewing. 'n Toetsprogram en prosedure, toets fasiliteit en instrumentasie is gevestig. 'n Paar nuwe instrumente en moniteer toerusting is ontwikkel en gebou spesifiek vir hierdie navorsingsprogram, gesteun deur data analise sagteware programme. Ten einde slegs materiaalprestasie te vergelyk, moes alle nie-materiaal ontwerpsveranderlikes tussen die toetsisolators verwyder word (bv. kruipafstand, konnekteer lengte, tussen-skerm spasiëring, profiel, ens.). Om dit reg te kry moes sommige van die toetsisolators spesiaal vervaardig word. Lekstroom, elektriese ontladingsaktiwiteit, klimaat en omgewingsdata is suksesvol versameloor 'n een-jaar toetsperiode, beginnende met nuwe toets isolators. Die piek en energie waardes van die lekstroom is identifiseer as die twee hoof parameters wat nodig is om die lekstroomaktiwiteit op die toetsisolators te beskryf. 'n Korrelasie is gevind tussen die klimaat- en omgewingsdata en die lekstroom data, en dit is gevind dat die lekstroom data suksesvol bepaal kan word van sekere van die klimaat- en omgewingsparameters wat gemoniteer is deur veelvoudige regressie tegnieke te gebruik. Oppervlakskonduktiwiteit en energie is gevind die beste parameters te wees om die maksimum en kontinue interaksie van die isolatormateriaaloppervlak met die elektrolitiese besoedelingslaag aan te toon. 'n Natuurlike veroudering en besoedeling toetsprosedure is ontwikkel, wat 'n Suid-Afrikaanse standaard geword het en besig is om internastionale aanvaarding te wen. 'n Model en hipotese word voorgestelom die elektriese ontladingsaktiwiteit wat op die toetsisolators plaasvind te beskryf en om die verskil in lekstroomprestasie van die verskeie materiale te verduidelik. S/eufelwoorde: Isolator, Besoedeling, Hoog Spanning, Leek stroom, Materiaal prestasie.
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9

Atari, Jabarzadeh Sevil. "Prevention of Biofilm Formation on Silicone Rubber Materials for Outdoor High Voltage Insulators". Doctoral thesis, KTH, Polymera material, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-174091.

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Microbial colonization on the surface of silicone rubber high voltage outdoor insulators often results in the formation of highly hydrated biofilm that influence the surface properties, such as surface hydrophobicity. The loss of hydrophobicity might lead to dry band formation, and, in the worst cases, flashover and failure of the insulator. In this work, the biocidal effects of various antimicrobial compounds in silicone rubber materials were determined. These materials were evaluated according to an ISO standard for the antimicrobial activity against the growth of aggressive fungal strains, and microorganisms that have been found colonizing the surfaces of outdoor insulators in several areas in the world. Several compounds suppressed microbial growth on the surfaces of the materials without compromising the material properties of the silicone rubber. A commercial biocide and thymol were very effective against fungal growth, and sodium benzoate could suppress the fungal growth to some extent. Thymol could also inhibit algal growth. However, methods for preservation of the antimicrobial agents in the bulk of the material need to be further developed to prevent the loss of the compounds during manufacturing. Biofilm formation affected the surface hydrophobicity and complete removal of the biofilm was not achieved through cleaning. Surface analysis confirmed that traces of microorganisms were still present after cleaning. Further, surface modification of the silicone rubber was carried out to study how the texture and roughness of the surface affect biofilm formation. Silicone rubber surfaces with regular geometrical patterns were evaluated to determine the influence of the surface texture on the extent of microbial growth in comparison with plane silicone rubber surfaces. Silicone rubber nanocomposite surfaces, prepared using a spray-deposition method that applied hydrophilic and hydrophobic nanoparticles to obtain hierarchical structures, were studied to determine the effects of the surface roughness and improved hydrophobicity on the microbial attachment. Microenvironment chambers were used for the determination of microbial growth on different modified surfaces under conditions that mimic those of the insulators in their outdoor environments. Different parts of the insulators were represented by placing the samples vertically and inclined. The microbial growth on the surfaces of the textured samples was evenly distributed throughout the surfaces because of the uniform distribution of the water between the gaps of the regular structures on the surfaces. Microbial growth was not observed on the inclined and vertical nanocomposite surfaces due to the higher surface roughness and improved surface hydrophobicity, whereas non-coated samples were colonized by microorganisms.

QC 20151002

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10

Elombo, Andreas Iyambo. "An evaluation of HTV-SR insulators with different creepage lengths under AC and bipolar DC in marine polluted service conditions". Thesis, Stellenbosch : Stellenbosch University, 2012. http://hdl.handle.net/10019.1/20236.

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Thesis (MScEng)--Stellenbosch University, 2012.
ENGLISH ABSTRACT: The use of high voltage direct current (HVDC) applications has gained enormous popularity for long distance power transmission. This is due to the lucrative benefits offered by this type of power transmission technology when compared to the traditional high voltage alternative current (HVAC). This new shift in the paradigm of power system design has led to the increased interest in the research that focuses on issues relating to the reliability of power supply associated with HVDC. Amongst such issues, insulation coordination has increasingly become a challenging task that continues to receive renewed research focus. It has been convincingly demonstrated, both from field experience and laboratory research, that insulator contamination constitutes a multifaceted phenomenon, especially when transmission voltages ramp up into high operating voltage levels. More so, this is particularly interesting with reference to the increasing applications of high voltage direct current (HVDC). The recently commissioned HVDC power-line in Namibia is one of the major motivations upon which NamPower (Namibia‟s national power utility) has committed financial resources to research on insulator pollution performance. This project was a part of NamPower‟s research initiative – seeking to investigate the phenomena associated with insulator pollution performance under natural pollution environments when energized under both AC and DC excitation voltage types. The significance of this research is especially crucial for HVDC applications given the paucity of research conducted on the DC performance of insulators, under natural pollution environments. This study was conducted at the Koeberg Insulator Pollution Test Station (KIPTS) on the west coast of Cape Town in the Western Cape province of South Africa. KIPTS is an internationally recognized insulator pollution test facility, which is widely used by both insulator manufacturers and academic researchers from many parts of the world. STRI and ABB, both Swedish-based companies, are good examples of international subscribers to the KIPTS research facility. The first objective of this research was to design a suitable DC excitation voltage system for both DC+ and DC- to be used at KIPTS. This apparatus was designed and built at the University of Stellenbosch. The second objective was to conduct a comparative evaluation of the performance of high temperature vulcanized silicone rubber (HTV-SR) power line insulators under AC, DC+ and DC- when subjected to natural pollution conditions at KIPTS. All test insulators were made from the same material and sourced from the same manufacturer – having different creepage lengths. Five different creepage lengths were considered for each excitation voltage – summing up to fifteen HTV-SR test samples. A standard DC glass disc insulator was also installed on each excitation voltage as a control sample. It was therefore envisaged that this study would give rise to new research questions, leading to future explorations on the subject. With reference to weather monitoring and leakage current measurements (using an online leakage current monitoring device - OLCA), a correlation was found to exist between the variations in climatic conditions and the corresponding occurrence of leakage current on the insulator surfaces. High leakage current levels were recorded in summer due to the high pollution levels that were measured in that season (using the equivalent salt deposit density (ESDD) approach). Winter, in contrast, had lower levels of leakage current recorded. This corresponds to a high prevalence of rainfall in winter, which caused occasional natural washing of the insulator surfaces. The leakage current levels for the HTV-SR insulators were of a similar order of magnitude for AC and DC+ and lower for DC-. The harshest pollutants (with high conductivities, as measured with the directional dust deposit gauges (DDDG)) were found to have emanated largely from the south. As a result, most instances of erosion were observed in the southward direction on the test insulators. The electrical discharge activity observations, conducted at night, had revealed that dryband corona (DBC) and dryband discharge (DBD) prominently occurred on the terminating sheaths (both live and ground ends) and bottom side of HTV-SR and glass disc insulators, respectively. This justifies the dominance of erosion that was observed on the terminating sheaths and bottom side of HTV-SR and glass disc insulators, respectively. Flashover events were recorded on the shortest HTV-SR insulator installed on DC+ and the glass disc insulator installed on DC-. All flashover events occurred in summer (the harshest season at KIPTS). Two interesting observations, albeit unexplained, were observed: star-shaped erosion on the shed bottoms of the HTV-SR insulators installed on DC+ and material peel-off at the shed-to-sheath bonding interface of the HTV-SR insulators installed on DC-. These observations therefore require further investigation in order to establish possible explanations.
AFRIKAANSE OPSOMMING: Die gebruik van hoë gelykspanning (HSGS) het baie gewild geword vir kragtransmissie oor lang afstande. Dit is as gevolg van die uitstekende voordele wat hierdie tipe tegnologie teenoor die tradisionele hoë wisselspanning (HSWS) bied. Hierdie paradigmaskuif in die ontwerp van kragstelsels het tot verhoogde belangstelling in navorsing gelei wat betrekking het op aspekte wat verband hou met die betroubaarheid van kragvoorsiening deur HSGS. Van hierdie aspekte word isolasiekoördinasie toenemend ʼn uitdagende taak en navorsing word tans daarop toegespits. Daar bestaan oortuigende bewyse, gebaseer op laboratorium- en veldtoetse dat isolatorbesoedeling ʼn verskynsel met vele fasette is, veral wanneer hoër spannings gebruik word. Dit is in „n meerdere mate van belang met verwysing na toepassings van HSGS. Die onlangs inbedryfgestelde HSGS kraglyn in Namibië is een van die hoofmotiverings vir die verskaffing van geldelike steun deur NamPower (Namibië se nasionale kragvoorsiener) vir navorsing oor die besoedelingsprestasie van isolators. Hierdie projek is deel van NamPower se navorsingsinisiatief om verskynsels betreffende die besoedelingsprestasie van isolators in natuurlik-besoedelde omgewings te ondersoek, onder WS en GS-bekragtiging. Die betekenis van hierdie navorsing is veral belangrik vir die HSGS-toepassings in die lig van die skaarsheid van navorsing oor die GS-prestasie van isolators in natuurlik-besoedelde omgewings. Hierdie studie is gedoen by die Koeberg isolatorbesoedelingstoetsstasie (KIPTS) aan die weskus van die Wes-Kaap. KIPTS is 'n internasionaal-erkende toetsfasiliteit en word algemeen gebruik deur beide isolatorvervaardigers en akademiese navorsers uit baie dele van die wêreld. STRI en ABB, albei Sweeds-gebaseerde maatskappye, is die goeie voorbeelde van die internasionale gebruikers van die KIPTS navorsingsfasiliteit. Die oogmerk van hierdie navorsing was om eerstens 'n geskikte GS-kragbron vir beide die GS+ en die GS- vir gebruik by KIPTS te ontwerp. Hierdie apparaat is ontwerp en gebou deur die Universiteit van Stellenbosch. Tweedens is 'n vergelykende evaluering van die prestasie hoë temperatuur gevulkaniseerde silikoon (HTV-SR) kraglynisolators onder WS, GS+ en GS– onder natuurlike besoedeling by die KIPTS uitgevoer. Alle toetsisolators is van dieselfde materiaal gemaak en is afkomstig van dieselfde vervaardiger, maar het verskillende kruipafstande. Vyf verskillende kruipafstande is gebruik vir elke tipe spanning  'n totaal van vyftien HTV-SR toets monsters. 'n Standaard GS glasisolatorskyf is ook vir elke spanning as' n kontrolemonster geïnstalleer. Dit kan dus verwag word dat hierdie studie aanleiding sal gee tot nuwe navorsingsvrae, wat kan lei tot verdere toekomstige ondersoeke oor die onderwerp. Met verwysing na die monitering van die weer en die lekstroommetings (met behulp van 'n aanlyn-lekstroommoniteringstoestel - OLCA), is 'n korrelasie gevind tussen die variasie in klimaatstoestande en die ooreenstemmende voorkoms van lekstroom op die isolator- oppervlaktes. Hoë lekstroomvlakke is waargeneem in die somer, as gevolg van die hoë besoedelingsvlakke wat in daardie seisoen gemeet is (met behulp van die ekwivalente soutneerslag-digtheid (ESDD) metode). In die winter, in teenstelling, is die laagste vlakke van lekstroom aangeteken. Dit stem ooreen met 'n hoë voorkoms van reënval in die winter, wat die isolatoroppervlaktes van tyd tot tyd natuurlik gewas het. Die lekstroomvlakke op die HTV-SR isolators was van soortgelyke ordegrootte vir WS en GS+ maar laer vir GS-. Dit is bevind dat die ergste besoedelingstowwe, met 'n hoë geleiding, soos gemeet met die rigtingsensitiewe stofneerslagsmeters (DDDG), hoofsaaklik uit ʼn suidelike rigting kom. As gevolg hiervan, is die meeste gevalle van erosie aan die suidekant van die toetsisolators waargeneem. Die waarneming van elektriese ontladingsaktiwiteit in die nag, het aan die lig gebring dat droëbandkorona (DBC) en droëbandontladings (DBD) prominent voorgekom het op die skedes aan die uiteindes (beide lewende en grond kante) en onderste kant van HTV-SR en glasskywe, onderskeidelik. Oorvonkings is waargeneem op die kortste HTV-SR isolator op GS+ en op die glasisolator op GS-. Al die oorvonkings het in die somer (die ergste seisoen by KIPTS) voorgekom. Twee interessante, dog onverklaarbare, verskynsels is waargeneem: stervormige erosie aan die onderkante van die skerms van die HTV-SR isolators op GS+ en material-afskilfering by die skerm-skede tussenvlak van die HTV-SR isolators op GS-. Hierdie verskynsels vereis verdere ondersoek ten einde moontlike verklarings vas te stel.
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Litty, Antoine. "Conception, fabrication, caractérisation et modélisation de transistors MOSFET haute tension en technologie avancée SOI (Silicon-On-Insulator)". Thesis, Université Grenoble Alpes (ComUE), 2016. http://www.theses.fr/2016GREAT002/document.

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A l’heure où la miniaturisation des technologies CMOS sur substrat massif atteint des limites, la technologie FDSOI (silicium sur isolant totalement déserté) s’impose comme une alternative pour l’industrie en raison de ses meilleures performances. Dans cette technologie, l’utilisation d’un substrat SOI ultramince améliore le comportement des transistors MOSFETs et garantit leur intégrité électrostatique pour des dimensions en deçà de 28nm. Afin de lui intégrer de nouvelles fonctionnalités, il devient nécessaire de développer des applications dites « haute tension » comme les convertisseurs DC/DC, les régulateurs de tension ou encore les amplificateurs de puissance. Cependant les composants standards de la technologie CMOS ne sont pas capables de fonctionner sous les hautes tensions requises. Pour répondre à cette limitation, ces travaux portent sur le développement et l’étude de transistors MOS haute tension en technologie FDSOI. Plusieurs solutions sont étudiées à l’aide de simulations numériques et de caractérisations électriques : l’hybridation du substrat (gravure localisée de l’oxyde enterré) et la transposition sur le film mince. Une architecture innovante sur SOI, le Dual Gound Plane EDMOS, est alors proposée, caractérisée et modélisée. Cette architecture repose sur la polarisation d’une seconde grille arrière pour offrir un compromis RON.S/BV prometteur pour les applications visées
Nowadays the scaling of bulk silicon CMOS technologies is reaching physical limits. In this context, the FDSOI technology (fully depleted silicon-on-insulator) becomes an alternative for the industry because of its superior performances. The use of an ultra-thin SOI substrate provides an improvement of the MOSFETs behaviour and guarantees their electrostatic integrity for devices of 28nm and below. The development of high-voltage applications such DC/DC converters, voltage regulators and power amplifiers become necessary to integrate new functionalities in the technology. However, the standard devices are not designed to handle such high voltages. To overcome this limitation, this work is focused on the design of a high voltage MOSFET in FDSOI. Through simulations and electrical characterizations, we are exploring several solutions such as the hybridization of the SOI substrate (local opening of the buried oxide) or the implementation in the silicon film. An innovative architecture on SOI, the Dual Ground Plane EDMOS, is proposed, characterized and modelled. It relies on the biasing of a dedicated ground plane introduced below the device to offer promising RON.S/BV trade-off for the targeted applications
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12

Que, Weiguo. "Electric Field and Voltage Distributions along Non-ceramic Insulators". The Ohio State University, 2002. http://rave.ohiolink.edu/etdc/view?acc_num=osu1037387155.

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13

Šalucha, Darius. "Passivation of the p-n junction edge in high-power semiconductor silicon devices". Doctoral thesis, Lithuanian Academic Libraries Network (LABT), 2009. http://vddb.library.lt/obj/LT-eLABa-0001:E.02~2009~D_20090707_154834-90672.

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Thin dielectric passivation layer is one of the basic construction elements in semiconductor device technology. There are few materials, from which the layers may be manufactured. They are oxides mainly, with Si02 as the most popular of them, although, the phosphor- and boron-silicon glasses are used as passivation layers, too. In choosing a passivant of power thyristors and diodes, there are two important considerations in addition to the usual requirement for providing uniform high breakdown voltage via substrate. One consideration is the thermal stability of the passivant to subsequent high-temperature processes. The other consideration is the bias-temperature stability of the passivation layers affecting the operation life expectancy of a device. In the technology of thyristors and diodes on silicon substrates the bias-breakdown voltage is not uniform over substrate due to non-homogeneity of passivated surface of the p-n junction. In this work, passivation of moat surface by means of electrochemical etching, formation of hydrogen-rich porous silicon layers and glass in-melting steps has been investigated. Passivation quality was controlled by the measurements of surface recombination characteristics after each technological step using a non-invasive technique, which employed microwave probed photoconductivity transients (MW-PCT). It has been shown that electrochemical etching - glass melting steps involved in passivation technological procedures resulted in a decrease of... [to full text]
Puslaidininkinių prietaisų pramušimo įtampos valdymas formuojant griovelį periferiniame perimetre yra viena iš labiausiai paplitusių technologinių operacijų, gaminant galios diodus bei tiristorius Si pagrindu. Aukštavolčių didelės galios puslaidininkinių prietaisų, kurie dirba kelių tūkstančių amperų diapazone, o uždarymo įtampa iki kelių tūkstančių voltų, didelė problema elektrinio lauko pasiskirstymas ties kristalo briauna, kur p-n sandūra išeina į paviršių ir kur vyksta griūtinis krūvininkų skaičiaus didėjimas. Darbo stabilumui užtikrinti būtina pasyvuoti paviršių kristalo periferijoje, ant profiliuoto krašto. Šiame darbe išanalizuota galingų puslaidininkinių struktūrų konstrukcija, pagrindinės charakteristikos, parametrų tarpusavio ryšis, taip pat technologinis procesas ir jo ypatumai. Išanalizuotos technologinio gamybos maršruto silpniausios pozicijos. Nustatyta izoliacinių griovelių ėsdinimo charakteristikų priklausomybė nuo ėsdiklio sudėties, nuo ėsdinimo įrenginio struktūros ir nuo ėsdiklio temperatūros kitimo. Sukurta stiklo pasyvacijos difuzinės krosnies monitoringo sistema, kuri skirta aukštų temperaturų ir dujų srautų matavimui proceso metu. Rekombinacijų charakteristikų kitimo pagalba, matuojant be kontakte MW-PCT technika, įvertinama izoliacinių griovelių pasyvacijos kokybė. Technologiniame gamybos maršrute, po izoliacinio griovelio ėsdinimo operacijos, prieš stiklo pasyvaciją sudarinėjamas porėtojo silicio sluoksnis, taip pat siūloma įvesti homogeniškumo... [toliau žr. visą tekstą]
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14

Zavattoni, Laëtitia. "Conduction phenomena through gas and insulating solids in HVDC gas insulated substations, and consequences on electric field distribution". Thesis, Grenoble, 2014. http://www.theses.fr/2014GRENT063/document.

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L'émergence des énergies renouvelables a entraîné le développement de nouvelles technologies pour la distribution de l'énergie sur de longues distances. Ces dernières sont basées sur le transport via de hautes tensions continues (HVDC) pour éviter les pertes capacitives. Ce réseau de distribution est interconnecté via des Postes Sous Enveloppes Métalliques (PSEM), dont l'isolation est composée de gaz sous pression (SF6) et d'isolants solides (résine époxy), qui doivent résister sous HVDC. Dans ces dispositifs, le champ électrique n'est plus déterminé par la permittivité relative des matériaux, mais par leurs résistivités et les phénomènes d'accumulation de charges. Dans le cas d'un isolant solide présentant une interface avec un gaz, des électrons ou des ions vont être susceptibles de se déplacer suivant les lignes de champ électrique et charger la surface de l'isolant solide. Le comportement des propriétés des isolants (solides et gazeux) constitue un enjeu majeur dans le développement de PSEM HVDC, notamment dans la compréhension des mécanismes d'accumulation et relaxation des charges.Dans ce travail de thèse, la caractérisation de l'isolant solide a d'abord été étudiée, basée sur des mesures de courants faibles bruits. Il est ainsi possible de mesurer le courant de fuite dans le volume et sur la surface des échantillons, dans une enceinte sous pression, à haut champ électrique et pour différentes températures. Ces mesures ont mis en évidence que les résistivités de volume et de surface sont fortement impactées par l'augmentation de la température et la teneur en eau des échantillons. Il a également été montré que la résistivité de surface a un comportement non-linéaire en fonction du champ électrique. Un modèle numérique a été développé pour simuler les résultats obtenus, et implémenter les propriétés de surface de l'isolant solide.Les propriétés isolantes du gaz ont également été étudiées pour différentes géométries de champ électrique, dans le but d'estimer la contribution du courant passant à travers le gaz, sur l'accumulation de charge en surface de l'isolant solide. Des courants non négligeables sont mesurés dans le gaz (~pA-nA). Pour déterminer les mécanismes responsables de la présence de tels courants, il a été caractérisé selon plusieurs paramètres (la rugosité de la surface de l'électrode, la nature du matériau, le champ électrique, la température et l'humidité relative). Cela a mis en évidence que les variations de courants dépendent du conditionnement du dispositif, et sont donc fortement influencés par l'humidité relative adsorbée sur les surfaces du dispositif (électrodes et cuves). En présence d'un système sec, de faibles courants sont mesurés (~pA), et augmentent en fonction de la température. A l'inverse, dans le cas d'un système humide, le courant diminue avec l'augmentation de la température. Ces résultats, combinés à l'influence de la rugosité de l'électrode, suggèrent fortement un mécanisme d'injection de charge à la surface de l'électrode, favorisé en présence d'eau adsorbée.Enfin, les résultats obtenus pour les deux isolants solides et gazeux sont utilisés pour élaborer un modèle numérique ayant une forme proche de celle de l'application industrielle, et permettent d'observer la modification de la distribution du champ électrique en présence de la concentration en eau et du gradient de température. Une estimation du courant circulant au travers des isolants est donc possible.En conclusion, ce travail donne les variations des résistivités de volume et de surface dans une résine époxy en fonction de la température et du champ électrique. Il met également en évidence la forte influence de l'humidité relative et de la température sur les mécanismes d'injection de charges qui contribuent au courant mesuré à travers le gaz. Cette caractérisation approfondie permet de développer une simulation qui prédit les variations de la distribution du champ électrique au sein d'un PSEM sous tension continue
The emergence of renewable energy leads to a development of new technologies for energy distribution across long distances. The latter will be based on High Voltage Direct Current (HVDC) to avoid capacitance losses. This network is interconnected using Gas Insulated Substation (GIS), which insulation is composed of pressurized gas (SF6) and solid insulators (epoxy resin), which have to withstand HVDC. The electric field is not anymore determined by permittivity of materials, but by resistivities and charge accumulation. In the case of an insulator with an interface with gas, electrons or ions will move across electric field lines and will charge the surface of the solid insulator. The behavior of insulator's properties (gas and solid) constitutes a major challenge for the development of HVDC GIS, to understand the charge relaxation/accumulation mechanisms.In this work, the characterization of solid insulator has first been investigated, based on a low-noise current measurement method. It is thus possible to measure the leakage current through samples and onto their surface, in a pressurized gas, at high electric field and for different temperatures. Those measurements permit to evidence that both volume and surface resistivities are strongly impacted by the increase of temperature and water concentration. It has also been shown that surface resistivity has a non-linear behavior with electric field. A numerical model was developed, to simulate experimental results, showing that the surface properties of the insulator can be implemented.Furthermore, the insulating properties of the gas were also investigated through different electric field geometry (coaxial and uniform), in order to estimate the contribution of current through gas on the charge accumulated on solid insulators. It has been found that a non-negligible current passes through the gas (~pA to nA). To determine the mechanisms responsible for such currents, the latter has been characterized depending on several parameters (electrode surface roughness, material nature, electric field, temperature and relative humidity). It revealed that the variations of currents are strongly impacted by the conditioning of the device and thus by the relative humidity adsorbed on electrodes and enclosure surfaces. In presence of a dry system (dry gas and device) low current were measured (~pA), which increases with temperature. On the contrary, in case of a “wet” system (humid gas and device) the current decreases with increasing temperature. Those results combined with the influence of the electrode roughness, strongly suggest a mechanism of charge injection at the electrode surface, enhanced by water adsorption.Finally, the results obtained for both solid and gaseous insulations are used to develop a numerical model with a shape close to the industrial application, and observe the modification of electric field distribution in presence of water concentration and temperature gradient. An estimation of current flowing through the insulator and gas is thus possible in case of uniform and gradient temperature.In conclusion, this work gives the variations of both volume and surface resistivities in an epoxy resin with temperature and electric field. It also evidences the major influence of relative humidity and temperature on charge injection mechanisms which contribute to the current measured through gas. The extensive characterization performed, enables to develop a simulation which predicts the variations of electric field distribution within an HVDC GIS
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15

Šalucha, Darius. "Didelės galios puslaidininkinių silicio prietaisų p-n sandūros krašto pasyvacija". Doctoral thesis, Lithuanian Academic Libraries Network (LABT), 2009. http://vddb.library.lt/obj/LT-eLABa-0001:E.02~2009~D_20090707_154824-23692.

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Puslaidininkinių prietaisų pramušimo įtampos valdymas formuojant griovelį periferiniame perimetre yra viena iš labiausiai paplitusių technologinių operacijų, gaminant galios diodus bei tiristorius Si pagrindu. Aukštavolčių didelės galios puslaidininkinių prietaisų, kurie dirba kelių tūkstančių amperų diapazone, o uždarymo įtampa iki kelių tūkstančių voltų, didelė problema elektrinio lauko pasiskirstymas ties kristalo briauna, kur p-n sandūra išeina į paviršių ir kur vyksta griūtinis krūvininkų skaičiaus didėjimas. Darbo stabilumui užtikrinti būtina pasyvuoti paviršių kristalo periferijoje, ant profiliuoto krašto. Šiame darbe išanalizuota galingų puslaidininkinių struktūrų konstrukcija, pagrindinės charakteristikos, parametrų tarpusavio ryšis, taip pat technologinis procesas ir jo ypatumai. Išanalizuotos technologinio gamybos maršruto silpniausios pozicijos. Nustatyta izoliacinių griovelių ėsdinimo charakteristikų priklausomybė nuo ėsdiklio sudėties, nuo ėsdinimo įrenginio struktūros ir nuo ėsdiklio temperatūros kitimo. Sukurta stiklo pasyvacijos difuzinės krosnies monitoringo sistema, kuri skirta aukštų temperaturų ir dujų srautų matavimui proceso metu. Rekombinacijų charakteristikų kitimo pagalba, matuojant be kontakte MW-PCT technika, įvertinama izoliacinių griovelių pasyvacijos kokybė. Technologiniame gamybos maršrute, po izoliacinio griovelio ėsdinimo operacijos, prieš stiklo pasyvaciją sudarinėjamas porėtojo silicio sluoksnis, taip pat siūloma įvesti homogeniškumo... [toliau žr. visą tekstą]
Thin dielectric passivation layer is one of the basic construction elements in semiconductor device technology. There are few materials, from which the layers may be manufactured. They are oxides mainly, with Si02 as the most popular of them, although, the phosphor- and boron-silicon glasses are used as passivation layers, too. In choosing a passivant of power thyristors and diodes, there are two important considerations in addition to the usual requirement for providing uniform high breakdown voltage via substrate. One consideration is the thermal stability of the passivant to subsequent high-temperature processes. The other consideration is the bias-temperature stability of the passivation layers affecting the operation life expectancy of a device. In the technology of thyristors and diodes on silicon substrates the bias-breakdown voltage is not uniform over substrate due to non-homogeneity of passivated surface of the p-n junction. In this work, passivation of moat surface by means of electrochemical etching, formation of hydrogen-rich porous silicon layers and glass in-melting steps has been investigated. Passivation quality was controlled by the measurements of surface recombination characteristics after each technological step using a non-invasive technique, which employed microwave probed photoconductivity transients (MW-PCT). It has been shown that electrochemical etching - glass melting steps involved in passivation technological procedures resulted in a decrease of... [to full text]
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16

Wardman, John Blackburn. "Vulnerability of Electric Power Systems to Volcanic Ashfall Hazards". Thesis, University of Canterbury. Geological Sciences, 2013. http://hdl.handle.net/10092/8014.

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Volcanic eruptions are powerful natural events which impact strongly on society. As human populations grow and expand into volcanically active areas, their exposure and vulnerability to volcanic hazards is also increasing. Of all volcanic hazards, ashfall is the most likely to impact lifelines because of the large areas affected. The widespread dispersal of ash can cause large-scale disruption of vital infrastructure services, aviation, and primary production. Electric power supply is arguably the most crucial of modern infrastructure systems, especially considering the dependence of other sectors on electricity to maintain functionality. During and immediately after ashfalls, electric power systems are vulnerable to a number of impacts, but disruption from volcanic ash-induced insulator flashover (unintended, disruptive electrical discharge) is most common. This thesis investigates the vulnerability of electric power systems to volcanic ashfall by examining impacts to the different sectors of the modern power system and exploring appropriate mitigation strategies. Analogue laboratory trials using a pseudo (synthetic) ash are undertaken to verify the environmental, volcanological and electrical parameters that most affect electrical conductivity and therefore the flashover mechanism in these experiments. While dry ash is highly resistant to the flow of electric current, increasing moisture content, soluble salt load, and compaction (bulk density) will reduce this resistance and, in turn, increase the potential for flashover. Volcanic ash is an acute form of airborne pollution for areas downwind of active volcanoes. Results from laboratory experiments in this thesis suggest that insulator pollution (volcanic ash) performance (dielectric strength) is primarily dictated by (1) the conductivity of the ash, and (2) insulator material, profile (shape) and dimensioning. Composite polymer insulators tested herein effectively minimise sinusoidal leakage current and partial discharge activity and also exhibit higher pollution performance when compared to ceramic equivalents. Irrespective of insulator material, however, the likelihood of flashover increases significantly once the bottom surface of suspension insulator watersheds become contaminated in wet ash. The thesis investigates the vulnerability (hazard intensity/damage ratio) of electric power systems to volcanic ashfall hazards. Identification, analysis, and reduction of the risk of ashfall impacts to power networks is explored as a part of holistic volcanic risk assessment. The findings of the thesis contribute to the readiness, response and recovery protocols for large electric power systems in volcanic disasters; which directly affects the functional operation and economics of industrial and commercial society.
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17

Izzularab, Mohamed. "Repartition du potentiel electrique le long d'une surface isolante polluee soumise a des decharges : application a l'etude des isolateurs ht pour reseaux de transport a courant continu". Toulouse 3, 1987. http://www.theses.fr/1987TOU30087.

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Etude du contournement des isolateurs pour ligne h. T. C. C. Etude graphique de la tension disruptive en fonction de la longueur de decharge. Conception des isolateurs a l'aide de modeles unidimensionnels permettant de definir un nouveau facteur de forme. Calcul numerique de la distribution du potentiel sur des isolateurs pollues ou givres
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18

Flazi, Samir. "Etude du contournement electrique des isolateurs haute tension pollues : critere d'elongation de la decharge et dynamique du phenomene". Toulouse 3, 1987. http://www.theses.fr/1987TOU30266.

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Etude de l'aspect statique du contournement, on montre experimentalement que les criteres de wilkins et hampton ne s'appliquent qu'au modele d'obenaus. Mise en evidence de l'importance du champs electrique au voisinage de la decharge. Etude detaillee de la conduction electrolytique et de son evolution pendant le contournement
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19

Slama, Mohammed El-Amine. "Etude expérimentale et modélisation de l'influence de la constitution chimique et de la répartition de la pollution sur le contournement des isolateurs haute tension". Thesis, Ecully, Ecole centrale de Lyon, 2011. http://www.theses.fr/2011ECDL0023/document.

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Ce travail porte sur la caractérisation optique et électrique ainsi que la modélisation mathématique du contournement d’isolateurs pollués en tenant compte de la forme de tension appliquée, de la répartition ainsi que de la constitution chimique du dépôt polluant. Sous tension de choc de foudre (1,2/50μs), la morphologie des décharges ainsi que les courants associés dépendent de la tension (forme, amplitude, polarité),de la répartition de la pollution et de sa conductivité. Les vitesses moyennes de la décharge mesurées dépendent de la polarité appliquée à la pointe et de la conductivité de la pollution. Le temps critique correspondant aux conditions critiques est de l’ordre de 9/10 du temps total de contournement quelles que soient la polarité de la tension et la conductivité de la pollution. La constitution chimique de la couche de pollution a peu d’effet sur la tension critique contrairement aux courants critiques. Les valeurs des constantes caractéristiques n et N sont fonction de la nature chimique des dépôts et de la polarité de la tension. Le modèle élaboré montre que les constantes caractéristiques de la décharge n et N sont des paramètres dynamiques et dépendent des éléments du circuit électrique équivalent du système et des paramètres thermiques de la décharge. Les relations des conditions critiques du contournement développé relient les paramètres électriques et thermiques du circuit équivalent et la condition de propagation de la décharge. L’application de ce modèle, pour différentes formes de tension et pour plusieurs types de pollution, donne des résultats satisfaisants. L’hypothèse selon laquelle la colonne de la décharge ne contient que de la vapeur d’eau et de l’air constitue une bonne approximation des grandeurs critiques. Sous tension de choc de foudre, les courants et les tensions critiques dépendent de la configuration de la pollution et de la polarité de la tension. Le courant circule à travers une section effective de la pollution. L’introduction de la notion d’épaisseur critique effective et son application au calcul des grandeurs critiques donne de bons résultats pour les cas de figures étudiés. L’épaisseur effective du dépôt est proportionnelle la résistivité de la pollution et dépend dela configuration de la pollution et de la polarité de la pointe. Dans le cas de dépôt de pollution discontinue et/ou non uniforme, les conditions de propagation des décharges sont locales et leurs paramètres caractéristiques varient selon la configuration et la conductivité du dépôt ainsi que la polarité de la tension appliquée. Le modèle développé pour ce cas de figure donne de bons résultats
This work aimed on optical and electrical characterization and mathematical modeling of flashover of polluted insulators, taking into account the applied voltage waveform, the distribution and chemical composition of pollutant deposit. Under lightning impulse voltage (1.2 /50μs), the morphology of the discharge and the associated currents depend on voltage (shape, amplitude, polarity), the distribution ofpollution and its conductivity. The measured average velocity of the discharge depends on the polarity applied to the tip and the pollution conductivity. The critical time corresponding to the critical conditions is about 9/10 of total flashover duration regardless of the polarity of the voltage and the pollution conductivity. The chemical composition of the pollution layer has little effect on the critical voltage unlike the critical currents. The values of the characteristic constants n and N depend on the chemical nature of the deposits and the voltage polarity.The developed model shows that the discharge constant characteristics n and N are dynamic parameters and depend on the elements of the equivalent electrical circuit system and thermal parameters of the discharge. The developed relationships of critical conditions of flashoverlink the electrical parameters and thermal equivalent circuit and the propagation condition of the discharge. This approach allows us tounderstand the effect of the chemical constitution of pollution on the values of n and N. The application of this model for various voltage waveforms and for several types of pollution, gives satisfactory results. The assumption that the column of the discharge contains only watervapor and air is a good approximation of the critical conditions. Under lightning impulse voltage, the current circulate into a effective section of the pollution surface. The introduction of the concept of critical effective thickness of pollution and its application to the calculation ofcritical parameters gives good results compared with the experimental values. We have also shown that the effective thickness of the depositis proportional to the resistivity of the pollution and depends on voltage polarity and pollution configuration. In the case of discontinuous deposit of pollution and / or non-uniform propagation conditions of discharges are local and their characteristic parameters vary dependingon the configuration and the conductivity of the deposit and the polarity of the applied voltage. The developed model gives good results
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20

Mogniotte, Jean-François. "Conception d'un circuit intégré en SiC appliqué aux convertisseur de moyenne puissance". Thesis, Lyon, INSA, 2014. http://www.theses.fr/2014ISAL0004/document.

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L’émergence d’interrupteurs de puissance en SiC permet d’envisager des convertisseurs de puissance capables de fonctionner au sein des environnements sévères tels que la haute tension (> 10 kV ) et la haute température (> 300 °C). Aucune solution de commande spécifique à ces environnements n’existe pour le moment. Le développement de fonctions élémentaires en SiC (comparateur, oscillateur) est une étape préliminaire à la réalisation d’un premier démonstrateur. Plusieurs laboratoires ont développé des fonctions basées sur des transistors bipolaires, MOSFETs ou JFETs. Cependant les recherches ont principalement portées sur la conception de fonctions logiques et non sur l’intégration de drivers de puissance. Le laboratoire AMPERE (INSA de Lyon) et le Centre National de Microélectronique de Barcelone (Espagne) ont conçu un MESFET latéral double grille en SiC. Ce composant élémentaire sera à la base des différentes fonctions intégrées envisagées. L’objectif de ces recherches est la réalisation d’un convertisseur élévateur de tension "boost" monolithique et de sa commande en SiC. La démarche scientifique a consisté à définir dans un premier temps un modèle de simulation SPICE du MESFET SiC à partir de caractérisations électriques statique et dynamique. En se basant sur ce modèle, des circuits analogiques tels que des amplificateurs, oscillateurs, paires différentielles, trigger de Schmitt ont été conçus pour élaborer le circuit de commande (driver). La conception de ces fonctions s’avère complexe puisqu’il n’existe pas de MESFETs de type P et une polarisation négative de -15 V est nécessaire au blocage des MESFETs SiC. Une structure constituée d’un pont redresseur, d’un boost régulé avec sa commande basée sur ces différentes fonctions a été réalisée et simulée sous SPICE. L’ensemble de cette structure a été fabriqué au CNM de Barcelone sur un même substrat SiC semi-isolant. L’intégration des éléments passifs n’a pas été envisagée de façon monolithique (mais pourrait être considérée pour les inductances et capacités dans la mesure où les valeurs des composants intégrés sont compatibles avec les processus de réalisation). Le convertisseur a été dimensionné pour délivrer une de puissance de 2.2 W pour une surface de 0.27 cm2, soit 8.14 W/cm2. Les caractérisations électriques des différents composants latéraux (résistances, diodes, transistors) valident la conception, le dimensionnement et le procédé de fabrication de ces structures élémentaires, mais aussi de la majorité des fonctions analogiques. Les résultats obtenus permettent d’envisager la réalisation d’un driver monolithique de composants Grand Gap. La perspective des travaux porte désormais sur la réalisation complète du démonstrateur et sur l’étude de son comportement en environnement sévère notamment en haute température (> 300 °C). Des analyses des mécanismes de dégradation et de fiabilité des convertisseurs intégrés devront alors être envisagées
The new SiC power switches is able to consider power converters, which could operate in harsh environments as in High Voltage (> 10kV) and High Temperature (> 300 °C). Currently, they are no specific solutions for controlling these devices in harsh environments. The development of elementary functions in SiC is a preliminary step toward the realization of a first demonstrator for these fields of applications. AMPERE laboratory (France) and the National Center of Microelectronic of Barcelona (Spain) have elaborated an elementary electrical compound, which is a lateral dual gate MESFET in Silicon Carbide (SiC). The purpose of this research is to conceive a monolithic power converter and its driver in SiC. The scientific approach has consisted of defining in a first time a SPICE model of the elementary MESFET from electric characterizations (fitting). Analog functions as : comparator, ring oscillator, Schmitt’s trigger . . . have been designed thanks to this SPICE’s model. A device based on a bridge rectifier, a regulated "boost" and its driver has been established and simulated with the SPICE Simulator. The converter has been sized for supplying 2.2 W for an area of 0.27 cm2. This device has been fabricated at CNM of Barcelona on semi-insulating SiC substrate. The electrical characterizations of the lateral compounds (resistors, diodes, MESFETs) checked the design, the "sizing" and the manufacturing process of these elementary devices and analog functions. The experimental results is able to considerer a monolithic driver in Wide Band Gap. The prospects of this research is now to realize a fully integrated power converter in SiC and study its behavior in harsh environments (especially in high temperature > 300 °C). Analysis of degradation mechanisms and reliability of the power converters would be so considerer in the future
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21

Nandi, Sounak. "Experimental and Theoretical Investigations on High Voltage Polymeric Insulators". Thesis, 2022. https://etd.iisc.ac.in/handle/2005/5991.

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High Voltage Ceramic and glass Insulators have been widely used by various transmission and distribution utilities for several decades across the globe. Recently composite or silicone rubber insulators have evolved and are now replacing ceramic/glass insulators due to their improved advantages; however, these Insulators suffer from degradation over a period of service. The first few chapters of the thesis deal with the study of silicon rubber/polymer insulators under various climatic conditions. Exhaustive experimental studies were conducted to understand the degradation of insulators under different climatic conditions which prevail in the Country. Studies on polymer insulators under sub-zero and under extremely high-temperature conditions were attempted experimentally to evaluate their performance. During experimentation, the leakage current was continuously monitored. Later, material analysis, which is a very important aspect and essential to correlate with the morphological changes of the insulator surface, was examined. The experimental investigations demonstrate that there is a need to conduct multi-stress experimentation under specific climatic conditions before the Insulators are installed in the field. The next portion of the thesis work deals with the failure mechanism of a Fibre Reinforced Plastic (FRP) Rod. Some portion of the work deals with mathematical analysis being extended to condition monitoring of dielectric surfaces and understanding the performance of FRP rods under high AC voltages. Further, experimental investigations are performed on FRP Rods to analyze the behaviour witnessed, as the field failures reported on Silicon rubber Insulators, interesting results are reported. Condition monitoring of dielectric surfaces is very important; hence it was felt necessary to analyze the field performance of transmission/ distribution composite Insulators. To understand further, a mathematical analysis based on Chaos has been evaluated for leakage current data and quantization of comparative degradation for a dielectric surface is presented. Later, Empirical Mode Decomposition is also used for understanding leakage current and implied degradation under minimal data conditions, and the results are analyzed and presented. Subsequently, the Surface electric field of insulators exposed to HVDC is studied considering the temporal boundary conditions which may arise due to the capacitive-resistive transients. The last portion of the thesis deals with a theoretical study of the bulk conductivity of polymer material. The Electric Field dependence of conductivity on the application of voltage and subsequent space charge distribution is attempted, and the results are analyzed and presented. In short, this thesis is a work where both experimental, simulation and theoretical studies pertaining to silicone rubber insulators are presented.
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22

Samal, Simanta Kumar. "Measurement of Voltage Distribution on High Voltage Suspension Insulator String Under Polluted Condition". Thesis, 2015. http://ethesis.nitrkl.ac.in/7797/1/2015_MT_Measurement_Samal.pdf.

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From electrical engineering point of view insulator plays an important role. As it is used as basic element in overhead transmission and distribution networks. They are not only to insulate the power line but also to carry the weight of the transmission line conductor. Voltage and electric field are the main factors to withstand the insulation. Therefore it is very much essential for insulator string to relate the potential distribution and electric field distribution to that of the respective ideal string accurately. In operational high voltage, the non-uniformity of potential distribution across the insulator string is due to the presence of stray capacitance. Also, the performance of insulator (voltage distribution, electric field distribution) varies by the deposition of environmental pollutants either uniformly distributed or non-uniformly distributed on the surface of insulator, which deteriorated by the help of captivation of moisture particles sharply. So to sort out this dilemma practically by the help of a full equivalent circuit in which the properties of insulating material and stray capacitance effect should be taken for proper consideration, which is derived from the Finite Element Method Based Software and executed in the Ansys Maxwell software package for the calculation of potential distribution, electric field distribution and also electric field vector distribution throughout the specified string with and without pollutants in proper power frequency along with desired voltage. A comparison between normal and polluted (coastal polluted and industrial polluted) creepage voltage vs creepage distance in graphical form is studied by using Matlab. Finally a voltage gradient and electric field comparison is studied by using Matlab.
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23

Azordegan, Ehsan. "Remote assessment of high voltage porcelain insulators using radiated electromagnetic field signature". 2016. http://hdl.handle.net/1993/30999.

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A novel approach for inspecting the condition of porcelain insulators based on statistical analysis of electromagnetic radiations of live insulators is demonstrated in this thesis. Physical defects such as puncture and contamination can degrade the insulators performance and result in power outages, potentiating costs to utilities. Therefore, condition assessment of line insulators has always been one of the most important aspects of maintenance programs in power networks. Realistic replicas of punctured and contaminated insulators were created in the High Voltage Lab at University of Manitoba, following the IEC standards. These defective insulators were tested under high voltage stress while the electromagnetic radiations originated from the partial discharge activities on the insulators were captured using electromagnetic sensors. During the experimental part of this thesis, a multitude of tests were conducted and resulted in measuring and recording a total of 410,000 cycles of discharge activities. The feature extraction algorithm, developed as part of this thesis, calculates the statistical features of the phase resolved interpretation of partial discharge (PD) pulses. The results of analyzing the extracted features from the radiated signature of defective insulators indicate that the scale and shape parameters of a two sided Weibull distribution function fit to the recorded measurement entail distinct information about the source of discharges that can be used to identify the source of defects. Based on the library of features extracted from the recorded electromagnetic radiations, a support vector machine (SVM) classier, developed as part of this thesis, can successfully classify the radiation signature of punctured and contaminated insulators. Therefore, the main outcome of this research was introducing a novel porcelain insulator inspection technique that can remotely differentiate the defective punctured and contaminated insulators using their electromagnetic radiation signature in a laboratory environment. By utilizing the signature of common discharge activities present in the recorded signature of all tested insulators, a gating algorithm was developed which improved the successful classification rate from 51 % to 75%. The inspection technique proposed in this research can eliminate the safety hazards involved in the live maintenance of line insulators, lower the maintenance costs, and improve the inspection efficiency considering the conventional labour intensive live maintenance assessments.
February 2016
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24

McCue, Benjamin Matthew. "A Fully Integrated High-Temperature, High-Voltage, BCD-on-SOI Voltage Regulator". 2010. http://trace.tennessee.edu/utk_gradthes/646.

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Developments in automotive (particularly hybrid electric vehicles), aerospace, and energy production industries over the recent years have led to expanding research interest in integrated circuit (IC) design toward high-temperature applications. A high-voltage, high-temperature SOI process allows for circuit design to expand into these extreme environment applications. Nearly all electronic devices require a reliable supply voltage capable of operating under various input voltages and load currents. These input voltages and load currents can be either DC or time-varying signals. In this work, a stable supply voltage for embedded circuit functions is generated on chip via a voltage regulator circuit producing a stable 5-V output voltage. Although applications of this voltage regulator are not limited to gate driver circuits, this regulator was developed to meet the demands of a gate driver IC. The voltage regulator must provide reliable output voltage over an input range from 10 V to 30 V, a temperature range of −50 ºC to 200 ºC, and output loads from 0 mA to 200 mA. Additionally, low power stand-by operation is provided to help reduce heat generation and thus lower operating junction temperature. This regulator is based on the LM723 Zener reference voltage regulator which allows stable performance over temperature (provided proper design of the temperature compensation scheme). This circuit topology and the SOI silicon process allow for reliable operation under all application demands. The designed voltage regulator has been successfully tested from −50 ºC to 200 ºC while demonstrating an output voltage variation of less than 25 mV under the full range of input voltage. Line regulation tests from 10 V to 35 V show a 3.7-ppm/V supply sensitivity. With the use of a high-temperature ceramic output capacitor, a 5-nsec edge, 0 to 220 mA, 1-µsec pulse width load current induced only a 55 mV drop in regulator output voltage. In the targeted application, load current pulse widths will be much shorter, thereby improving the load transient performance. Full temperature and input voltage range tests reveal the no-load supply current draw is within 330 µA while still providing an excess of 200 mA of load current upon demand.
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25

Xie, Ming-Yue, i 謝明岳. "Study of High Voltage Insulator with the Characteristics of Nanofilled Insulation Composite". Thesis, 2016. http://ndltd.ncl.edu.tw/handle/52770253382567482201.

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碩士
國立聯合大學
電機工程學系碩士班
104
In power systems, insulators can ensure the isolation between the transmission line and the ground, therefore the stability of the power systems is closed related to the insulation characteristics of insulators. Insulation characteristics of the insulators mainly depend on the material used in insulator manufacturing, the shape design of the insulators and the coating conditions on the surface of insulators. In addition to the traditional porcelain insulators, the polymer insulators are also widely used in power systems. The contour design can improve the tangential electric field of the surface of the insulators to decrease the probability of the surface flashover of the insulators. The coating on the surface of the insulators can enhance the hydrophobicity on the surface of the insulators to improve the insulation performance of insulators. After measuring the samples of the epoxy resin filled with nanoparticles, the breakdown voltage increases with the thickness of the samples. The dielectric constant of samples are positive correlated to the density of the filler in the samples. The samples with 5 wt% SiO2 nanoparticles have the highest breakdown voltage and the samples with 5 wt% Al2O3 nanoparticles have the more stable failure rate. In the samples groups of 5 wt% nanoparticles, the samples with calcination of mixed SiO2 and Al2O3 have higher dielectric constant. The contour design of insulators is performed by the genetic algorithm merged with the charge simulation method. The optimal contour of the insulators changes with the constraints. The results of insulator coating with RTV silicone rubber shows that the BaTiO3 3 wt% filled can get the best hydrophobicity, and the smallest leakage current occurs at the BaTiO3 10 wt% filled.
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26

Lin, Chia-Hung, i 林嘉鴻. "Investigation of Low-Voltage Organic Transistors Using High-Dielectric Constant Gate Insulator". Thesis, 2005. http://ndltd.ncl.edu.tw/handle/85604512626242572304.

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碩士
長庚大學
光電工程研究所
93
In recent years, the organic electronic device has been great interest due to the organic materials developed quickly. At parts of organic thin- film transistor, the device operation voltage is higher relatively compare to inorganic thin-film transistor at present. It is difficult to practices electrical circuit. Thus, our research focuses on electric characteristics improvement of organic transistor mainly. In order to decrease device operating voltage for practical application, we attempt low temperature sputtering high-dielectric constant materials for dielectric layer. Using high-dielectric constant materials as insulator has higher capacitance compare with traditional SiO2. So it just require lower voltage to achieve induce accumulate charge. Thus, organic transistor with high dielectric constant has lower operating voltage compare to traditional inorganic SiO2. In part of organic material process, we deposited RR-P3HT as organic active layer of organic transistor by spin coating and the solvent is p-xylene. We present the results of fabrication of low temperature sputtering high dielectric constant materials as gate dielectric to fabricate RR-Poly(3-hexylthiophene)-based organic thin-film transistor. We also utilized plasma and HMDS to treated insulator surface. We fabricated successfully the transistor device of RR-P3HT solution-base with bottom-contact and top-contact structures. Our organic transistor using high-k materials insulator exhibited the optimum mobility of 7.7×10-3cm2/V-s and Ion/Ioff drain current ratio of 138.
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27

Chang, Tsung-Cheng, i 張宗正. "Fabrication and Characterization of High Voltage AlGaN/GaN Metal-Insulator-Semiconductor Field Effect Transistors". Thesis, 2017. http://ndltd.ncl.edu.tw/handle/13829904724503262027.

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碩士
國立中興大學
材料科學與工程學系所
105
AlGaN/GaN high electron mobility transistors (HEMTs) devices have been fabricated with 100m gate width, 5m gate length, 5m gate-source spacing, and 20m gate-drain spacing in the HEMT devices. A 573 mA/mm of the maximum current, a 2.31011 of the Ion/Ioff ratio, a 1000 V of the off-state breakdown voltage were measured in the AlGaN/GaN HEMT device with the Al2O3/SiNX dielectric bilayers. The field-metal-plate was designed to improve the current collapse effect of the AlGaN/GaN HEMT devices. The current collapse ratios of the source field-plate and the gate field-plate structures can be reduced from 5 to 1.1 compared with the conventional HEMT device which the electric field between gate and source electrodes was reduced in the designed devices. Finally, AlGaN/GaN HEMT membrane (FS-HEMT) were successfully stripped by electrochemical etching process using a laser cutting technique and a sacrificial layer (n-GaN:Si) in the epitaxial structure. The warpage morphology was observed in the FS-HEMT membrane. The GaN E2 (high) peak was shifted from 570.1cm-1 (HEMT on Si) to 568.3cm-1 (FS-HEMT membrane) that indicated the compressive strain of the GaN layer was reduced by using the Raman spectroscopy. The drain current of the FS-HEMT was reduced in the ID-VDS curves. That indicated that the low saturation drain current was reduced by reducing the compressive strain in the epitaxial structure. The ID-VDS curve FS-HEMT current was reduced by 68%. The Ids current of the FS-HEMT was higher than the standard HEMT (ST-HEMT) at low Vds voltage without joule heat. At high Vds operating voltage, the maximum Ids current of the FS-HEMT was reduced due to the poor heat dissipation on the carbon tape. High operating current and high breakdown voltage of the FS-HEMT can be achieved by bounding on the high thermal conductive substrate
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28

Pao, Chien-Yu, i 鮑建佑. "Growth and Fabrication of High Breakdown Voltage AlGaN/GaN Metal-Insulator-Semiconductor Field Effect Transistors". Thesis, 2014. http://ndltd.ncl.edu.tw/handle/90361289417894008956.

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碩士
國立中央大學
電機工程學系
102
This thesis focus on the enhancement of off-state breakdown voltage of AlGaN/GaN Metal-Insulator-Semiconductor Field Effect Transistors (MIS-FETs) by using MOCVD grown different epitaxy structures on Si. With increasing GaN buffer layer up to 4.6 μm thick, the fabricated AlGaN/GaN MIS-FETs off-state breakdown voltage is up to 960 V at LGD = 20 μm, while the 2.5 μm GaN thick buffer layer has 795 V device breakdown voltage. However, with increasing buffer layer thickness, the edge crack extends to 1.5 cm, which means only 65% area of 6-inch silicon substrate is available. For the purpose of enhance wafer area efficiency, several ways were surveyed to improve devices characteristics without extend buffer layers thickness. The first selection is 5% Al-content AlGaN as buffer layer. 5% AlGaN has off-state breakdown 705 V while GaN buffer layer equips 795 V, which was because dislocation densities serious affect off-state leakage path and breakdown voltage, growth condition of 5% AlGaN need to be optimized. From previous results, that is the dislocation densities seriously affect device off-state characteristics, the growth of AlN interlayer experiment was designed for enhancing epitaxial quality. Which improved the devices breakdown voltage from 795 V to 926 V, about 16% breakdown voltage enhancement. Furthermore, off-state I-V curve of the devices fitted the theory of Space Charge Limited Current, which advanced understanding of the cause of the devices off-state leakage current formation.
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29

"Source Strength Impact Analysis on Insulator Flashover under Contaminated Conditions". Doctoral diss., 2016. http://hdl.handle.net/2286/R.I.39422.

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abstract: Transmission voltages worldwide are increasing to accommodate higher power transfer from power generators to load centers. Insulator dimensions cannot increase linearly with the voltage, as supporting structures become too tall and heavy. Therefore, it is necessary to optimize the insulator design considering all operating conditions including dry, wet and contaminated. In order to design insulators suitably, a better understanding of the insulator flashover is required, as it is a serious issue regarding the safe operation of power systems. However, it is not always feasible to conduct field and laboratory studies due to limited time and money. The desire to accurately predict the performance of insulator flashovers requires mathematical models. Dynamic models are more appropriate than static models in terms of the instantaneous variation of arc parameters. In this dissertation, a dynamic model including conditions for arc dynamics, arc re-ignition and arc motion with AC supply is first developed. For an AC power source, it is important to consider the equivalent shunt capacitance in addition to the short circuit current when evaluating pollution test results. By including the power source in dynamic models, the effects of source parameters on the leakage current waveform, the voltage drop and the flashover voltage were systematically investigated. It has been observed that for the same insulator under the same pollution level, there is a large difference among these flashover performances in high voltage laboratories and real power systems. Source strength is believed to be responsible for this discrepancy. Investigations of test source strength were conducted in this work in order to study its impact on different types of insulators with a variety of geometries. Traditional deterministic models which have been developed so far can only predict whether an insulator would flashover or withstand. In practice, insulator flashover is a statistical process, given that both pollution severity and flashover voltage are probabilistic variables. A probability approach to predict the insulator flashover likelihood is presented based on the newly developed dynamic model.
Dissertation/Thesis
Doctoral Dissertation Electrical Engineering 2016
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30

"The Use of Voltage Compliant Silicon on Insulator MESFETs for High Power and High Temperature Pulse Width Modulated Drive Circuits". Master's thesis, 2010. http://hdl.handle.net/2286/R.I.8692.

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abstract: Silicon Carbide (SiC) junction field effect transistors (JFETs) are ideal for switching high current, high voltage loads in high temperature environments. These devices require external drive circuits to generate pulse width modulated (PWM) signals switching from 0V to approximately 10V. Advanced CMOS microcontrollers are ideal for generating the PWM signals but are limited in output voltage due to their low breakdown voltage within the CMOS drive circuits. As a result, an intermediate buffer stage is required between the CMOS circuitry and the JFET. In this thesis, a discrete silicon-on-insulator (SOI) metal semiconductor field effect transistor (MESFET) was used to drive the gate of a SiC power JFET switching a 120V RMS AC supply into a 30Ω load. The wide operating temperature range and high breakdown voltage of up to 50V make the SOI MESFET ideal for power electronics in extreme environments. Characteristic curves for the MESFET were measured up to 250°C.; To drive the JFET, the MESFET was DC biased and then driven by a 1.2V square wave PWM signal to switch the JFET gate from 0 to 10V at frequencies up to 20kHz. For simplicity, the 1.2V PWM square wave signal was provided by a 555 timer. The JFET gate drive circuit was measured at high temperatures up to 235°C.; The circuit operated well at the high temperatures without any damage to the SOI MESFET or SiC JFET. The drive current of the JFET was limited by the duty cycle range of the 555 timer used. The SiC JFET drain current decreased with increased temperature. Due to the easy integration of MESFETs into SOI CMOS processes, MESFETs can be fabricated alongside MOSFETs without any changes in the process flow. This thesis demonstrates the feasibility of integrating a MESFET with CMOS PWM circuitry for a completely integrated SiC driver thus eliminating the need for the intermediate buffer stage.
Dissertation/Thesis
M.S. Electrical Engineering 2010
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31

Haberecht, Peter. "Pollution deposition rates on insulator (HV) surfaces for use in atmospheric corrosivity estimation". Thesis, 2008. http://hdl.handle.net/1959.13/38069.

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Research Doctorate - Doctor of Philosophy (PhD)
This work reports the deposition onto high voltage insulators and correlation to atmospheric corrosivity measurement. This work includes corrosion studies at 15 sites in New Zealand (1,816 tests) for in excess of 12 months, and co-operative research in South Africa. In addition, to confirm the relevance and transportability of this proposed model, a review of the published international data on deposition rates on insulators was conducted. It was noted that the deposition rate of airborne pollutants onto a surface is dependent upon the true surface area facing the wind and the aerodynamic properties of the surface. Such is the effect that surfaces with minimal exposure to the wind such as horizontal plates, have been shown to be poor collectors of deposits while vertical plates are more efficient, followed by high voltage glass insulators, the ISO9223 salt candle, and the largest collector is the Direct Dust Deposit Gauge. This study found that the ISO9223 wet salt candle and the average annual deposition rate on the High Voltage Glass insulator bottom surface (unenergized) provided relatively similar deposition results. The deposition onto insulator surfaces may be a more relevant method as it replicates deposition on large surfaces. This Equivalent Salt Dry Deposition (ESDD) method for HV insulators is an all inclusive measure of the airborne pollutants deposition rate and converts the total deposited material into a single value equivalent to that of salt, even though the deposit may consist of sulphur, marine salts, nitrates, and other conductive pollutants. The measured deposition rate on the sheltered insulator bottoms at 85 sites around the world predicted 87% of the ISO corrosivity categories (based on zinc corrosion) for these sites. Results from equatorial Asia appear to be non-compliant and warrant further investigation. The ESDD values are now being quoted from around the world, by electrical engineers who use the recently revised CIGRE methodology, to determine the probability of arc-over (shorting to earth) of high voltage cables due to pollution build-up on insulators. The implications from this research are significant, with the cost of atmospheric corrosivity studies becoming prohibitively expensive, this method converts technically valid surface deposition results from the electrical engineers from around the world (provided at no cost), to valid empirical corrosivity rates from often remote locations.
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32

Haberecht, Peter. "Pollution deposition rates on insulator (HV) surfaces for use in atmospheric corrosivity estimation". 2008. http://hdl.handle.net/1959.13/38069.

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Research Doctorate - Doctor of Philosophy (PhD)
This work reports the deposition onto high voltage insulators and correlation to atmospheric corrosivity measurement. This work includes corrosion studies at 15 sites in New Zealand (1,816 tests) for in excess of 12 months, and co-operative research in South Africa. In addition, to confirm the relevance and transportability of this proposed model, a review of the published international data on deposition rates on insulators was conducted. It was noted that the deposition rate of airborne pollutants onto a surface is dependent upon the true surface area facing the wind and the aerodynamic properties of the surface. Such is the effect that surfaces with minimal exposure to the wind such as horizontal plates, have been shown to be poor collectors of deposits while vertical plates are more efficient, followed by high voltage glass insulators, the ISO9223 salt candle, and the largest collector is the Direct Dust Deposit Gauge. This study found that the ISO9223 wet salt candle and the average annual deposition rate on the High Voltage Glass insulator bottom surface (unenergized) provided relatively similar deposition results. The deposition onto insulator surfaces may be a more relevant method as it replicates deposition on large surfaces. This Equivalent Salt Dry Deposition (ESDD) method for HV insulators is an all inclusive measure of the airborne pollutants deposition rate and converts the total deposited material into a single value equivalent to that of salt, even though the deposit may consist of sulphur, marine salts, nitrates, and other conductive pollutants. The measured deposition rate on the sheltered insulator bottoms at 85 sites around the world predicted 87% of the ISO corrosivity categories (based on zinc corrosion) for these sites. Results from equatorial Asia appear to be non-compliant and warrant further investigation. The ESDD values are now being quoted from around the world, by electrical engineers who use the recently revised CIGRE methodology, to determine the probability of arc-over (shorting to earth) of high voltage cables due to pollution build-up on insulators. The implications from this research are significant, with the cost of atmospheric corrosivity studies becoming prohibitively expensive, this method converts technically valid surface deposition results from the electrical engineers from around the world (provided at no cost), to valid empirical corrosivity rates from often remote locations.
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33

Revathy, P. "High-k Dielectrics For Metal-Insulator-Metal Capacitors". Thesis, 2013. https://etd.iisc.ac.in/handle/2005/2597.

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Metal-insulator-metal (MIM) capacitors are used for analog, RF, and DRAM applications in ICs. The International Technology Roadmap for Semiconductors (ITRS) specifies continuing increase in capacitance density (> 7 fF/ m2), lower leakage current density (< 10 8 A/cm2), very low effective oxide thickness (EOT < 1 nm, for DRAM applications), and better capacitance density-voltage (C-V) linearity ( < 100 ppm/V2, for analog/RF applications). In addition, the maximum fabrication/processing temper-ature should not be greater than 400 0C, in order to be compatible with the thermal budget of back-end fabrication steps. Low dielectric constants of conventional SiO2 and Si3N4 capacitors limit the capacitance densities of these devices. Although scaling down of dielectric thickness increases the capacitance density, it results in large leakage current density and poor C-V linearity. In this work, the effects of high-k materials (Eu2O3, Gd2O3, TiO2) on the device performance of MIM capacitors are studied. The performance of multi-dielectric stack, and doped-dielectric stack devices are also investigated. The effects of anneal temperature, anneal ambient, anneal mode, and dielectric thickness on device performance are evaluated. C-V, current density-voltage (J-V), and reliability measurements are performed to benchmark the electrical performance, and this is correlated to the structural and material properties of the films through ellipsometry, scanning electron microscopy (SEM), X-ray diffraction (XRD), and X-ray photoelectron spectroscopy (XPS) measurements. High-performance MIM capacitors are fabricated by using (RF sputtered) Eu2O3 dielectric. The fabricated devices are subjected to different anneal conditions, to study their device performance. Forming gas (FG) and argon (Ar) annealed devices are shown to have higher capacitance densities (7 fF/ m2jF G), lower leakage current densities (3.2 10 8 A/cm2jAr at -1 V), and higher , compared to oxygen (O2) annealed de-vices ( 100kHz = 193 ppm/V2jO2). The electrical characterization results are correlated with the surface chemical states of the films through XPS measurements. The annealing ambient is shown to alter the surface chemical states, which, in turn, modulate the electrical characteristics. High-density MIM capacitors are fabricated by using (RF sputtered) Gd2O3, and Gd2O3-Eu2O3 stacked dielectrics. The fabricated Gd2O3 capacitors are also subjected to different anneal conditions, to study their device performance. Although Gd2O3 capacitors provide high capacitance density (15 fF/ m2), they suffer from high leakage current density, high , and poor reliability. Therefore, stacked dielectrics of Gd2O3 and Eu2O3 (Gd2O3/Eu2O3 and Eu2O3/Gd2O3) are fabricated to reduce leakage current density, improve , and improve reliability, with only a marginal reduction in capacitance density, compared to Gd2O3 capacitors. Density of defects and barrier/trap heights are extracted for the fabricated capacitors, and correlated with the device characteristics. High-performance MIM capacitors with bilayer dielectric stacks of (ALD-deposited) TiO2-ZrO2, and Si-doped ZrO2 are characterized. Devices with (ALD-deposited) TiO2/ ZrO2/TiO2 (TZT) and AlO-doped TZT stacks are also characterized. The influence of doping on the device performance is studied. The surface chemical states of the deposited films are analyzed by high-resolution XPS. The structural analysis of the samples is performed by XRD measurements, and this is correlated to the electrical characteristics of the devices. Reliability measurements are performed to study the effects of constant voltage and current stress on device performance. High capacitance density (> 45 fF/ m2), low leakage current density (< 5 10 8 A/cm2 at -1 V, for most devices), and sub-nm EOT are achieved. These parameters exceed the ITRS specifications for DRAM storage capacitors.
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34

Revathy, P. "High-k Dielectrics For Metal-Insulator-Metal Capacitors". Thesis, 2013. http://etd.iisc.ernet.in/handle/2005/2597.

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Metal-insulator-metal (MIM) capacitors are used for analog, RF, and DRAM applications in ICs. The International Technology Roadmap for Semiconductors (ITRS) specifies continuing increase in capacitance density (> 7 fF/ m2), lower leakage current density (< 10 8 A/cm2), very low effective oxide thickness (EOT < 1 nm, for DRAM applications), and better capacitance density-voltage (C-V) linearity ( < 100 ppm/V2, for analog/RF applications). In addition, the maximum fabrication/processing temper-ature should not be greater than 400 0C, in order to be compatible with the thermal budget of back-end fabrication steps. Low dielectric constants of conventional SiO2 and Si3N4 capacitors limit the capacitance densities of these devices. Although scaling down of dielectric thickness increases the capacitance density, it results in large leakage current density and poor C-V linearity. In this work, the effects of high-k materials (Eu2O3, Gd2O3, TiO2) on the device performance of MIM capacitors are studied. The performance of multi-dielectric stack, and doped-dielectric stack devices are also investigated. The effects of anneal temperature, anneal ambient, anneal mode, and dielectric thickness on device performance are evaluated. C-V, current density-voltage (J-V), and reliability measurements are performed to benchmark the electrical performance, and this is correlated to the structural and material properties of the films through ellipsometry, scanning electron microscopy (SEM), X-ray diffraction (XRD), and X-ray photoelectron spectroscopy (XPS) measurements. High-performance MIM capacitors are fabricated by using (RF sputtered) Eu2O3 dielectric. The fabricated devices are subjected to different anneal conditions, to study their device performance. Forming gas (FG) and argon (Ar) annealed devices are shown to have higher capacitance densities (7 fF/ m2jF G), lower leakage current densities (3.2 10 8 A/cm2jAr at -1 V), and higher , compared to oxygen (O2) annealed de-vices ( 100kHz = 193 ppm/V2jO2). The electrical characterization results are correlated with the surface chemical states of the films through XPS measurements. The annealing ambient is shown to alter the surface chemical states, which, in turn, modulate the electrical characteristics. High-density MIM capacitors are fabricated by using (RF sputtered) Gd2O3, and Gd2O3-Eu2O3 stacked dielectrics. The fabricated Gd2O3 capacitors are also subjected to different anneal conditions, to study their device performance. Although Gd2O3 capacitors provide high capacitance density (15 fF/ m2), they suffer from high leakage current density, high , and poor reliability. Therefore, stacked dielectrics of Gd2O3 and Eu2O3 (Gd2O3/Eu2O3 and Eu2O3/Gd2O3) are fabricated to reduce leakage current density, improve , and improve reliability, with only a marginal reduction in capacitance density, compared to Gd2O3 capacitors. Density of defects and barrier/trap heights are extracted for the fabricated capacitors, and correlated with the device characteristics. High-performance MIM capacitors with bilayer dielectric stacks of (ALD-deposited) TiO2-ZrO2, and Si-doped ZrO2 are characterized. Devices with (ALD-deposited) TiO2/ ZrO2/TiO2 (TZT) and AlO-doped TZT stacks are also characterized. The influence of doping on the device performance is studied. The surface chemical states of the deposited films are analyzed by high-resolution XPS. The structural analysis of the samples is performed by XRD measurements, and this is correlated to the electrical characteristics of the devices. Reliability measurements are performed to study the effects of constant voltage and current stress on device performance. High capacitance density (> 45 fF/ m2), low leakage current density (< 5 10 8 A/cm2 at -1 V, for most devices), and sub-nm EOT are achieved. These parameters exceed the ITRS specifications for DRAM storage capacitors.
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35

Chakraborty, Rahul. "Studies on Silicone Rubber Insulators used for High Voltage Transmission". Thesis, 2017. http://etd.iisc.ac.in/handle/2005/3981.

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Recently high temperature vulcanized (HTV) silicone rubber (SIR) / polymeric/composite insulators are gaining wider acceptance as overhead transmission line insulators for extra high voltage (EHV) and ultra-high voltage (UHV) systems due to some promising features like hydrophobicity recovery, light weight, ease of handling and installation, better pollution ashover performance, admirable resistance against vandalism etc. Since polymeric insula-tors are of recent origin, their long-term eld performance is yet to be understood. Owing to their organic nature, and exposure to environmental stresses like pollution, temperature, UV radiation, humidity, fog, rain etc., the insulator performance degrades over a period. The sheds/petticoats of the insulators become wettable leading to frequent ashover in humid and contaminated environment. Hence, long term reliability of the composite insulators is of foremost concern to the power utilities. The available literature on the long term eld performance of these insulators for di erent climatic conditions and under multiple environ-mental stresses for both the HTV SIR and Liquid Silicone Rubber (LSR) is scant. Also there is no reference standard for evaluation of these insulators for pollution/contamination test methods in the laboratory. However currently, CIGRE Work Group is working towards the standardization of the test methods for arti cial pollution tests for polymeric insulators. The thesis addresses some of the issues in detail. In the first part of the thesis, a new and simple pre-treatment methodology to achieve uniform contamination layer on inherently hydrophobic HTV SIR Insulator samples is presented for laboratory pollution performance evaluation. The surface water level di usion in the dipping period is found to make the insulator surface temporarily hydrophilic. Then the uniform contamination layer is applied by dipping the sample immediately in the pollution slurry. Exhaustive experiments were conducted on full scale SIR insulators as well as SIR slabs to investigate the hydrophilicity appearance on the SIR surface. A specially fabricated arrangement for assessment of Wettability Class (WC) is made as per IEC stds. The results of WC measurement and wet ashover studies support the temporary reduction in hydrophobicity of SIR due to dipping phase in the proposed pre-treatment methodology. The next part of the thesis presents the results for the effeect of long term thermal aging experimentation conducted on HTV SIR with difffeerent degrees of pollution (medium, heavy), the effeect of arid desert climate on polymeric insulators is studied. The experimental set-up consists of controlled HVAC source, temperature controlled furnace with a provision for high voltage (HV) and Leakage Current (LC) monitoring, a Digital Storage Oscilloscope (DSO), compact DAQ-9201 of National Instruments operated in LabVIEW platform etc. Two types of HTV SIR Insulators are considered for the study. Flat slabs as well as full-scale insulator samples of creepage length 725 mm are stressed simultaneously to simulate the in-service condition. The experimentation is conducted for about 575 hours with application of 21.0 kVrms at 60oC. The results of the hydrophobicity recovery for thermally aged contaminated polymeric insulators are reported. Besides, monitoring electrical and mechanical proper-ties, changes in material properties of SIR are also analyzed using Physiochemical analysis techniques like Fourier transform infrared (FTIR) spectroscopy, X-Ray Photoelectron Spectroscopy (XPS), Scanning Electron Microscopy (SEM), Thermo-Gravimetric Analysis (TGA), Differential Scanning Calorimetry (DSC). Some of the key findings of the study are increased surface oxidation, surface roughness and mechanical stress due to thermal aging of polymeric insulators. Experimental investigations show that the characteristics of power frequency component of leakage current can be linked with thermal aging of SIR. Further, a unique climatic aging experimental facility is established to evaluate the long-term reliability of SIR under environmental stresses like UV, Humidity, temperature and applied electric stress. The investigations are conducted on two different types of HTV SIR and LSR at samples as well as full-scale insulator samples. The experimentation is conducted for 500 hours with 10.0 kVrms at 50oC, with 85% humidity and 1 W/m2 UV ir-radiation which is in accordance with the aging cycle specified in IEC standard. The results of the comparative studies conducted for the electrical, mechanical and material properties indicate leakage current pulses, brittleness, Salt deposition for multistress aged samples. In summary, an attempt has been made to contribute a pollution methodology with sim-ple pre-treatment technique for inherently hydrophobic HTV SIR surface to achieve better uniformity of contamination layer. Also, electro-thermal and multiple stresses investigations were conducted for long term performance on polymeric insulators.
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36

Chakraborty, Rahul. "Studies on Silicone Rubber Insulators used for High Voltage Transmission". Thesis, 2017. http://etd.iisc.ernet.in/2005/3981.

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Recently high temperature vulcanized (HTV) silicone rubber (SIR) / polymeric/composite insulators are gaining wider acceptance as overhead transmission line insulators for extra high voltage (EHV) and ultra-high voltage (UHV) systems due to some promising features like hydrophobicity recovery, light weight, ease of handling and installation, better pollution ashover performance, admirable resistance against vandalism etc. Since polymeric insula-tors are of recent origin, their long-term eld performance is yet to be understood. Owing to their organic nature, and exposure to environmental stresses like pollution, temperature, UV radiation, humidity, fog, rain etc., the insulator performance degrades over a period. The sheds/petticoats of the insulators become wettable leading to frequent ashover in humid and contaminated environment. Hence, long term reliability of the composite insulators is of foremost concern to the power utilities. The available literature on the long term eld performance of these insulators for di erent climatic conditions and under multiple environ-mental stresses for both the HTV SIR and Liquid Silicone Rubber (LSR) is scant. Also there is no reference standard for evaluation of these insulators for pollution/contamination test methods in the laboratory. However currently, CIGRE Work Group is working towards the standardization of the test methods for arti cial pollution tests for polymeric insulators. The thesis addresses some of the issues in detail. In the first part of the thesis, a new and simple pre-treatment methodology to achieve uniform contamination layer on inherently hydrophobic HTV SIR Insulator samples is presented for laboratory pollution performance evaluation. The surface water level di usion in the dipping period is found to make the insulator surface temporarily hydrophilic. Then the uniform contamination layer is applied by dipping the sample immediately in the pollution slurry. Exhaustive experiments were conducted on full scale SIR insulators as well as SIR slabs to investigate the hydrophilicity appearance on the SIR surface. A specially fabricated arrangement for assessment of Wettability Class (WC) is made as per IEC stds. The results of WC measurement and wet ashover studies support the temporary reduction in hydrophobicity of SIR due to dipping phase in the proposed pre-treatment methodology. The next part of the thesis presents the results for the effeect of long term thermal aging experimentation conducted on HTV SIR with difffeerent degrees of pollution (medium, heavy), the effeect of arid desert climate on polymeric insulators is studied. The experimental set-up consists of controlled HVAC source, temperature controlled furnace with a provision for high voltage (HV) and Leakage Current (LC) monitoring, a Digital Storage Oscilloscope (DSO), compact DAQ-9201 of National Instruments operated in LabVIEW platform etc. Two types of HTV SIR Insulators are considered for the study. Flat slabs as well as full-scale insulator samples of creepage length 725 mm are stressed simultaneously to simulate the in-service condition. The experimentation is conducted for about 575 hours with application of 21.0 kVrms at 60oC. The results of the hydrophobicity recovery for thermally aged contaminated polymeric insulators are reported. Besides, monitoring electrical and mechanical proper-ties, changes in material properties of SIR are also analyzed using Physiochemical analysis techniques like Fourier transform infrared (FTIR) spectroscopy, X-Ray Photoelectron Spectroscopy (XPS), Scanning Electron Microscopy (SEM), Thermo-Gravimetric Analysis (TGA), Differential Scanning Calorimetry (DSC). Some of the key findings of the study are increased surface oxidation, surface roughness and mechanical stress due to thermal aging of polymeric insulators. Experimental investigations show that the characteristics of power frequency component of leakage current can be linked with thermal aging of SIR. Further, a unique climatic aging experimental facility is established to evaluate the long-term reliability of SIR under environmental stresses like UV, Humidity, temperature and applied electric stress. The investigations are conducted on two different types of HTV SIR and LSR at samples as well as full-scale insulator samples. The experimentation is conducted for 500 hours with 10.0 kVrms at 50oC, with 85% humidity and 1 W/m2 UV ir-radiation which is in accordance with the aging cycle specified in IEC standard. The results of the comparative studies conducted for the electrical, mechanical and material properties indicate leakage current pulses, brittleness, Salt deposition for multistress aged samples. In summary, an attempt has been made to contribute a pollution methodology with sim-ple pre-treatment technique for inherently hydrophobic HTV SIR surface to achieve better uniformity of contamination layer. Also, electro-thermal and multiple stresses investigations were conducted for long term performance on polymeric insulators.
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37

Chen, Zong-Syun, i 陳宗勳. "Fabrication and Characterization of HfO2 High-K Gate Insulator for Transparent ZnO Thin-Film Transistors on Glass and Plastic Substrates". Thesis, 2010. http://ndltd.ncl.edu.tw/handle/6fuq8a.

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碩士
國立虎尾科技大學
光電與材料科技研究所
98
In the study, fabricating of HfO2 high-K gate insulator for ZnO thin-film transistors on glass and plastic substrates, we fabricate bottom-gate structure using ZnO film as an active channel layer and HfO2 as gate insulator and ITO as the gate, source, and drain electrode grown by using rf-sputtering. This investigation was divided into two parts, the first one, we control thickness of the different ZnO channel, then observes the transistor of characteristic, The second part is studies of plastic thin-film transistors of characterization. When ZnO channel thickness of 100 nm, the field effect mobility, threshold voltage, and on-off ratio were measured to be 202.6 cm2/V.s, 0.4 V and 4.79x106, respectively. Plastic thin-film transistors on the same condition, the field effect mobility, threshold voltage, and on-off ratio were measured to be 168.6 cm2/V.s, 0.5 V and 8.4x107, respectively.
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38

Burham, Cynthia Faye. "Development of an innovative fabrication method for n-MOS to p-MOS tunable single metal gate/high-[kappa] insulator devices for multiple threshold voltage applications". 2009. http://hdl.handle.net/2152/11663.

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Aggressive scaling required to augment device performance has caused conventional electrode materials to approach their physical scaling limits. Alternative metal gate/high dielectric constant (MG/High-[kappa]) stacks have been implemented successfully in commercial devices and hold promise for further scaling based performance advances. Existing MG/High-[kappa] technology does not achieve a single metal n-MOS to p-MOS effective work function (EWF) tuning range suitable for bulk silicon (Si) device applications. Dual metal gates (DMGs) utilizing a separate metal for n-MOS and p-MOS electrodes increases the cost and complexity of fabrication. The research presented herein introduces a method by which the cost and complexity of MG/High-[kappa] device fabrication may be reduced. Innovative fin field effect transistors (FinFETs) incorporating 3 dimensional ultra thin body silicon on oxide (3-D UTB-SOI) technology display superior electrical characteristics compared to bulk Si devices at the nanometer (nm) dimension and require only a +/-200meV n-MOS to p-MOS EWF tuning range around the Si mid-gap. Single metals capable of achieving this +/-200meV EWF tuning range have been evaluated herein and the tuning mechanisms investigated and engineered to develop a single MG/High-[kappa] FinFET the fabrication complexity of which is reduced by 40%. More specifically, the research shows that the metal thickness of titanium nitride/hafnium silicon oxide (TiN/HfSiOx) gate stack may be engineered to achieve an n-MOS (thinner TiN) to p-MOS (thicker TiN) appropriate FinFET EWF tuning range. FinFETs may be fabricated by depositing a single p-MOS appropriate TiN thickness which may be selectively etched back to achieve thinner, n-MOS appropriate films. Similar electrical behavior is exhibited by etched back and as deposited TiN electrode FinFETs. The single metal etch back fabrication method removes many of the additional steps required for DMG fabrication and preserves the integrity of the MG/High-[kappa] interface between n-MOS and p-MOS devices. These advantages result in reduced fabrication complexity and improved reliability and reproducibility.
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39

Νταλούκας, Απόστολος. "Μοντελοποίηση μονωτήρων υψηλής τάσης". Thesis, 2014. http://hdl.handle.net/10889/8183.

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Σκοπόςτης παρούσας εργασίαςείναι αρχικά η δημιουργία ενός μοντέλου με τα χαρακτηριστικά ενός μονωτήρα υψηλής τάσης.Το μοντέλο αυτό θα ενσωματωθεί στο μοντέλο μιας γραμμής υψηλής τάσης διπλού κυκλώματος των 400kV, για να υπολογιστούν οι επαγόμενες υπερτάσεις σε παρακείμενο υπέργειο αγωγό μεταφοράς υδρογονανθράκων. Τα παραπάνω επιτυγχάνονταιμε τη μοντελοποίηση πραγματικών πυλώνων και γραμμών του Ελληνικού συστήματος μεταφοράς καθώς και υπέργειου αγωγού υδρογονανθράκων.Η εξομοίωση υλοποιείται μέσω του προγράμματος ATP-EMTP. Για τον σχεδιασμό του μοντέλου του μονωτήρα χρησιμοποιήθηκε το μοντέλοVolt-TimeCurve. Επίσης χρησιμοποιήθηκαν δύο τύποι κεραυνού για τις προσομοιώσεις, για γρήγορο και αργό σήμα, με τιμές ρεύματος 100kA. Για το γρήγορο, οι τιμές χρόνων μετώπου και ουράς 1.2/50μs και για το αργό σήμα 10/350μs. Σε αυτή τη διπλωματική εργασία υπάρχουν 8 κεφάλαια. Στα πρώτα 5 κεφάλαια έγινε μια παράθεση πληροφοριών και θεωρητική προσέγγιση όλων των επιμέρους τμημάτων που συνθέτουν τη συνολική διάταξη της μελέτης. Στο 5ο κεφάλαιο γίνεται λεπτομερής αναφοράστο πρόγραμμα ATP-EMTP στο οποίο πραγματοποιήθηκε η προσομοίωση.Στο 6o κεφάλαιο γίνεται η μοντελοποίηση όλων των στοιχείων της διάταξης και η ενσωμάτωσή τους στοATP-EMTP. Στο 7ο κεφάλαιο γίνεται παρουσίαση του μοντέλου του μονωτήρα που αναπτύχθηκε και στο 8ο κεφάλαιο γίνεται παρουσίαση των αποτελεσμάτων της προσομοίωσης και εξάγονται κάποια συμπεράσματα σχετικά με τη διάταξη.
The purpose of this paper is , at first, to create a model with the features of a high voltage insulator. This model will be incorporated into the model of a high-voltage line double circuit 400kV, to calculate the induced transients in adjacent aboveground pipeline hydrocarbons. These goals are achieved by modeling real pillars and lines of Greek transport system and overground pipeline hydrocarbons. The simulation is implemented through the ATP-EMTP. The model Volt-Time Curve is used for the modeling of the insulator. Also, two types of lightning are used for the simulations, for fast and slow signal, with current values 100kA. For fast signal, the prices of front and tail time are 1.2 / 50ms and for slow signal 10 / 350ms. In this thesis there are 8 chapters. In the first five chapters was a quote and information theoretical approach to all individual parts that make up the overall layout of the study. The 5 chapter is a detailed reference to the ATP-EMTP program which performed the simulation. The 6 chapter is the modeling of all elements of the layout and the incorporation into the ATP-EMTP. In chapter 7 we present the model of the insulator developed and in chapter 8 we present the simulation results and draw inferences about the layout.
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40

Prashanth, S. B. Bhanu. "Development Of Instrumentation For Electrical Switching Studies And Investigations On Switching And Thermal Behavior Of Certain Glassy Chalcogenides". Thesis, 2008. https://etd.iisc.ac.in/handle/2005/735.

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The absence of long-range order in glassy chalcogenides provides the convenience of changing the elemental ratios and hence the properties over a wide range. The interesting properties exhibited by chalcogenide glasses make them suitable materials for Phase Change Memories (PCM) and other applications such as infrared optical devices, photo-receptors, sensors, waveguides, etc. One of the most remarkable properties of chalcogenides is their electrical switching behavior. Reversible (threshold type) or irreversible (memory type) switching from a high resistance OFF state to a low resistance ON state in glassy chalcogenides occurs at a critical voltage called the threshold/switching voltage (VT). Investigations on the switching behavior and its composition dependence throw light on the local structural effects of amorphous chalcogenide semiconductors and also help us in identifying suitable samples for PCM applications. Thermal analysis by Differential Scanning Calorimetry (DSC) has been extensively used in glass science, particularly for measurements of thermal parameters such as enthalpy of relaxation, specific heat change, etc., near glass transition. Quite recently, the conventional DSC has been sophisticated by employing a composite temperature profile for heating, resulting in the Temperature Modulated DSC (TMDSC) or Alternating DSC (ADSC). Measurements made using ADSC reveal thermal details with enhanced accuracy and resolution, and this has lead to a better understanding of the nature of glass transition. The thermal parameters obtained using DSC/ADSC are also vital for understanding the electrical switching behavior of glassy chalcogenides. The motivation of this thesis was twofold: The first was to develop a novel, high voltage programmable power supply for electrical switching analysis of samples exhibiting high VT, and second to investigate the thermal and electrical switching behavior of certain Se-Te based glasses with Ge and Sb additives. The thesis contains seven chapters: Chapter 1: This chapter provides an overview of amorphous semiconductors (a-SC) with an emphasis on preparation and properties of glassy chalcogenides. The various structural models and topological thresholds of a-SC are discussed with relations to the glass forming ability of materials. The electronic band models and defect states are also dealt with. The essentials of electrical switching behavior of chalcogenides are discussed suggesting the electronic nature of switching and the role of thermal properties on switching. Chapter 2: The second chapter essentially deals with theory and practice of the experimental techniques adopted in the thesis work. The details of the melt-quenching method of synthesizing glassy samples are provided. Considering the importance, the theory of thermal analysis by DSC & ADSC, are discussed in detail, highlighting the advantages of the latter method adopted in the thesis work. The instrumentation and electronics, developed and used for electrical switching analysis are also introduced at a block diagram level. Finally, the methods used for structural analysis are briefed. Chapter 3: This chapter is dedicated to the design and development details of the programmable High Voltage dc Power Supply (HVPS: 1750 V, 45 mA) undertaken in the thesis work. The guidelines used for power supply topology selection, the specifications and block diagram of the HVPS are provided in that sequence. The operation of the HVPS is discussed using the circuit diagram approach. The details of software control are also given. The performance validations of the HVPS, undertaken through voltage & current regulation tests, step & frequency response tests are discussed. Finally, the sample-test results on the electrical switching behavior of representative Al20As16Te64 and Ge25Te65Se10 samples, obtained using both the current & voltage sweep options of the HVPS developed are illustrated. Chapter 4: Results of the thermally induced transitions governed by structural changes which are driven by network connectivity in the GexSe35-xTe65 (17 ≤ x ≤ 25) glasses, as revealed by ADSC experiments, are discussed in this chapter. It is found that the GexSe35-xTe65 glasses with x ≤ 20 exhibit two crystallization exotherms (Tc1 & Tc2), whereas those with x ≥ 20.5, show a single crystallization reaction upon heating (Tc). The glass transition temperature of GexSe35-xTe65 glasses is found to show a linear, but not-steep increase, indicating a progressive and not an appreciable build-up in network connectivity with Ge addition. The exothermic reaction at Tc1 has been found to correspond to the partial crystallization of the glass into hexagonal Te and the reaction at Tc2 is associated with the additional crystallization of rhombohedral Ge-Te phase. It is also found that the first crystallization temperature Tc1 of GexSe35-xTe65 glasses of lower Ge concentrations (with x ≤ 20), increases progressively with Ge content and eventually merges with Tc2 at x = 20.5 ( = 2.41); this behavior has been understood on the basis of the reduction in Te-Te bonds of lower energy and an increase in Ge-Te bonds of higher energy, with increasing Ge content. Chapter 5: This chapter deals with the electrical switching studies on GexSe35-xTe65 (17 ≤ x ≤ 25) glasses, with an emphasis on the role of network connectivity/rigidity on the switching behavior. It is found that the switching voltage (VT) increases with Ge content, exhibiting a sudden jump at x=20, the Rigidity Percolation Threshold (RPT) of the system. In addition, the switching behavior changes from memory to threshold type at the RPT and the threshold switching is found to be repetitive for more than 1500 cycles. Chapter 6: In this chapter, the results of thermal analysis (by ADSC) and electrical switching investigations on SbxSe55-xTe45 (2 ≤ x ≤ 9) are discussed. It is found that the addition of trivalent Sb contributes very meagerly to network growth but directly affects the structural relaxation effects at Tg. Further, SbxSe55-xTe45 glasses exhibit memory type electrical switching, which is understood on the basis of poor thermal stability of the samples. The metallicity factor is observed to outweigh the network factor in the composition dependence of VT of SbxSe55-xTe45 glasses. Chapter 7: The chapter 7 summarizes the results obtained in the thesis work and provides the scope for future work. The references are cited in the text along with the first author’s name and year of publication, and are listed at the end of each chapter in alphabetical order.
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41

Prashanth, S. B. Bhanu. "Development Of Instrumentation For Electrical Switching Studies And Investigations On Switching And Thermal Behavior Of Certain Glassy Chalcogenides". Thesis, 2008. http://hdl.handle.net/2005/735.

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The absence of long-range order in glassy chalcogenides provides the convenience of changing the elemental ratios and hence the properties over a wide range. The interesting properties exhibited by chalcogenide glasses make them suitable materials for Phase Change Memories (PCM) and other applications such as infrared optical devices, photo-receptors, sensors, waveguides, etc. One of the most remarkable properties of chalcogenides is their electrical switching behavior. Reversible (threshold type) or irreversible (memory type) switching from a high resistance OFF state to a low resistance ON state in glassy chalcogenides occurs at a critical voltage called the threshold/switching voltage (VT). Investigations on the switching behavior and its composition dependence throw light on the local structural effects of amorphous chalcogenide semiconductors and also help us in identifying suitable samples for PCM applications. Thermal analysis by Differential Scanning Calorimetry (DSC) has been extensively used in glass science, particularly for measurements of thermal parameters such as enthalpy of relaxation, specific heat change, etc., near glass transition. Quite recently, the conventional DSC has been sophisticated by employing a composite temperature profile for heating, resulting in the Temperature Modulated DSC (TMDSC) or Alternating DSC (ADSC). Measurements made using ADSC reveal thermal details with enhanced accuracy and resolution, and this has lead to a better understanding of the nature of glass transition. The thermal parameters obtained using DSC/ADSC are also vital for understanding the electrical switching behavior of glassy chalcogenides. The motivation of this thesis was twofold: The first was to develop a novel, high voltage programmable power supply for electrical switching analysis of samples exhibiting high VT, and second to investigate the thermal and electrical switching behavior of certain Se-Te based glasses with Ge and Sb additives. The thesis contains seven chapters: Chapter 1: This chapter provides an overview of amorphous semiconductors (a-SC) with an emphasis on preparation and properties of glassy chalcogenides. The various structural models and topological thresholds of a-SC are discussed with relations to the glass forming ability of materials. The electronic band models and defect states are also dealt with. The essentials of electrical switching behavior of chalcogenides are discussed suggesting the electronic nature of switching and the role of thermal properties on switching. Chapter 2: The second chapter essentially deals with theory and practice of the experimental techniques adopted in the thesis work. The details of the melt-quenching method of synthesizing glassy samples are provided. Considering the importance, the theory of thermal analysis by DSC & ADSC, are discussed in detail, highlighting the advantages of the latter method adopted in the thesis work. The instrumentation and electronics, developed and used for electrical switching analysis are also introduced at a block diagram level. Finally, the methods used for structural analysis are briefed. Chapter 3: This chapter is dedicated to the design and development details of the programmable High Voltage dc Power Supply (HVPS: 1750 V, 45 mA) undertaken in the thesis work. The guidelines used for power supply topology selection, the specifications and block diagram of the HVPS are provided in that sequence. The operation of the HVPS is discussed using the circuit diagram approach. The details of software control are also given. The performance validations of the HVPS, undertaken through voltage & current regulation tests, step & frequency response tests are discussed. Finally, the sample-test results on the electrical switching behavior of representative Al20As16Te64 and Ge25Te65Se10 samples, obtained using both the current & voltage sweep options of the HVPS developed are illustrated. Chapter 4: Results of the thermally induced transitions governed by structural changes which are driven by network connectivity in the GexSe35-xTe65 (17 ≤ x ≤ 25) glasses, as revealed by ADSC experiments, are discussed in this chapter. It is found that the GexSe35-xTe65 glasses with x ≤ 20 exhibit two crystallization exotherms (Tc1 & Tc2), whereas those with x ≥ 20.5, show a single crystallization reaction upon heating (Tc). The glass transition temperature of GexSe35-xTe65 glasses is found to show a linear, but not-steep increase, indicating a progressive and not an appreciable build-up in network connectivity with Ge addition. The exothermic reaction at Tc1 has been found to correspond to the partial crystallization of the glass into hexagonal Te and the reaction at Tc2 is associated with the additional crystallization of rhombohedral Ge-Te phase. It is also found that the first crystallization temperature Tc1 of GexSe35-xTe65 glasses of lower Ge concentrations (with x ≤ 20), increases progressively with Ge content and eventually merges with Tc2 at x = 20.5 ( = 2.41); this behavior has been understood on the basis of the reduction in Te-Te bonds of lower energy and an increase in Ge-Te bonds of higher energy, with increasing Ge content. Chapter 5: This chapter deals with the electrical switching studies on GexSe35-xTe65 (17 ≤ x ≤ 25) glasses, with an emphasis on the role of network connectivity/rigidity on the switching behavior. It is found that the switching voltage (VT) increases with Ge content, exhibiting a sudden jump at x=20, the Rigidity Percolation Threshold (RPT) of the system. In addition, the switching behavior changes from memory to threshold type at the RPT and the threshold switching is found to be repetitive for more than 1500 cycles. Chapter 6: In this chapter, the results of thermal analysis (by ADSC) and electrical switching investigations on SbxSe55-xTe45 (2 ≤ x ≤ 9) are discussed. It is found that the addition of trivalent Sb contributes very meagerly to network growth but directly affects the structural relaxation effects at Tg. Further, SbxSe55-xTe45 glasses exhibit memory type electrical switching, which is understood on the basis of poor thermal stability of the samples. The metallicity factor is observed to outweigh the network factor in the composition dependence of VT of SbxSe55-xTe45 glasses. Chapter 7: The chapter 7 summarizes the results obtained in the thesis work and provides the scope for future work. The references are cited in the text along with the first author’s name and year of publication, and are listed at the end of each chapter in alphabetical order.
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日比野, 倫夫, 敬義 丹司, 孝明 花井, 成泰 田中 i 啓子 木村. "高輝度・高解像度電子顕微鏡観察YAGスクリ-ンに関する基礎研究". 1996. http://hdl.handle.net/2237/13038.

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