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Artykuły w czasopismach na temat "High dI/dt"
Przybysz, J. X., D. L. Miller, S. G. Leslie i Y. C. Kao. "High dI/dT light-triggered thyristors". IEEE Transactions on Electron Devices 34, nr 10 (październik 1987): 2192–99. http://dx.doi.org/10.1109/t-ed.1987.23216.
Pełny tekst źródłaHudgins, Jerry L., i William M. Portnoy. "High di/dt Pulse Switching of Thyristors". IEEE Transactions on Power Electronics PE-2, nr 2 (kwiecień 1987): 143–48. http://dx.doi.org/10.1109/tpel.1987.4766348.
Pełny tekst źródłaGerster, Christian, i Patrick Hofer. "Gate-Controlled dv/dt- and di/dt-Limitation in High Power IGBT Converters". EPE Journal 5, nr 3-4 (styczeń 1996): 11–16. http://dx.doi.org/10.1080/09398368.1996.11463368.
Pełny tekst źródłaLi, Zhiqiang, Lin Zhang, Lianghui Li, Xingliang Xu, Hong Tao, Yinghao Meng, Kun Zhou i Juntao Li. "A SiC gate turn-off thyristor with high di/dt for fast switching-on applications". Semiconductor Science and Technology 36, nr 12 (1.11.2021): 12LT02. http://dx.doi.org/10.1088/1361-6641/ac31e1.
Pełny tekst źródłaTANRIVERDİ, OSMAN, i DENİZ YILDIRIM. "Independent closed loop control of di/dt and dv/dt for high power IGBTs". Turkish Journal of Electrical Engineering and Computer Sciences 30, nr 3 (1.01.2022): 487–501. http://dx.doi.org/10.55730/1300-0632.3793.
Pełny tekst źródłaTang, Sheng-Yi. "Study on Characteristics of Enhancement-Mode Gallium-Nitride High-Electron-Mobility Transistor for the Design of Gate Drivers". Electronics 9, nr 10 (25.09.2020): 1573. http://dx.doi.org/10.3390/electronics9101573.
Pełny tekst źródłaLiu, Bo, Ren Ren, Zheyu Zhang, Ben Guo, Fei (Fred) Wang i Daniel Costinett. "Impacts of High Frequency, High di/dt, dv/dt Environment on Sensing Quality of GaN Based Converters and Their Mitigation". CPSS Transactions on Power Electronics and Applications 3, nr 4 (grudzień 2018): 301–12. http://dx.doi.org/10.24295/cpsstpea.2018.00030.
Pełny tekst źródłaHuang, Jun, Haimeng Huang, Xinjiang Lyu i Xing Bi Chen. "Simulation Study of a Low Switching Loss FD-IGBT With High $dI/dt$ and $dV/dt$ Controllability". IEEE Transactions on Electron Devices 65, nr 12 (grudzień 2018): 5545–48. http://dx.doi.org/10.1109/ted.2018.2873598.
Pełny tekst źródłaHaiyang Wang, Xiaoping He, Weiqing Chen, Binjie Xue i Aici Qiu. "A High-Current High-$di/dt$ Pulse Generator Based on Reverse Switching Dynistors". IEEE Transactions on Plasma Science 37, nr 2 (luty 2009): 356–58. http://dx.doi.org/10.1109/tps.2009.2012553.
Pełny tekst źródłaRobson, A. E. "Evolution of a z-pinch with constant dI/dt". Nuclear Fusion 28, nr 12 (1.12.1988): 2171–78. http://dx.doi.org/10.1088/0029-5515/28/12/006.
Pełny tekst źródłaRozprawy doktorskie na temat "High dI/dt"
Rablah, Blake Kenton. "A coupled-circuit representation of IGBT module geometry for high di/dt switching applications". Thesis, University of British Columbia, 2007. http://hdl.handle.net/2429/32231.
Pełny tekst źródłaApplied Science, Faculty of
Electrical and Computer Engineering, Department of
Graduate
Toburen, Mark C. "Power Analysis and Instruction Scheduling for Reduced di/dt in the Execution Core of High-Performance Microprocessors". NCSU, 1999. http://www.lib.ncsu.edu/theses/available/etd-19990628-171119.
Pełny tekst źródłaPower dissipation is becoming a first-order design issue in high-performance microprocessors as clock speeds and transistor densitiescontinue to increase. As power dissipation levels rise, thecooling and reliability of high-performance processors becomesa major issue. This implies that significant research needsto be done in the area of architectural techniques for reducingpower dissipation.One major contributor to a processor's average peak powerdissipation is the presence of high di/dt in its executioncore. High-energy instructions scheduled together in a singlecycle can result in large current spikes during execution. Inthe presence of heavily weighted regions of code, these currentspikes can cause increases in the processor's average peakpower dissipation. However, if the compiler produces largeenough regions, a certain amount of schedule slack should exist,providing opportunities for scheduling optimizations based onper-cycle energy constraints.This thesis proposes a novel approach to instruction schedulingbased on the concept of schedule slack, which builds energyefficient schedules by limiting the energy dissipated in asingle cycle. In this manner, a more uniform di/dt curve isgenerated resulting in a decrease in the execution core's averagepeak power dissipation.
Shahriari, Ejlal. "Commutateurs à semi-conducteurs rapides et à courant élevé pour les applications de puissance pulsée". Electronic Thesis or Diss., Pau, 2024. https://theses.hal.science/tel-04818494.
Pełny tekst źródłaMicro-second range high-current pulses (100s kA) are applied to generate megagauss-range magnetic fields. This high pulsed power technology has been employed in inertial fusion research, X-pinch, and high-energy-density physics. Moreover, a number of industrial applications such as magnetic pulse welding and rock fracturing require high average power, repeatability, and a reliable high-current pulse generator with a long lifespan. Hence, a fast solid-state switch development operating in the range of several hundred kA is of considerable importance.A fast high-current switch is one of the most complex components in a pulsed power generator. Historically, only gas-filled switches could operate under such extreme conditions. However, gas-filled switches have several well-known disadvantages, including low pulse repetition frequency, short lifetimes, and instability in triggering. They are also expensive to use, often requiring gas flow systems, costly gases, and recirculating chambers of gas for repetitive operation. These disadvantages have hindered the widespread adoption of pulsed power technologies.Recent advancements in semiconductor physics and technology have introduced solid-state switches into the pulsed power domain. In particular, silicon high-voltage structures triggered in impact-ionization wave mode present a promising solution for fast high-current solid-state switches (10s-100s kA and 10s kA/μs).The main goal of this thesis is to experimentally demonstrate the capability of high-voltage thyristors to switch fast-high current pulses. to accomplish this goal, two major axes of study are defined as the experimental and theoretical studies. In the experimental work, the main focus is determined based on a key limitation highlighted in the literature, i.e., the cross-sectional area of the thyristor. To eliminate this limitation several solutions have been investigated in this thesis including (i) triggering the largest commercially available thyristor, 100 mm wafer diameter with 5.2 kV static voltage breakdown. (ii) Parallel triggering of an assembly of two and four high-voltage thyristors. (iii) Series-parallel configuration in order to further increase blocking voltage and current capability of the switch simultaneously. In terms of theoretical study, the numerical simulation is conducted to shed light on the avalanche breakdown phenomena in impact-ionization switching mode
Streszczenia konferencji na temat "High dI/dt"
Glidden, S. C. "High voltage, high current, high di/dt solid state switch". W IEE Symposium Pulsed Power 2001. IEE, 2001. http://dx.doi.org/10.1049/ic:20010122.
Pełny tekst źródłaSanders, Howard D., i Steven C. Glidden. "High Current, High DI/DT, Solid State Switch Resistance Model". W 2008 IEEE International Power Modulators and High Voltage Conference. IEEE, 2008. http://dx.doi.org/10.1109/ipmc.2008.4743660.
Pełny tekst źródłaPína, Libor, Jiří Hájek, Jan Boháček i Jan Vobecký. "High-Voltage Thyristors with Enhanced Dynamic Robustness". W 16th International Seminar On Power Semiconductors. Czech Technical University in Prague, 2023. http://dx.doi.org/10.14311/isps.2023.014.
Pełny tekst źródłaLi, Chunpeng, Puran Rakhra, Patrick Norman, Pawel Niewczas, Graeme Burt i Paul Clarkson. "Practical computation of di/dt for high-speed protection of DC microgrids". W 2017 IEEE Second International Conference on DC Microgrids (ICDCM). IEEE, 2017. http://dx.doi.org/10.1109/icdcm.2017.8001037.
Pełny tekst źródłaChen, Rongxin, Bo Yi, Moufu Kong i Xingbi Chen. "Simulation Study of Trench IGBT with Diode-Clamped P-Well for High dI/dt and dV/dt Controllability". W 2019 IEEE 13th International Conference on ASIC (ASICON). IEEE, 2019. http://dx.doi.org/10.1109/asicon47005.2019.8983572.
Pełny tekst źródłaO'Brien, Heather, William Shaheen, Timothy Crowley i Stephen B. Bayne. "Evaluation of a 10 kV, 400 kA Si SGTO at High dI/dt". W Conference Record of the 2006 Twenty-Seventh International Power Modulator Symposium. IEEE, 2006. http://dx.doi.org/10.1109/modsym.2006.365226.
Pełny tekst źródłaAhmed, A., L. Coulbeck, A. Castellazzi i C. M. Johnson. "Design and test of a PCB Rogowski coil for very high dI/dt detection". W 2012 EPE-ECCE Europe Congress. IEEE, 2012. http://dx.doi.org/10.1109/epepemc.2012.6397192.
Pełny tekst źródłaLiu, Chao, Wanjun Chen, Hong Tao, Yijun Shi, Xuefeng Tang, Wuhao Gao, Qi Zhou, Zhaoji Li i Bo Zhang. "Transient overvoltage induced failure of MOS-controlled thyristor under ultra-high di/dt condition". W 2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD). IEEE, 2017. http://dx.doi.org/10.23919/ispsd.2017.7988930.
Pełny tekst źródłaLiu, Chao, Wanjun Chen, Yijun Shi, Bin Qiao, Qian Jiang, Yun Xia, Qijun Zhou i in. "4.5kV Insulated Gate Triggered Thyristor (IGTT) with High $di/dt$ Characteristics for Pulse Power Applications". W 2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD). IEEE, 2019. http://dx.doi.org/10.1109/ispsd.2019.8757584.
Pełny tekst źródłaChavan, Govind, Xiaoqing Song, Debanjan Chatterjee, Abhinav Patni i Pietro Cairoli. "Coordination of Solid-State Circuit Breakers for DC Grids Under High-Fault-di/dt Conditions". W 2022 IEEE Energy Conversion Congress and Exposition (ECCE). IEEE, 2022. http://dx.doi.org/10.1109/ecce50734.2022.9947849.
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