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Artykuły w czasopismach na temat "HAShCache"

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Patil, Adarsh, i Ramaswamy Govindarajan. "HAShCache". ACM Transactions on Architecture and Code Optimization 14, nr 4 (20.12.2017): 1–26. http://dx.doi.org/10.1145/3158641.

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Meneghetti, Alessio, Massimiliano Sala i Daniele Taufer. "A Survey on PoW-based Consensus". Annals of Emerging Technologies in Computing 4, nr 1 (1.01.2020): 8–18. http://dx.doi.org/10.33166/aetic.2020.01.002.

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We provide a historical overview of proof-of-work techniques and the fields in which it plunges its roots. We are interested in PoW-techniques applied to blockchain technology and therefore we survey the state-of-the-art protocols employing these methods for consensus algorithms, emphasizing the differences between the efficient hashcash systems and the promising bread pudding protocols. Afterwards, the consensus mechanisms are discussed and some interesting known attacks to these algorithms are collected and classified according to their underlying ideas.
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Curran, Kevin, i John Honan. "Eliminating the Volume of Spam E-Mails Using a Hashcash-Based Solution". Information Systems Security 15, nr 2 (1.05.2006): 22–41. http://dx.doi.org/10.1201/1086.1065898x/46051.15.2.20060501/93406.5.

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Meneghetti, Alessio, Massimiliano Sala i Daniele Taufer. "A New ECDLP-Based PoW Model". Mathematics 8, nr 8 (12.08.2020): 1344. http://dx.doi.org/10.3390/math8081344.

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Blockchain technology has attracted a lot of research interest in the last few years. Originally, their consensus algorithm was Hashcash, which is an instance of the so-called Proof-of-Work. Nowadays, there are several competing consensus algorithms, not necessarily PoW. In this paper, we propose an alternative proof of work algorithm which is based on the solution of consecutive discrete logarithm problems over the point group of elliptic curves. At the same time, we sketch a blockchain scheme, whose consensus is reached via our algorithm. In the considered architecture, the curves are pseudorandomly determined by block creators, chosen to be cryptographically secure and changed every epoch. Given the current state of the chain and a prescribed set of transactions, the curve selection is fully rigid, therefore trust is needed neither in miners nor in the scheme proposers.
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Shinde, Siddhesh, i Asst Prof Gauri Ansurkar. "USE OF BLOCKCHAIN IN VOTING SYSTEM". INTERANTIONAL JOURNAL OF SCIENTIFIC RESEARCH IN ENGINEERING AND MANAGEMENT 07, nr 04 (11.04.2023). http://dx.doi.org/10.55041/ijsrem18868.

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What is blockchain technology?since its invention in 2008. The first decentralized by Satoshi Nakamoto. He improved the overall design using a Hashcash like method. The design was implemented as a core component of the cryptocurrency bitcoin where its serves as the public ledger for all transaction on the entire network. It is a digital ledger technology that allows for secure and transparent record-keeping of transactions.In a blockchain, every participant has a copy of the ledger, and all transactions are verified and recorded in a decentralized and transparent manner. The security of the blockchain comes from the fact that once a block is added to the chain, it cannot be altered or deleted without the consensus of the network.Besides its original use case in digital currencies, blockchain technol- ogy has been applied to various industries, such as supply chain management, healthcare, real estate, and voting systems. Its po- tential benefits include increased security, transparency, effi- ciency, and decentralization. One of the key benefits of using blockchain technology in voting is the ability to create a trans- parent and decentralized system. This means that anyone can verify the accuracy of the results, and there is no need for a centralized authority to oversee the process. The blockchain acts as a distributed ledger, with each node on the network hold- ing a copy of the transaction history. Key Words: Blockchain, Voting
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Rozprawy doktorskie na temat "HAShCache"

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Patil, Adarsh. "Heterogeneity Aware Shared DRAM Cache for Integrated Heterogeneous Architectures". Thesis, 2017. http://etd.iisc.ac.in/handle/2005/4124.

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Integrated Heterogeneous System (IHS) processors pack throughput-oriented GPGPUs along-side latency-oriented CPUs on the same die sharing certain resources, e.g., shared last level cache, network-on-chip (NoC), and the main memory. They also share virtual and physical address spaces and unify the memory hierarchy. The IHS architecture allows for easier programmability, data management and efficiency. However, the significant disparity in the demands for memory and other shared resources between the GPU cores and CPU cores poses significant problems in exploiting the full potential of this architecture. In this work, we propose adding a large capacity stacked DRAM, used as a shared last level cache, for the IHS processors. The reduced latency of access and large bandwidth provided by the DRAM cache can help improve performance respectively of CPU and GPGPU while the large capacity can help contain the working set of the IHS workloads. However, adding the DRAM cache naively leaves significant performance on the table due to the disparate demands from CPU and GPU cores for DRAM cache and memory accesses. In particular, the imbalance can significantly reduce the performance benefits that the CPU cores would have otherwise enjoyed with the introduction of the DRAM cache. This necessitates a heterogeneity-aware management of this shared resource for improved performance. To address this, in this thesis, we propose three simple techniques to enhance the performance of CPU application while ensuring very little or no performance impact to the GPU. Specifically, we propose (i) PrIS, a prioritization scheme for scheduling CPU requests at the DRAM cache controller, (ii) ByE, a selective and temporal bypassing scheme for CPU requests at the DRAM cache and (iii) Chaining, an occupancy controlling mechanism for GPU lines in the DRAM cache through pseudoassociativity. The resulting cache, HAShCache, is heterogeneity-aware and can adapt dynamically to address the inherent disparity of demands in an IHS architecture with simple light weight schemes. We enhance the gem5-gpu simulator to model an IHS architecture with stacked DRAM as a cache, coherent GPU L2 cache and CPU caches and a shared unified physical memory. Using this setup we perform detailed experimental evaluation of the proposed HAShCache and demonstrate an average system performance (combined performance of CPU and GPU cores) improvement of 41% over a naive DRAM cache and over 100% improvement over a baseline system with no stacked DRAM cache.
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Części książek na temat "HAShCache"

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Curran, Kevin, i John Honan. "Fighting the Problem of Unsolicited E-Mail Using a Hashcash Proof-of-Work Approach". W Business Data Communications and Networking, 346–74. IGI Global, 2007. http://dx.doi.org/10.4018/978-1-59904-274-9.ch014.

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This chapter investigates the problem of e-mail spam, and identifies methods to minimize the volumes. The analysis focuses on the hashcash proof-of-work approach, and investigates the feasibility of a hashcash-based solution. A potential problem with proof-of-work is that disparity across different powered computers may result in some unfortunate users spending a disproportionately long time calculating a stamp. An experiment is carried out to time how long it takes to calculate stamps across a variety of processor speeds. It is concluded from the analysis of the results that due to this problem of egalitarianism, hashcash (or CPU-bound proof-of-work in general) is not a suitable approach as a stand-alone anti-spam solution. It appears that a hybrid anti-spam system in conjunction with a legal and policy framework is the best approach.
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Streszczenia konferencji na temat "HAShCache"

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Rahimpour, Sonbol, i Majid Khabbazian. "Hashcashed Reputation with Application in Designing Watchtowers". W 2021 IEEE International Conference on Blockchain and Cryptocurrency (ICBC). IEEE, 2021. http://dx.doi.org/10.1109/icbc51069.2021.9461123.

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Violaris, George, i Ioanna Dionysiou. "Out-of-Band Authentication Model with Hashcash Brute-Force Prevention". W 2014 IEEE International Conference on High Performance Computing and Communications (HPCC), 2014 IEEE 6th International Symposium on Cyberspace Safety and Security (CSS) and 2014 IEEE 11th International Conference on Embedded Software and Systems (ICESS). IEEE, 2014. http://dx.doi.org/10.1109/hpcc.2014.133.

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