Gotowe bibliografie tematyczne / Hardware for Artificial Intelligence

Gotowa bibliografia na temat „Hardware for Artificial Intelligence”

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Data publikacji: 15 czerwca 2024

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Artykuły w czasopismach na temat "Hardware for Artificial Intelligence"

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Burkert, Andreas. "Hardware for Artificial Intelligence". ATZ worldwide 121, nr 5 (26.04.2019): 8–13. http://dx.doi.org/10.1007/s38311-019-0060-0.

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Burkert, Andreas. "Hardware for Artificial Intelligence". ATZelectronics worldwide 14, nr 3 (marzec 2019): 8–13. http://dx.doi.org/10.1007/s38314-019-0026-4.

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Popov, I. "SoC hardware supporting artificial intelligence". ELECTRONICS: Science, Technology, Business, nr 7 (2018): 116–23. http://dx.doi.org/10.22184/1992-4178.2018.178.7.116.123.

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VerWey, John. "The Other Artificial Intelligence Hardware Problem". Computer 55, nr 1 (styczeń 2022): 34–42. http://dx.doi.org/10.1109/mc.2021.3113271.

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Prati, Enrico. "Quantum neuromorphic hardware for quantum artificial intelligence". Journal of Physics: Conference Series 880 (sierpień 2017): 012018. http://dx.doi.org/10.1088/1742-6596/880/1/012018.

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Yoon, Young Hyun, Dong Hyun Hwang, Jun Hyeok Yang i Seung Eun Lee. "Intellino: Processor for Embedded Artificial Intelligence". Electronics 9, nr 7 (18.07.2020): 1169. http://dx.doi.org/10.3390/electronics9071169.

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The development of computation technology and artificial intelligence (AI) field brings about AI to be applied to various system. In addition, the research on hardware-based AI processors leads to the minimization of AI devices. By adapting the AI device to the edge of internet of things (IoT), the system can perform AI operation promptly on the edge and reduce the workload of the system core. As the edge is influenced by the characteristics of the embedded system, implementing hardware which operates with low power in restricted resources on a processor is necessary. In this paper, we propose the intellino, a processor for embedded artificial intelligence. Intellino ensures low power operation based on optimized AI algorithms and reduces the workload of the system core through the hardware implementation of a neural network. In addition, intellino’s dedicated protocol helps the embedded system to enhance the performance. We measure intellino performance, achieving over 95% accuracy, and verify our proposal with an field programmable gate array (FPGA) prototyping.
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Wang, Xiaoyin. "Artificial intelligence enhanced environmental detection system". Applied and Computational Engineering 66, nr 1 (29.05.2024): 156–59. http://dx.doi.org/10.54254/2755-2721/66/20240938.

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This paper presents a novel approach to improve the accuracy of environmental detection and prediction by incorporating artificial intelligence (AI) technology into existing detection systems. At the heart of our approach lies the combination of a complex AI model with the hardware and software components of the inspection system. This combined approach can significantly improve the accuracy of detection systems through greater ability to predict environmental changes and events, underscoring the superior performance of hardware and software combined with AI technology. This paper delves into the details of hardware and software design, and discusses measurement implementation methods using a build-down machine. We also explore the practical application of AI models within the framework described above. In addition, this paper also describes the implementation of communication protocols to ensure the effective data exchange between the system network and the artificial intelligence model. These protocols are essential for the real-time processing and analysis of environmental data, enabling systems to respond quickly to detected changes.
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HNATCHUK, YELYZAVETA, YEVHENIY SIERHIEIEV i ALINA HNATCHUK. "USING ARTIFICIAL INTELLIGENCE ACCELERATORS TO TRAIN COMPUTER GAME CHARACTERS". Computer systems and information technologies, nr 1 (21.08.2021): 63–70. http://dx.doi.org/10.31891/csit-2021-3-9.

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A review of the literature has shown that today, given the complexity of computational processes and the high cost of these processes, the gaming computer industry needs to improve hardware and software to increase the efficiency and speed of processing artificial intelligence algorithms. An analysis of existing machine learning tools and existing hardware solutions to accelerate artificial intelligence. A reasonable choice of hardware solutions that are most effective for the implementation of the task. Possibilities of practical use of the artificial intelligence accelerator are investigated. The effectiveness of the proposed solutions has been proven by experiments. The use of an artificial intelligence accelerator model allowed to accelerate the learning of a computer game character by 2.14 times compared to classical methods.
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Smith, Adam Leon. "Artificial Intelligence". ITNOW 64, nr 3 (19.08.2022): 47. http://dx.doi.org/10.1093/combul/bwac093.

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Smith, Adam Leon. "Artificial Intelligence". ITNOW 64, nr 2 (12.05.2022): 65. http://dx.doi.org/10.1093/itnow/bwac065.

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Rozprawy doktorskie na temat "Hardware for Artificial Intelligence"

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Orozco, Gabriel Mario. "Artificial intelligence opportunities and an end-do-end data-driven solution for predicting hardware failures". Thesis, Massachusetts Institute of Technology, 2016. http://hdl.handle.net/1721.1/104304.

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Thesis: M.B.A., Massachusetts Institute of Technology, Sloan School of Management, 2016. In conjunction with the Leaders for Global Operations Program at MIT.
Thesis: S.M. in Engineering Systems, Massachusetts Institute of Technology, Department of Mechanical Engineering, 2016. In conjunction with the Leaders for Global Operations Program at MIT.
Cataloged from PDF version of thesis.
Includes bibliographical references (pages 93-96).
Dell's target to provide quality products based on reliability, security, and manageability, has driven Dell Inc. to become one of the largest PC suppliers. The recent developments in Artificial Intelligence (AI) combined with a competitive market situation have encouraged Dell to research new opportunities. Al research and breakthroughs have risen in the last years, bringing along revolutionary technologies and companies that are disrupting all businesses. Over 30 potential concepts for Al integration at Dell Inc. were identified and evaluated to select the ones with the highest potential. The top-most concept consisted of preventing in real time the failure of hardware. This concept was investigated using a data science process. Currently, there exist a number of machine learning tools that automate the last stages of the proposed data science process to create predictive models. The utilized tools vary in functionality and evaluation standards, but also provide other services such as data and model storage and visualization options. The proposed solution utilizes the deep feature synthesis algorithm that automatically generates features from problem-specific data. These engineered features boosted predictive model accuracy by an average of 10% for the AUC and up to 250% in recall for test (out of sample) data. The proposed solution estimates an impact exceeding $407M in the first five years for Dell Inc. and all of the involved suppliers. Conservatively, the direct impact on Dell Inc. is particular to batteries under warranty and is expected to surpass $2.7M during the first five years. The conclusions show a high potential for implementation.
by Mario Orozco Gabriel.
M.B.A.
S.M. in Engineering Systems
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Cheng, Chih Kang. "Hardware implementation of the complex Hopfield neural network". CSUSB ScholarWorks, 1995. https://scholarworks.lib.csusb.edu/etd-project/1016.

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GRIMALDI, MATTEO. "Hardware-Aware Compression Techniques for Embedded Deep Neural Networks". Doctoral thesis, Politecnico di Torino, 2021. http://hdl.handle.net/11583/2933756.

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Bedi, Abhishek. "A generic platform for the evolution of hardware". Click here to access this resource online, 2009. http://hdl.handle.net/10292/651.

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Evolvable Hardware is a technique derived from evolutionary computation applied to a hardware design. The term evolutionary computation involves similar steps as involved in the human evolution. It has been given names in accordance with the electronic technology like, Genetic Algorithm (GA), Evolutionary Strategy (ES) and Genetic Programming (GP). In evolutionary computing, a configured bit is considered as a human chromosome for a genetic algorithm, which has to be downloaded into hardware. Early evolvable hardware experiments were conducted in simulation and the only elite chromosome was downloaded to the hardware, which was labelled as Extrinsic Hardware. With the invent of Field Programmable Gate Arrays (FPGAs) and Reconfigurable Processing Units (RPUs), it is now possible for the implementation solutions to be fast enough to evaluate a real hardware circuit within an evolutionary computation framework; this is called an Intrinsic Evolvable Hardware. This research has been taken in continuation with project 'Evolvable Hardware' done at Manukau Institute of Technology (MIT). The project was able to manually evolve two simple electronic circuits of NAND and NOR gates in simulation. In relation to the project done at MIT this research focuses on the following: To automate the simulation by using In Circuit Debugging Emulators (IDEs), and to develop a strategy of configuring hardware like an FPGA without the use of their company supplied in circuit debugging emulators, so that the evolution of an intrinsic evolvable hardware could be controlled, and is hardware independent. As mentioned, the research conducted here was able to develop an evolvable hardware friendly Generic Structure which could be used for the development of evolvable hardware. The structure developed was hardware independent and was able to run on various FPGA hardware’s for the purpose of intrinsic evolution. The structure developed used few configuration bits as compared to current evolvable hardware designs.
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MARRONE, FRANCESCO. "Memristor-based hardware accelerators: from device modeling to AI applications". Doctoral thesis, Politecnico di Torino, 2022. http://hdl.handle.net/11583/2972305.

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Al, Rawashdeh Khaled. "Toward a Hardware-assisted Online Intrusion Detection System Based on Deep Learning Algorithms for Resource-Limited Embedded Systems". University of Cincinnati / OhioLINK, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1535464571843315.

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Kumar, Sharad Kumar. "Analysis of Machine Learning Modeling Attacks on Ring Oscillator based Hardware Security". University of Toledo / OhioLINK, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1541759752027838.

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CONTI, DANIELE. "Neuromorphic systems based on memristive devices - From the material science perspective to bio-inspired learning hardware". Doctoral thesis, Politecnico di Torino, 2018. http://hdl.handle.net/11583/2711511.

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Hardware computation is facing in the present age a deep transformation of its own paradigms. Silicon based computation is reaching its limit due to the physical constraints of transistor technology. As predicted by the Moore’s law, downscaling of transistor dimensions doubled each year since the 60s, leading nowadays to the extreme of 16-nm channel width of the present state-of-the-art technology. No further improvement is possible, since laws of physics impose a different electrical behavior when lower dimensions are attempted. Multiple solutions are then envisaged, spanning the range from quantum computing to neuromorphic computing. The present dissertation wants to be a preliminary study for understanding the opportunities enabled by neuromorphic computing based on resistive switching memories. In particular, brain inspires technology and architecture of new generation processors because of its unique properties: parallel and distributed computation, superposition of processing and memory unit, low power consumption, to cite only some of them. Such features make brain particularly efficient and robust against degraded data, further than particularly suitable to process and store in memory new nformation. Despite many research projects and some commercial products are already proposing brain-like computing processors, like spiNNaker or IBM’s Bluenorth, they only mimic the brain functioning with standard Silicon technology, that is inherently serial and distinguish between processing and memory unit. Resistive switching technology on the other hand, would allow to overcome many of these issues, enabling a far better match between biological and artificial neuromorphic computation. Resistive switching are, generally speaking, Metal-Insulator-Metal structures able to change their electrical conductance as a consequence of the history of applied electric signal. In such sense, they behave exactly as synapses do in a biological neural networks. For this reason, resistive switching when modeled as memristor, i.e. memory-resistor, can act as artificial synapses and, moreover, are particularly suitable to be interfaced with artificial Silicon neurons that are designed to replicate the biological behavior when excited with electric pulses. Anyhow, from the technological standpoint, there is still no standard on the design and fabrication of resistive switching, so that multiple structure and materials are investigated. In this dissertation, it is reported an analysis of multiple resistive switching devices, based on various materials, i.e. TiO2, ZnO and HfO, and device architectures, i.e. thin film and nanostructured devices, with the scope of both characterizing and comprehending the physics behind resistive switching phenomena. Furthermore, numerical simulations of artificial spiking neural networks, embedding Silicon neurons and HfO-based resistive switching are designed and performed, in order to give a systematic analysis of the performances reached by this new kind of computing paradigm.
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Imbulgoda, Liyangahawatte Gihan Janith Mendis. "Hardware Implementation and Applications of Deep Belief Networks". University of Akron / OhioLINK, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=akron1476707730643462.

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Brink, Stephen Isaac. "Learning in silicon: a floating-gate based, biophysically inspired, neuromorphic hardware system with synaptic plasticity". Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/50143.

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The goal of neuromorphic engineering is to create electronic systems that model the behavior of biological neural systems. Neuromorphic systems can leverage a combination of analog and digital circuit design techniques to enable computational modeling, with orders of magnitude of reduction in size, weight, and power consumption compared to the traditional modeling approach based upon numerical integration. These benefits of neuromorphic modeling have the potential to facilitate neural modeling in resource-constrained research environments. Moreover, they will make it practical to use neural computation in the design of intelligent machines, including portable, battery-powered, and energy harvesting applications. Floating-gate transistor technology is a powerful tool for neuromorphic engineering because it allows dense implementation of synapses with nonvolatile storage of synaptic weights, cancellation of process mismatch, and reconfigurable system design. A novel neuromorphic hardware system, featuring compact and efficient channel-based model neurons and floating-gate transistor synapses, was developed. This system was used to model a variety of network topologies with up to 100 neurons. The networks were shown to possess computational capabilities such as spatio-temporal pattern generation and recognition, winner-take-all competition, bistable activity implementing a "volatile memory", and wavefront-based robotic path planning. Some canonical features of synaptic plasticity, such as potentiation of high frequency inputs and potentiation of correlated inputs in the presence of uncorrelated noise, were demonstrated. Preliminary results regarding formation of receptive fields were obtained. Several advances in enabling technologies, including methods for floating-gate transistor array programming, and the creation of a reconfigurable system for studying adaptation in floating-gate transistor circuits, were made.
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Książki na temat "Hardware for Artificial Intelligence"

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Mishra, Ashutosh, Jaekwang Cha, Hyunbin Park i Shiho Kim, red. Artificial Intelligence and Hardware Accelerators. Cham: Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-22170-5.

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Adamatzky, Andrew. Artificial life models in hardware. Dordrecht: Springer, 2009.

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Kropf, Thomas. Introduction to Formal Hardware Verification. Berlin, Heidelberg: Springer Berlin Heidelberg, 1999.

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Baofu, Peter. The future of post-human computing: A preface to a new theory of hardware, software and the mind. Great Abington, Cambridge, UK: Cambridge International Science Publishing, 2011.

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Jovanović, Aleksandar S. Expert Systems in Structural Safety Assessment: Proceedings of an International Course October 2-4, 1989, Stuttgart, FRG. Berlin, Heidelberg: Springer Berlin Heidelberg, 1989.

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Lee, Bang W. Hardware annealing in analog VLSI neurocomputing. Boston: Kluwer Academic Publishers, 1991.

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Eder, Kerstin. Hardware and Software: Verification and Testing: 7th International Haifa Verification Conference, HVC 2011, Haifa, Israel, December 6-8, 2011, Revised Selected Papers. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012.

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Strous, Leon. Internet of Things. Information Processing in an Increasingly Connected World: First IFIP International Cross-Domain Conference, IFIPIoT 2018, Held at the 24th IFIP World Computer Congress, WCC 2018, Poznan, Poland, September 18-19, 2018, Revised Selected Papers. Cham: Springer Nature, 2019.

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Sood, A. K. Active Perception and Robot Vision. Berlin, Heidelberg: Springer Berlin Heidelberg, 1992.

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Oman) ICC (Conference : Oman) (1st 2014 Muscat. Intelligent cloud computing: First International Conference, ICC 2014, Muscat, Oman, February 24-26, 2014, Revised selected papers. Cham: Springer, 2015.

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Części książek na temat "Hardware for Artificial Intelligence"

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Mishra, Ashutosh, Pamul Yadav i Shiho Kim. "Artificial Intelligence Accelerators". W Artificial Intelligence and Hardware Accelerators, 1–52. Cham: Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-22170-5_1.

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Yadav, Pamul, Ashutosh Mishra i Shiho Kim. "Neuromorphic Hardware Accelerators". W Artificial Intelligence and Hardware Accelerators, 225–68. Cham: Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-22170-5_8.

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Lippmann, Bernhard, Matthias Ludwig i Horst Gieser. "Generating Trust in Hardware through Physical Inspection". W Embedded Artificial Intelligence, 45–59. New York: River Publishers, 2023. http://dx.doi.org/10.1201/9781003394440-5.

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Liu, Yanli, Bochen Guan, Weiyi Li, Qinwen Xu i Shuxue Quan. "SMOF: Squeezing More Out of Filters Yields Hardware-Friendly CNN Pruning". W Artificial Intelligence, 242–54. Cham: Springer Nature Switzerland, 2022. http://dx.doi.org/10.1007/978-3-031-20497-5_20.

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Burns, Jeff. "The New Era of AI Hardware". W From Artificial Intelligence to Brain Intelligence, 55–65. New York: River Publishers, 2022. http://dx.doi.org/10.1201/9781003338215-4.

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Jhung, Junekyo, Ho Suk, Hyungbin Park i Shiho Kim. "Hardware Accelerators for Autonomous Vehicles". W Artificial Intelligence and Hardware Accelerators, 269–317. Cham: Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-22170-5_9.

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Kim, Jinhyuk, i Shiho Kim. "Hardware Accelerators in Embedded Systems". W Artificial Intelligence and Hardware Accelerators, 167–81. Cham: Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-22170-5_6.

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Nedjah, Nadia, i Luiza de Macedo Mourelle. "Hardware Architecture for Genetic Algorithms". W Innovations in Applied Artificial Intelligence, 554–56. Berlin, Heidelberg: Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11504894_76.

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Dimopoulos, Alexandros, Christos Pavlatos, Ioannis Panagopoulos i George Papakonstantinou. "An Efficient Hardware Implementation for AI Applications". W Advances in Artificial Intelligence, 35–45. Berlin, Heidelberg: Springer Berlin Heidelberg, 2006. http://dx.doi.org/10.1007/11752912_6.

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Abidi, Taha Yassine, Iyad Dayoub, Elhadj Doguech i Ihsen Alouani. "Federated Learning: Privacy, Security and Hardware Perspectives". W Advancing Edge Artificial Intelligence, 65–86. New York: River Publishers, 2024. http://dx.doi.org/10.1201/9781003478713-3.

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Streszczenia konferencji na temat "Hardware for Artificial Intelligence"

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Dally, William J., C. Thomas Gray, John Poulton, Brucek Khailany, John Wilson i Larry Dennison. "Hardware-Enabled Artificial Intelligence". W 2018 IEEE Symposium on VLSI Circuits. IEEE, 2018. http://dx.doi.org/10.1109/vlsic.2018.8502368.

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"Hardware for AI". W Emerging Topics in Artificial Intelligence (ETAI) 2021, redaktorzy Giovanni Volpe, Joana B. Pereira, Daniel Brunner i Aydogan Ozcan. SPIE, 2021. http://dx.doi.org/10.1117/12.2606000.

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Dinu, A., i P. L. Ogrutan. "Opportunities of using artificial intelligence in hardware verification". W 2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME). IEEE, 2019. http://dx.doi.org/10.1109/siitme47687.2019.8990751.

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Fojtik, Rostislav. "USING HARDWARE TO SUPPORT ARTIFICIAL INTELLIGENCE IN EDUCATION". W 18th International Technology, Education and Development Conference. IATED, 2024. http://dx.doi.org/10.21125/inted.2024.1170.

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Lim, Kah Yee, Joan Hau i Yiqi Tew. "Computer Performance Evaluation for Virtual Classroom with Artificial Intelligence Features". W International Conference on Digital Transformation and Applications (ICDXA 2021). Tunku Abdul Rahman University College, 2021. http://dx.doi.org/10.56453/icdxa.2021.1008.

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The advancement of computer technology allows students to interact with Artificial Intelligence (AI) through smart classrooms. Smart classroom is one of the latest technology enhanced learning (TEL) which allows the classroom and students to interact during the learning process. Currently, smart classrooms are believed to change current dull teaching methods and enhance the students’ learning experience. Therefore, the proposed paper is a comprehensive study of applying artificial intelligence features to an intelligent classroom system (a.k.a virtual classroom system) that provides face detection and hand gestures through e-learning classrooms. Artificial intelligence features will be implemented and compared on three machines with varying hardware specifications. According to the results of this study, Tensorflow Handpose provides more accuracy than MediaPipe Hands, although it requires higher hardware specifications. Face-api.js also outperforms TensorFlow and MediaPipe when it comes to executing face detection functions. According to this study, the present face and hand APIs can be adopted in smart classroom systems. Keywords: Virtual Classroom, Google Meet, Face Detection, Hand Gesture Detection, Object Recognition
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Adamov, Andrey Anatolievich, i Leonid Konstantinovich Eisymont. "Variants of hardware architectural solutions for artificial intelligence systems". W 3rd International Conference “Futurity designing. Digital reality problems”. Keldysh Institute of Applied Mathematics, 2020. http://dx.doi.org/10.20948/future-2020-10.

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Romero, A., C. Heras, M. Vega, J. Naranjo, C. Vázquez i A. Preciado. "Intelligent Open-Hardware ECG Platform for the Heart Patients Control and Diagnosis". W Artificial Intelligence and Applications. Calgary,AB,Canada: ACTAPRESS, 2010. http://dx.doi.org/10.2316/p.2010.674-144.

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Attri, Anant, Sandhya Verma, Shweta Pandey, Yerrolla Chanti, Mansi Sahu i Rajat Balyan. "Exhilarating Growth in Education Through Artificial Intelligence". W 2023 International Conference on Quantum Technologies, Communications, Computing, Hardware and Embedded Systems Security (iQ-CCHESS). IEEE, 2023. http://dx.doi.org/10.1109/iq-cchess56596.2023.10391474.

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Singh, Vinayak, Abhiranjan Dixit, Shweta Pandey, Bura Vijay Kumar, Vikrant Pachouri i Mansi Sahu. "Role of Artificial Intelligence in Criminal Investigation". W 2023 International Conference on Quantum Technologies, Communications, Computing, Hardware and Embedded Systems Security (iQ-CCHESS). IEEE, 2023. http://dx.doi.org/10.1109/iq-cchess56596.2023.10391288.

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Burguete-Lopez, Arturo, Maksim Makarenko, Qizhou Wang, Fedor Getman i Andrea Fratalocchi. "Artificial-Intelligence Empowered Universal Metrology Optical Camera". W CLEO: Applications and Technology. Washington, D.C.: Optica Publishing Group, 2023. http://dx.doi.org/10.1364/cleo_at.2023.jtu2a.25.

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We introduce a metrology platform that employs artificial intelligence in hardware through optical metasurfaces. We experimentally demonstrate the measurement of thin film thickness and refractive index maps with nanometer accuracy using this platform.
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Raporty organizacyjne na temat "Hardware for Artificial Intelligence"

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Lohn, Andrew, i Micah Musser. AI and Compute: How Much Longer Can Computing Power Drive Artificial Intelligence Progress? Center for Security and Emerging Technology, styczeń 2022. http://dx.doi.org/10.51593/2021ca009.

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Between 2012 and 2018, the amount of computing power used by record-breaking artificial intelligence models doubled every 3.4 months. Even with money pouring into the AI field, this trendline is unsustainable. Because of cost, hardware availability and engineering difficulties, the next decade of AI can't rely exclusively on applying more and more computing power to drive further progress.
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Musser, Micah, Rebecca Gelles, Catherine Aiken i Andrew Lohn. “The Main Resource is the Human”. Center for Security and Emerging Technology, kwiecień 2023. http://dx.doi.org/10.51593/20210071.

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Progress in artificial intelligence (AI) depends on talented researchers, well-designed algorithms, quality datasets, and powerful hardware. The relative importance of these factors is often debated, with many recent “notable” models requiring massive expenditures of advanced hardware. But how important is computational power for AI progress in general? This data brief explores the results of a survey of more than 400 AI researchers to evaluate the importance and distribution of computational needs.
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Ruvinsky, Alicia, Timothy Garton, Daniel Chausse, Rajeev Agrawal, Harland Yu i Ernest Miller. Accelerating the tactical decision process with High-Performance Computing (HPC) on the edge : motivation, framework, and use cases. Engineer Research and Development Center (U.S.), wrzesień 2021. http://dx.doi.org/10.21079/11681/42169.

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Managing the ever-growing volume and velocity of data across the battlefield is a critical problem for warfighters. Solving this problem will require a fundamental change in how battlefield analyses are performed. A new approach to making decisions on the battlefield will eliminate data transport delays by moving the analytical capabilities closer to data sources. Decision cycles depend on the speed at which data can be captured and converted to actionable information for decision making. Real-time situational awareness is achieved by locating computational assets at the tactical edge. Accelerating the tactical decision process leverages capabilities in three technology areas: (1) High-Performance Computing (HPC), (2) Machine Learning (ML), and (3) Internet of Things (IoT). Exploiting these areas can reduce network traffic and shorten the time required to transform data into actionable information. Faster decision cycles may revolutionize battlefield operations. Presented is an overview of an artificial intelligence (AI) system design for near-real-time analytics in a tactical operational environment executing on co-located, mobile HPC hardware. The report contains the following sections, (1) an introduction describing motivation, background, and state of technology, (2) descriptions of tactical decision process leveraging HPC problem definition and use case, and (3) HPC tactical data analytics framework design enabling data to decisions.
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anis, sehab. Artificial Intelligence. ResearchHub Technologies, Inc., sierpień 2023. http://dx.doi.org/10.55277/researchhub.agwfnyrw.

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Roberts, Kamie. Artificial Intelligence Risk Management Framework: Generative Artificial Intelligence Profile. Gaithersburg, MD: National Institute of Standards and Technology, 2024. http://dx.doi.org/10.6028/nist.ai.600-1.

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Novak, Jr, Simmons Gordon S., Porter Robert F., Kumar Bruce W., Causey Vipin i Robert L. Artificial Intelligence Project. Fort Belvoir, VA: Defense Technical Information Center, styczeń 1990. http://dx.doi.org/10.21236/ada230793.

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Guerreiro, Joao, Sergio Rebelo i Pedro Teles. Regulating Artificial Intelligence. Cambridge, MA: National Bureau of Economic Research, listopad 2023. http://dx.doi.org/10.3386/w31921.

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Cwik, Cynthia, Paul Grimm, Maura Grossman i Toby Walsh. Artificial Intelligence and the Courts: Artificial Intelligence Trustworthiness, and Litigation. American Association for the Advancement of Science, wrzesień 2022. http://dx.doi.org/10.1126/aaas.adf0786.

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Karanicolas, Michael, i Mallory Knodel. Artificial Intelligence and the Courts: Artificial Intelligence and Bias - An Evaluation. American Association for the Advancement of Science, wrzesień 2022. http://dx.doi.org/10.1126/aaas.adf0788.

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Firth-Butterfield, Kay, i Karen Silverman. Artificial Intelligence and the Courts: Artificial Intelligence - Foundational Issues and Glossary. American Association for the Advancement of Science, wrzesień 2022. http://dx.doi.org/10.1126/aaas.adf0782.

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