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Artykuły w czasopismach na temat "Hardware Construction Languages (HCLs)"
Kamkin, Alexander Sergeevich, Mikhail Mikhaylovich Chupilko, Mikhail Sergeevich Lebedev, Sergey Aleksandrovich Smolov i Georgi Gaydadjiev. "Comparison of High-Level Synthesis and Hardware Construction Tools". Proceedings of the Institute for System Programming of the RAS 34, nr 5 (2022): 7–22. http://dx.doi.org/10.15514/ispras-2022-34(5)-1.
Pełny tekst źródłaЗаризенко, Инна Николаевна, i Артём Евгеньевич Перепелицын. "АНАЛИЗ СРЕДСТВ И ТЕХНОЛОГИЙ РАЗРАБОТКИ FPGA КАК СЕРВИС". RADIOELECTRONIC AND COMPUTER SYSTEMS, nr 4 (25.12.2019): 88–93. http://dx.doi.org/10.32620/reks.2019.4.10.
Pełny tekst źródłaKohen, Hanan, i Dov Dori. "Improving Conceptual Modeling with Object-Process Methodology Stereotypes". Applied Sciences 11, nr 5 (5.03.2021): 2301. http://dx.doi.org/10.3390/app11052301.
Pełny tekst źródłaGiraldo, Carlos Alberto, Beatriz Florian-Gaviria, Eval Bladimir Bacca-Cortés, Felipe Gómez i Francisco Muñoz. "A programming environment having three levels of complexity for mobile robotics". Ingeniería e Investigación 32, nr 3 (1.09.2012): 76–82. http://dx.doi.org/10.15446/ing.investig.v32n3.35947.
Pełny tekst źródłaZielenkiewicz, Maciej, i Aleksy Schubert. "Automata theory approach to predicate intuitionistic logic". Journal of Logic and Computation 32, nr 3 (16.11.2021): 554–80. http://dx.doi.org/10.1093/logcom/exab069.
Pełny tekst źródłaAkay, Abdullah E., i John Sessions. "Applying the Decision Support System, TRACER, to Forest Road Design". Western Journal of Applied Forestry 20, nr 3 (1.07.2005): 184–91. http://dx.doi.org/10.1093/wjaf/20.3.184.
Pełny tekst źródłaPopescu, Natalie, Ziyang Xu, Sotiris Apostolakis, David I. August i Amit Levy. "Safer at any speed: automatic context-aware safety enhancement for Rust". Proceedings of the ACM on Programming Languages 5, OOPSLA (20.10.2021): 1–23. http://dx.doi.org/10.1145/3485480.
Pełny tekst źródłaBANYASAD, OMID, i PHILIP T. COX. "Integrating design synthesis and assembly of structured objects in a visual design language". Theory and Practice of Logic Programming 5, nr 6 (31.10.2005): 601–21. http://dx.doi.org/10.1017/s1471068404002285.
Pełny tekst źródłaIzatri, Dini Idzni, Nofita Idaroka Rohmah i Renny Sari Dewi. "Identifikasi Risiko pada Perpustakaan Daerah Gresik dengan NIST SP 800-30". JURIKOM (Jurnal Riset Komputer) 7, nr 1 (15.02.2020): 50. http://dx.doi.org/10.30865/jurikom.v7i1.1756.
Pełny tekst źródłaWooldridge, Michael, i Nicholas R. Jennings. "Intelligent agents: theory and practice". Knowledge Engineering Review 10, nr 2 (czerwiec 1995): 115–52. http://dx.doi.org/10.1017/s0269888900008122.
Pełny tekst źródłaRozprawy doktorskie na temat "Hardware Construction Languages (HCLs)"
Ait, Bensaid Samira. "Formal Semantics of Hardware Compilation Framework". Electronic Thesis or Diss., université Paris-Saclay, 2023. http://www.theses.fr/2023UPASG085.
Pełny tekst źródłaStatic worst-case timing analyses are used to ensure the timing deadlines required for safety-critical systems. In order to derive accurate bounds, these timing analyses require precise (micro-)architecture considerations. Usually, such micro-architecture models are constructed by hand from processor manuals.However, with the open-source hardware initiatives and high-level Hardware Description Languages (HCLs), the automatic generation of these micro-architecture models and, more specifically, the pipeline models are promoted. We propose a workflow that aims to automatically construct pipeline datapath models from processor designs described in HCLs. Our workflow is based on the Chisel/FIRRTL Hardware Compiler Framework. We build at the intermediate representation level the datapath pipeline models. Our work intends to prove the timing properties, such as the timing predictability-related properties. We rely on the formal verification as our method. The generated models are then translated into formal models and integrated into an existing model checking-based procedure for detecting timing anomalies. We use TLA+ modeling and verification language and experiment with our analysis with several open-source RISC-V processors. Finally, we advance the studies by evaluating the impact of automatic generation through a series of synthetic benchmarks
Slipp, Walter Whitfield 1964. "Display of arbitrary subgraphs for HPCOM-generated networks". Thesis, The University of Arizona, 1989. http://hdl.handle.net/10150/277016.
Pełny tekst źródłaNzekwa, Russel. "Construction flexible des boucles de contrôles autonomes pour les applications à large échelle". Phd thesis, Université des Sciences et Technologie de Lille - Lille I, 2013. http://tel.archives-ouvertes.fr/tel-00843874.
Pełny tekst źródłaZimmerman, Nicole P. "Time-Variant Load Models of Electric Vehicle Chargers". PDXScholar, 2015. https://pdxscholar.library.pdx.edu/open_access_etds/2297.
Pełny tekst źródłaKsiążki na temat "Hardware Construction Languages (HCLs)"
Alain, Vachoux, red. Analog and mixed-signal hardware description languages. Boston: Kluwer Academic Publishers, 1997.
Znajdź pełny tekst źródłaIFIP WG10.2 International Symposium on Computer Hardware Description Languages and their Applications (9th 1989 Washington, D. C.). Computer hardware description languages and their applications: Proceedings of theIFIP WG 10.2 Ninth International Symposium on Computer Hardware Description Languages and their Applications : Washington, D. C., U.S.A., 19-21 June, 1989. Amsterdam: North-Holland, 1990.
Znajdź pełny tekst źródłaCarlos, Delgado Kloos, i Damm Werner, red. Practical formal methods for hardware design. Berlin: Springer, 1997.
Znajdź pełny tekst źródłaJean-Michel, Mermet, red. Electronic chips & systems design languages. Boston: Kluwer Academic Publishers, 2001.
Znajdź pełny tekst źródła1950-, Smailagic Asim, red. Digital systems design and prototyping: Using field programmable logic and hardware description languages. Wyd. 2. Boston: Kluwer Academic, 2000.
Znajdź pełny tekst źródłaIFIP WG 10.2 International Conference on Computer Hardware Description Languages and their Applications (7th 1985 Tokyo). Computer hardware description languages and their applications: Proceedings of the IFIP WG 10.2 Seventh International Conference on Computer Hardware Description Languages and their Applications : Tokyo, Japan, 29-31 August, 1985. Amsterdam: North-Holland, 1985.
Znajdź pełny tekst źródłaFormal specification and verification of digital systems. London: McGraw-Hill, 1994.
Znajdź pełny tekst źródła(2003), FDL'03. Languages for system specification: Selected contributions on UML, SystemC, System Verilig, mixed-signal systems, and property specification from FDL'03. Boston: Kluwer Academic Publishers, 2004.
Znajdź pełny tekst źródłaSimon, Davidmann, i Flake Peter, red. SystemVerilog for design: A guide to using SystemVerilog for hardware design and modeling. Norwell, Mass: Kluwer, 2004.
Znajdź pełny tekst źródłaAnne, Mignotte, Villar Eugenio i Horobin Lynn, red. System on chip design languages: Extended papers : best of FDL'01 and HDLCon'01. Boston: Kluwer Academic Publishers, 2002.
Znajdź pełny tekst źródłaCzęści książek na temat "Hardware Construction Languages (HCLs)"
Mycroft, Alan, i Richard Sharp. "Hardware/Software Co-design Using Functional Languages". W Tools and Algorithms for the Construction and Analysis of Systems, 236–51. Berlin, Heidelberg: Springer Berlin Heidelberg, 2001. http://dx.doi.org/10.1007/3-540-45319-9_17.
Pełny tekst źródłaHartmanns, Arnd. "Correct Probabilistic Model Checking with Floating-Point Arithmetic". W Tools and Algorithms for the Construction and Analysis of Systems, 41–59. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-030-99527-0_3.
Pełny tekst źródłade Niz, Dionisio, Gaurav Bhatia i Raj Rajkumar. "Separation of Concerns in Model-Based Development of Distributed Real-Time Systems". W Behavioral Modeling for Embedded Systems and Technologies, 147–70. IGI Global, 2010. http://dx.doi.org/10.4018/978-1-60566-750-8.ch006.
Pełny tekst źródłaStreszczenia konferencji na temat "Hardware Construction Languages (HCLs)"
Izraelevitz, Adam, Jack Koenig, Patrick Li, Richard Lin, Angie Wang, Albert Magyar, Donggyu Kim i in. "Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations". W 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD). IEEE, 2017. http://dx.doi.org/10.1109/iccad.2017.8203780.
Pełny tekst źródłaRebello Januário, Leonardo, Gustavo Henrique Müller, Alex Luciano Roesler Rese, Rudimar Luís Scaranto Dazzi i Thiago Felski Pereira. "Máquina de Turing Analógica para Ensino de Linguagens Formais e Autômatos". W Computer on the Beach. São José: Universidade do Vale do Itajaí, 2021. http://dx.doi.org/10.14210/cotb.v12.p531-533.
Pełny tekst źródłaGuida, Francesco Ermanno, i Ernesto Voltaggio. "Programming Visual Representations. Evolutions of Visual Identities between Tangible and Intangible". W Systems & Design: Beyond Processes and Thinking. Valencia: Universitat Politècnica València, 2016. http://dx.doi.org/10.4995/ifdp.2016.3334.
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