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Artykuły w czasopismach na temat "Embedded Processors"
Pflanz, M., i H. T. Vierhaus. "Generating reliable embedded processors". IEEE Micro 18, nr 5 (1998): 33–41. http://dx.doi.org/10.1109/40.735942.
Pełny tekst źródłaWei, Xiaotong, Ying Yang i Jie Chen. "A Low-Latency Divider Design for Embedded Processors". Sensors 22, nr 7 (23.03.2022): 2471. http://dx.doi.org/10.3390/s22072471.
Pełny tekst źródłaKWON, YOUNG-SU, i NAK-WOONG EUM. "APPLICATION-ADAPTIVE RECONFIGURATION OF MEMORY ADDRESS SHUFFLER FOR FPGA-EMBEDDED INSTRUCTION-SET PROCESSOR". Journal of Circuits, Systems and Computers 19, nr 07 (listopad 2010): 1435–47. http://dx.doi.org/10.1142/s0218126610006748.
Pełny tekst źródłaDoraipandian, Manivannan, i Periasamy Neelamegam. "Wireless Sensor Network Using ARM Processors". International Journal of Embedded and Real-Time Communication Systems 4, nr 4 (październik 2013): 48–59. http://dx.doi.org/10.4018/ijertcs.2013100103.
Pełny tekst źródłaNúñez-Prieto, Ricardo, David Castells-Rufas i Lluís Terés-Terés. "RisCO2: Implementation and Performance Evaluation of RISC-V Processors for Low-Power CO2 Concentration Sensing". Micromachines 14, nr 7 (4.07.2023): 1371. http://dx.doi.org/10.3390/mi14071371.
Pełny tekst źródłaMuralidharan, K., i S. Uma Maheswari. "Design of Low Power Cam Memory Cell for the Next Generation Network Processors". IRO Journal on Sustainable Wireless Systems 3, nr 4 (3.12.2021): 208–18. http://dx.doi.org/10.36548/jsws.2021.4.001.
Pełny tekst źródłaLevy, Markus, i Thomas M. Conte. "Embedded Multicore Processors and Systems". IEEE Micro 29, nr 3 (maj 2009): 7–9. http://dx.doi.org/10.1109/mm.2009.41.
Pełny tekst źródłaDutt, N., i Kiyoung Choi. "Configurable processors for embedded computing". Computer 36, nr 1 (styczeń 2003): 120–23. http://dx.doi.org/10.1109/mc.2003.1160063.
Pełny tekst źródłaShin, Youngsoo, Kiyoung Choi i Takayasu Sakurai. "Power-conscious Scheduling for Real-time Embedded Systems Design". VLSI Design 12, nr 2 (1.01.2001): 139–50. http://dx.doi.org/10.1155/2001/23925.
Pełny tekst źródłaWang, Tun, i Yu Tian. "Design of Embedded Ai Engine Based on the Microkernel Operating System". Wireless Communications and Mobile Computing 2022 (21.04.2022): 1–9. http://dx.doi.org/10.1155/2022/9304019.
Pełny tekst źródłaRozprawy doktorskie na temat "Embedded Processors"
Gong, Shaojie, i Zhongping Deng. "Benchmarks for Embedded Multi-processors". Thesis, Halmstad University, School of Information Science, Computer and Electrical Engineering (IDE), 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-660.
Pełny tekst źródłaDuring the recent years, computer performance has increased dramatically. To measure
the performance of computers, benchmarks are ideal tools. Benchmarks exist in many
areas and point to different applications. For instance, in a normal PC, benchmarks can be
used to test the performance of the whole system which includes the CPU, graphic card,
memory system, etc. For multiprocessor systems, there also exist open source benchmark
programs. In our project, we gathered information about some open benchmark programs
and investigated their applicability for evaluating embedded multiprocessor systems
intended for radar signal processing. During our investigation, parallel cluster systems
and embedded multiprocessor systems were studied. Two benchmark programs, HPL and
NAS Parallel Benchmark were identified as particularly relevant for the application field.
The benchmark testing was done on a parallel cluster system which has an architecture
that is similar to the architecture of embedded multiprocessor systems, used for radar
signal processing.
Dasarathan, Dinesh. "Benchmark Characterization of Embedded Processors". NCSU, 2005. http://www.lib.ncsu.edu/theses/available/etd-05152005-170108/.
Pełny tekst źródłaRyu, Soojung. "Storage Management for Embedded SIMD Processors". Diss., Georgia Institute of Technology, 2003. http://hdl.handle.net/1853/5122.
Pełny tekst źródłaJohnson, N. E. "Code size optimization for embedded processors". Thesis, University of Cambridge, 2004. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.605626.
Pełny tekst źródłaMucci, Claudio <1977>. "Software tools or embedded reconfigurable processors". Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2007. http://amsdottorato.unibo.it/402/1/claudiomucci_phdthesis.pdf.
Pełny tekst źródłaMucci, Claudio <1977>. "Software tools or embedded reconfigurable processors". Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2007. http://amsdottorato.unibo.it/402/.
Pełny tekst źródłaHoffmann, Andreas Leupers Rainer Meyr Heinrich. "Architecture exploration for embedded processors with LISA /". Boston [u.a.] : Kluwer Acad. Publ, 2002. http://www.loc.gov/catdir/toc/fy037/2002043258.html.
Pełny tekst źródłaHadjiyiannis, George Ioannou. "An architecture synthesis system for embedded processors". Thesis, Massachusetts Institute of Technology, 2000. http://hdl.handle.net/1721.1/86440.
Pełny tekst źródłaIncludes bibliographical references (leaves 261-264).
by George Ioannou Hadjiyiannis.
Ph.D.
Mistry, Jatin N. "Leakage power minimisation techniques for embedded processors". Thesis, University of Southampton, 2013. https://eprints.soton.ac.uk/348805/.
Pełny tekst źródłaZushi, Junpei, Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada i Koji Inoue. "Improved Policies for Drowsy Caches in Embedded Processors". IEEE, 2008. http://hdl.handle.net/2237/12081.
Pełny tekst źródłaKsiążki na temat "Embedded Processors"
Henkel, Jörg, i Sri Parameswaran, red. Designing Embedded Processors. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-5869-1.
Pełny tekst źródłaCorporation, Intel, red. Embedded microcontrollers & processors. Mt. Prospect, Ill: Intel Corporation, 1992.
Znajdź pełny tekst źródłaCorporation, Intel. Embedded microcontrollers and processors. Santa Clara: Intel Corporation, 1993.
Znajdź pełny tekst źródłaCorporation, Intel. Embedded microcontrollers and processors. Santa Clara: Intel Corporation, 1993.
Znajdź pełny tekst źródłaMarwedel, Peter, i Gert Goossens, red. Code Generation for Embedded Processors. Boston, MA: Springer US, 2002. http://dx.doi.org/10.1007/978-1-4615-2323-9.
Pełny tekst źródłaPeter, Marwedel, i Goossens Gert, red. Code generation for embedded processors. Boston: Kluwer Academic Publishers, 1995.
Znajdź pełny tekst źródłaMarwedel, Peter. Code Generation for Embedded Processors. Boston, MA: Springer US, 2002.
Znajdź pełny tekst źródłaEmbedded DSP processor design: Application specific instruction set processors. Amsterdam: Morgan Kaufmann, 2008.
Znajdź pełny tekst źródłaLiem, Clifford. Retargetable Compilers for Embedded Core Processors. Boston, MA: Springer US, 1997. http://dx.doi.org/10.1007/978-1-4757-6422-2.
Pełny tekst źródłaLeupers, Rainer. Code Optimization Techniques for Embedded Processors. Boston, MA: Springer US, 2000. http://dx.doi.org/10.1007/978-1-4757-3169-9.
Pełny tekst źródłaCzęści książek na temat "Embedded Processors"
Henkel, Jörg, Sri Parameswaran i Newton Cheung. "Application-Specific Embedded Processors". W Designing Embedded Processors, 3–23. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-5869-1_1.
Pełny tekst źródłaQuan, Gang, i Xiaobo Sharon Hu. "Static DVFS Scheduling". W Designing Embedded Processors, 231–42. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-5869-1_10.
Pełny tekst źródłaPillai, Padmanabhan S., i Kang G. Shin. "Dynamic DVFS Scheduling". W Designing Embedded Processors, 243–58. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-5869-1_11.
Pełny tekst źródłaAndrei, Alexandru, Petru Eles, Zebo Peng, Marcus Schmitz i Bashir M. Al-Hashimi. "Voltage Selection for Time-Constrained Multiprocessor Systems". W Designing Embedded Processors, 259–84. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-5869-1_12.
Pełny tekst źródłaKremer, Ulrich. "Compilation Techniques for Power, Energy, and Thermal Management". W Designing Embedded Processors, 287–303. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-5869-1_13.
Pełny tekst źródłaHsu, Chung-Hsing, i Ulrich Kremer. "Compiler-Directed Dynamic CPU Frequency and Voltage Scaling". W Designing Embedded Processors, 305–23. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-5869-1_14.
Pełny tekst źródłaLi, Feihui, Guangyu Chen, Mahmut Kandemir i Mustafa Karakoy. "Link Idle Period Exploitation for Network Power Management". W Designing Embedded Processors, 325–45. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-5869-1_15.
Pełny tekst źródłaLi, Zhiyuan, i Cheng Wang. "Remote Task Mapping". W Designing Embedded Processors, 347–70. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-5869-1_16.
Pełny tekst źródłaMartin, Grant. "A Power and Energy Perspective on MultiProcessors". W Designing Embedded Processors, 373–89. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-5869-1_17.
Pełny tekst źródłaChatha, Karam S., i Krishnan Srinivasan. "System-Level Design of Network-on-Chip Architectures". W Designing Embedded Processors, 391–422. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-5869-1_18.
Pełny tekst źródłaStreszczenia konferencji na temat "Embedded Processors"
Butera, William, i V. Michael Bove, Jr. "Literally embedded processors". W Photonics West 2001 - Electronic Imaging, redaktorzy Sethuraman Panchanathan, V. Michael Bove, Jr. i Subramania I. Sudharsanan. SPIE, 2001. http://dx.doi.org/10.1117/12.420800.
Pełny tekst źródłaTillich, Stefan, Mario Kirschbaum i Alexander Szekely. "SCA-resistant embedded processors". W the 26th Annual Computer Security Applications Conference. New York, New York, USA: ACM Press, 2010. http://dx.doi.org/10.1145/1920261.1920293.
Pełny tekst źródłaLakshmi, Vinay Vijendra Kumar, Arindam Mukherjee i Bharat Joshi. "Architecture exploration for embedded processors: Design framework for embedded bio-medical processors". W IEEE SOUTHEASTCON 2013. IEEE, 2013. http://dx.doi.org/10.1109/secon.2013.6567394.
Pełny tekst źródłaSjödin, Jan, i Carl von Platen. "Storage allocation for embedded processors". W the international conference. New York, New York, USA: ACM Press, 2001. http://dx.doi.org/10.1145/502217.502221.
Pełny tekst źródłaVinay Vijendra Kumar Lakshmi, Arindam Mukherjee i Bharat Joshi. "Architecture exploration for embedded processors". W SOUTHEASTCON 2012. IEEE, 2012. http://dx.doi.org/10.1109/secon.2012.6196917.
Pełny tekst źródłaGholamipour, Amir Hossein, Elaheh Bozorgzadeh i Sudarshan Banerjee. "Energy-aware co-processor selection for embedded processors on FPGAs". W 2007 25th International Conference on Computer Design ICCD 2007. IEEE, 2007. http://dx.doi.org/10.1109/iccd.2007.4601895.
Pełny tekst źródła"Session TA1: Embedded Processors for SOC". W IEEE International SOC Conference, 2004. Proceedings. IEEE, 2004. http://dx.doi.org/10.1109/socc.2004.1362400.
Pełny tekst źródłaFisher, Joseph A. "Customized instruction-sets for embedded processors". W the 36th ACM/IEEE conference. New York, New York, USA: ACM Press, 1999. http://dx.doi.org/10.1145/309847.309923.
Pełny tekst źródłaAzarpeyvand, Ali, Mostafa E. Salehi, Farshad Firouzi, Amir Yazdanbakhsh i Sied Mehdi Fakhraie. "Instruction reliability analysis for embedded processors". W 2010 IEEE 13th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). IEEE, 2010. http://dx.doi.org/10.1109/ddecs.2010.5491824.
Pełny tekst źródłaDeris, Kaveh Jokar, i Amirali Baniasadi. "Branchless cycle prediction for embedded processors". W the 2006 ACM symposium. New York, New York, USA: ACM Press, 2006. http://dx.doi.org/10.1145/1141277.1141492.
Pełny tekst źródłaRaporty organizacyjne na temat "Embedded Processors"
Lee, Edward A. System-Level Design Methodology for Embedded Signal Processors. Fort Belvoir, VA: Defense Technical Information Center, sierpień 1997. http://dx.doi.org/10.21236/ada342899.
Pełny tekst źródłaGraham, Paul, i Brent Nelson. Reconfigurable Processors for High-Performance, Embedded Digital Signal Processing. Fort Belvoir, VA: Defense Technical Information Center, styczeń 1999. http://dx.doi.org/10.21236/ada451425.
Pełny tekst źródłaWheat, Jr., Robert Mitchell, Dale A. Dalmas i Gregory E. Dale. A Four Channel Beam Current Monitor Data Acquisition System Using Embedded Processors. Office of Scientific and Technical Information (OSTI), sierpień 2015. http://dx.doi.org/10.2172/1209457.
Pełny tekst źródłaShen, Chung-Ching, Shenpei Wu, Lai-Huei Wang, Stephen Won, Kishan Sudusinghe i Shuvra Bhattacharyya. Dataflow-Based Implementation of Layered Sensing Applications on High-Performance Embedded Processors. Fort Belvoir, VA: Defense Technical Information Center, marzec 2013. http://dx.doi.org/10.21236/ada582499.
Pełny tekst źródłaChou, Pai, Ken Hines, Kurt Partridge i Gaetano Borriello. Control Generation for Embedded Systems Based on Composition of Modal Processes. Fort Belvoir, VA: Defense Technical Information Center, styczeń 1998. http://dx.doi.org/10.21236/ada416531.
Pełny tekst źródłaWilcox, D. R., i P. N. Pham. Unix STREAMS Emulation of an Input/Output Controller (IOC) for an Embedded AN/UYK-44(V) Processor. Fort Belvoir, VA: Defense Technical Information Center, maj 1993. http://dx.doi.org/10.21236/ada270867.
Pełny tekst źródłaLearn, Mark Walter. Mitigation of cache memory using an embedded hard-core PPC440 processor in a Virtex-5 Field Programmable Gate Array. Office of Scientific and Technical Information (OSTI), luty 2010. http://dx.doi.org/10.2172/984165.
Pełny tekst źródłaHigdon, Grace Lyn. Nested Theories of Change for Adaptive Rigour. Institute of Development Studies (IDS), grudzień 2020. http://dx.doi.org/10.19088/creid.2020.010.
Pełny tekst źródłaJha, Deepika, Sudeshna Mitra, Amlanjyoti Goswami, Sahil Sasidharan i Kaye Lushington. Land Records Modernisation in India: Bihar. Indian Institute for Human Settlements, 2021. http://dx.doi.org/10.24943/9788195648535.
Pełny tekst źródłaClark, Louise. The Diamond of Influence: A Model For Exploring Behaviour in Research to Policy Linkages. Institute of Development Studies (IDS), listopad 2020. http://dx.doi.org/10.19088/apra.2020.011.
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