Gotowe bibliografie tematyczne / Data layout and Computation Reordering

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Gotowa bibliografia na temat „Data layout and Computation Reordering”

Autor: Grafiati

Data publikacji: 6 września 2023

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Artykuły w czasopismach na temat "Data layout and Computation Reordering"

Masselos, K., P. Merakos, T. Stouraitis i C. E. Goutis. "Computation Reordering: A Novel Transformation for Low Power DSP Synthesis". VLSI Design 10, nr 2 (1.01.1999): 177–202. http://dx.doi.org/10.1155/1999/16415.

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A novel architectural transformation for low power synthesis of inner product computational structures is presented. The proposed transformation reorders the sequence of evaluation of the multiply-accumulate operations that form the inner products. Information related to both coefficients, which are statically determined, and data, which are dynamic, is used to drive the reordering of computation. The reordering of computation reduces the switching activity at the inputs of the computational units but inside them as well leading to power consumption reduction. Different classes of algorithms requiring inner product computation are identified and the problem of computation reordering is formulated for each of them. The target architecture to which the proposed transformation applies is based on a power optimal memory organization and is described in detail. Experimental results for several DSP algorithms show that the proposed transformation leads to significant savings in net switching activity and thus in power consumption.

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Shen, Zhao-Li, Yu-Tong Liu, Bruno Carpentieri, Chun Wen i Jian-Jun Wang. "Recursive reordering and elimination method for efficient computation of PageRank problems". AIMS Mathematics 8, nr 10 (2023): 25104–30. http://dx.doi.org/10.3934/math.20231282.

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<abstract><p>The PageRank model is widely utilized for analyzing a variety of scientific issues beyond its original application in modeling web search engines. In recent years, considerable research effort has focused on developing high-performance iterative methods to solve this model, particularly when the dimension is exceedingly large. However, due to the ever-increasing extent and size of data networks in various applications, the computational requirements of the PageRank model continue to grow. This has led to the development of new techniques that aim to reduce the computational complexity required for the solution. In this paper, we present a recursive 5-type lumping algorithm combined with a two-stage elimination strategy that leverage characteristics about the nonzero structure of the underlying network and the nonzero values of the PageRank coefficient matrix. This method reduces the initial PageRank problem to the solution of a remarkably smaller and sparser linear system. As a result, it leads to significant cost reductions for computing PageRank solutions, particularly in scenarios involving large and/or multiple damping factors. Numerical experiments conducted on over 50 real-world networks demonstrate that the proposed methods can effectively exploit characteristics of PageRank problems for efficient computations.</p></abstract>

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Rodrigues, Thiago Nascimento, Maria Claudia Silva Boeres i Lucia Catabriga. "Parallel Implementations of RCM Algorithm for Bandwidth Reduction of Sparse Matrices". TEMA (São Carlos) 18, nr 3 (10.01.2018): 449. http://dx.doi.org/10.5540/tema.2017.018.03.449.

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The Reverse Cuthill-McKee (RCM) algorithm is a well-known heuristicfor reordering sparse matrices. It is typically used to speed up the computation ofsparse linear systems of equations. This paper describes two parallel approachesfor the RCM algorithm as well as an optimized version of each one based on someproposed enhancements. The first one exploits a strategy for reducing lazy threads,while the second one makes use of a static bucket array as the main data structureand suppress some steps performed by the original algorithm. These related changesled to outstanding reordering time results and significant bandwidth reductions.The performance of two algorithms is compared with the respective implementationmade available by Boost library. The OpenMP framework is used for supportingthe parallelism and both versions of the algorithm are tested with large sparse andstructural symmetric matrices.

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LIU, YING, i WENYUAN LI. "VISUALIZING MICROARRAY DATA FOR BIOMARKER DISCOVERY BY MATRIX REORDERING AND REPLICATOR DYNAMICS". Journal of Bioinformatics and Computational Biology 06, nr 06 (grudzień 2008): 1089–113. http://dx.doi.org/10.1142/s0219720008003862.

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In most microarray data sets, there are often multiple sample classes, which are categorized into the normal or diseased type. Traditional feature selection methods consider multiple classes equally without paying attention to the upregulation/downregulation across the normal and diseased classes; while the specific gene selection methods for biomarker discovery particularly consider differential gene expressions across the normal and diseased classes, but ignore the existence of multiple classes. More importantly, there are few visualization algorithms to assist biomarker discovery from microarray data. In this paper, to help users visually analyze microarray data and improve biomarker discovery, we propose to employ matrix reordering techniques that have been developed and used in matrix computation. In particular, we generalized a well-known population genetic algorithm, namely, replicator dynamics, to reorder a microarray data matrix with multiple classes. The new algorithm simultaneously takes into account the global between-class data pattern and local within-class data pattern. Our results showed that our matrix reordering algorithm not only provides a visualization method to effectively analyze microarray data on both genes and samples, but also improves the accuracy of classifying the samples.

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DE STEFANO, CLAUDIO, i ANGELO MARCELLI. "AN EFFICIENT METHOD FOR ONLINE CURSIVE HANDWRITING STROKES REORDERING". International Journal of Pattern Recognition and Artificial Intelligence 18, nr 07 (listopad 2004): 1157–71. http://dx.doi.org/10.1142/s0218001404003691.

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In the framework of online cursive handwriting recognition, we present an efficient method for reordering the sequence of strokes composing handwriting in two special cases of interest: the horizontal bar of the character "" and the dot of the character "". The proposed method exploits shape information for selecting the strokes that most likely correspond to the features of interest, and layout and topological information for locating the strokes representing the body of the characters to which the features belong to. The method does not depend on the specific algorithm used for detecting the elementary strokes in which the electronic ink may be decomposed into. The performance of our method, evaluated on a data set of cursive words produced by 50 different writers, has shown a correct reordering of the sequence in more than 85% of the cases. Thus, the proposed method allows obtaining a more stable and invariant description of the electronic ink in terms of elementary stroke sequences, and therefore can be helpfully used as a preprocessing step for both segmentation-based and word-based handwriting recognition systems.

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Mehta, Dinesh P. "CLOTH MEASURE: A Software Tool for Estimating the Memory Requirements of Corner Stitching Data Structures". VLSI Design 7, nr 4 (1.01.1998): 425–36. http://dx.doi.org/10.1155/1998/64716.

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In a previous paper [1], we derived formulae for estimating the storage requirements of the Rectangular and L-shaped Corner Stitching data structures [2, 3] for a given layout. These formulae require the computation of quantities called violations, which are geometric properties of the layout. In this paper, we present optimal Θ(n log n) algorithms for computing violations, where n is the number of rectangles in the layout. These algorithms are incorporated into a software tool called CLOTH MEASURE. Experiments conducted with CLOTH MEASURE show that it is a viable tool for estimating the memory requirements of a layout without having to implement the corner stitching data structures, which is a tedious and time-consuming task.

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Hoang, Vinh Quoc, i Yuhua Chen. "Cost-Effective Network Reordering Using FPGA". Sensors 23, nr 2 (10.01.2023): 819. http://dx.doi.org/10.3390/s23020819.

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The advancement of complex Internet of Things (IoT) devices in recent years has deepened their dependency on network connectivity, demanding low latency and high throughput. At the same time, expanding operating conditions for these devices have brought challenges that limit the design constraints and accessibility for future hardware or software upgrades. These limitations can result in data loss because of out-of-order packets if the design specification cannot keep up with network demands. In addition, existing network reordering solutions become less applicable due to the drastic changes in the type of network endpoints, as IoT devices typically have less memory and are likely to be power-constrained. One approach to address this problem is reordering packets using reconfigurable hardware to ease computation in other functions. Field Programmable Gate Array (FPGA) devices are ideal candidates for hardware implementations at the network endpoints due to their high performance and flexibility. Moreover, previous research on packet reordering using FPGAs has serious design flaws that can lead to unnecessary packet dropping due to blocking in memory. This research proposes a scalable hardware-focused method for packet reordering that can overcome the flaws from previous work while maintaining minimal resource usage and low time complexity. The design utilizes a pipelined approach to perform sorting in parallel and completes the operation within two clock cycles. FPGA resources are optimized using a two-layer memory management system that consumes minimal on-chip memory and registers. Furthermore, the design is scalable to support multi-flow applications with shared memories in a single FPGA chip.

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Meng, Xiankai, Zhuo Zhang, Jianxin Xue, Fangshu Chen i Jiahui Wang. "Reliability Analysis for Programs with Redundancy Computation for Soft Errors". Journal of Physics: Conference Series 2522, nr 1 (1.06.2023): 012022. http://dx.doi.org/10.1088/1742-6596/2522/1/012022.

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Abstract Soft error is one of the factors which may affect the reliability of computer programs. A common method to alleviate the impact of soft errors is redundancy computation, a classical data flow error detection mechanism. However, a program with redundancy computation may still have some vulnerable spots, which might be caused by the flaw during implementation or the instruction reordering given by compiler optimization. Finding the vulnerable spots of a program with redundancy computation is of great significance to evaluate the capability of the error detection mechanism. There are some conventional methods to analyze the reliability of a program under soft errors, such as the irradiation experiment, fault injection, and modeling analysis. However, the irradiation experiment is expensive, fault injection is very time-consuming, and the existing modeling analysis methods have not considered the error detection mechanism. This paper proposes a novel method of reliability analysis for programs with redundancy computation by analyzing the dynamic instruction sequence. Experimental results show that our approach has fairly high accuracy and a false negative rate of about 0.0545.

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MISHRA, SK. "On accelerating the FFT of Cooley and Tukey". MAUSAM 36, nr 2 (5.04.2022): 167–72. http://dx.doi.org/10.54302/mausam.v36i2.1833.

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The efficient Fourier transform (EFT) and FFT algorithms are described and their computational efficiencies with respect to the direct method are discussed. An efficient procedure is proposed for the reordering of data set; the use of EFT algorithm for the initial Fourier transforms and restricting the size of final subsets to not less than 4 is also suggested for saving computation time in the FFT. It is found that on average the FFT with the proposed modifications is more than twice as fast as the original FFT. The amount of overhead operations involved in computer routine, based on the modified FFT is estimated.

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Phetkaew, Thimaporn, Wanchai Rivepiboon i Boonserm Kijsirikul. "Reordering Adaptive Directed Acyclic Graphs for Multiclass Support Vector Machines". Journal of Advanced Computational Intelligence and Intelligent Informatics 7, nr 3 (20.10.2003): 315–21. http://dx.doi.org/10.20965/jaciii.2003.p0315.

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The problem of extending binary support vector machines (SVMs) for multiclass classification is still an ongoing research issue. Ussivakul and Kijsirikul proposed the Adaptive Directed Acyclic Graph (ADAG) approach that provides accuracy comparable to that of the standard algorithm-Max Wins and requires low computation. However, different sequences of nodes in the ADAG may provide different accuracy. In this paper we present a new method for multiclass classification, Reordering ADAG, which is the modification of the original ADAG method. We show examples to exemplify that the margin (or 2/|w| value) between two classes of each binary SVM classifier affects the accuracy of classification, and this margin indicates the magnitude of confusion between the two classes. In this paper, we propose an algorithm to choose an optimal sequence of nodes in the ADAG by considering the |w| values of all classifiers to be used in data classification. We then compare our performance with previous methods including the ADAG and the Max Wins algorithm. Experimental results demonstrate that our method gives higher accuracy. Moreover it runs faster than Max Wins, especially when the number of classes and/or the number of dimensions are relatively large.

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Rozprawy doktorskie na temat "Data layout and Computation Reordering"

Kumar, Harsh. "Performance Characterization and Optimizations of Traditional ML Applications". Thesis, 2022. https://etd.iisc.ac.in/handle/2005/5804.

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Even in the era of Deep Learning based methods, traditional machine learning methods with large data sets continue to attract significant attention. However, we find an apparent lack of a detailed performance characterization of these methods in the context of large training datasets. In this thesis, we study the systems behaviour of a number of traditional ML methods as implemented in popular free software libraries/modules to identify critical performance bottlenecks experienced by these applications. The performance characterization study reveals several interesting insights into the performance of these applications. We observe that the processor backend is the major bottleneck for our workloads, especially poor cache performance, coupled with a high fraction of CPU stall cycles due to memory latency. We also observed a very poor utilization of execution ports with only a single micro-op or no micro-op being executed for around 45% of the execution time. For the tree-based workloads, the CPU stalls due to badspeculation are also significant with values as high as 25% of CPU cycles. Then we evaluate the performance benefits of applying some well-known optimizations at the levels of caches and the main memory. More specifically, we test the usefulness of optimizations such as (i) software prefetching to improve cache performance and (ii) data layout and computation reordering optimizations to improve locality in DRAM accesses. These optimizations are implemented as modifications to the well-known scikit-learn library, which can be easily leveraged by application programmers. We evaluate the impact of the proposed optimizations using a combination of simulation and execution on a real system. The software prefetching optimization was implemented over ten workloads and it resulted in performance benefits varying from 5.2%- 27% on seven out of the ten ML applications while the data layout and computation reordering methods yielded around 8%- 23% performance improvement on seven out of eight neighbour and tree-based ML applications.

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Książki na temat "Data layout and Computation Reordering"

Young, Liam. Machine Landscapes: Architectures of the Post Anthropocene. Wiley & Sons, Incorporated, John, 2019.

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Streszczenia konferencji na temat "Data layout and Computation Reordering"

Thanh Binh, Huynh Thi, Tran Van Long, Nguyen Xuan Hoai, Nguyen Duc Anh i Pham Manh Truong. "Reordering dimensions for Radial Visualization of multidimensional data — A Genetic Algorithms approach". W 2014 IEEE Congress on Evolutionary Computation (CEC). IEEE, 2014. http://dx.doi.org/10.1109/cec.2014.6900619.

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Kandemir, Mahmut, Xulong Tang, Jagadish Kotra i Mustafa Karakoy. "Fine-Granular Computation and Data Layout Reorganization for Improving Locality". W ICCAD '22: IEEE/ACM International Conference on Computer-Aided Design. New York, NY, USA: ACM, 2022. http://dx.doi.org/10.1145/3508352.3549386.

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Chen, Chun-Ming, Boonthanome Nouanesengsy, Teng-Yok Lee i Han-Wei Shen. "Flow-guided file layout for out-of-core pathline computation". W 2012 IEEE Symposium on Large Data Analysis and Visualization (LDAV). IEEE, 2012. http://dx.doi.org/10.1109/ldav.2012.6378984.

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Huang, Xin, Yizhi Huang, Yan Liu, Renfa Li i Xin Peng. "A strip level data layout strategy for heterogeneous parallel storage systems". W The 2015 11th International Conference on Natural Computation. IEEE, 2015. http://dx.doi.org/10.1109/icnc.2015.7378143.

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Chen, Chun-Ming, Lijie Xu, Teng-Yok Lee i Han-Wei Shen. "A flow-guided file layout for out-of-core streamline computation". W 2011 IEEE Symposium on Large Data Analysis and Visualization (LDAV). IEEE, 2011. http://dx.doi.org/10.1109/ldav.2011.6092326.

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Giallorenzo, Vito, i Pat Banerjee. "A Virtual Reality Enabling Parameterization of CFD Simulations for Non-Empty Room Layout Design". W ASME 1999 International Mechanical Engineering Congress and Exposition. American Society of Mechanical Engineers, 1999. http://dx.doi.org/10.1115/imece1999-0176.

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Abstract In this paper, a new approach of establishing the Computational Fluid Dynamics (CFD) - Virtual Reality (VR) design interface is described. Near optimal configuration of all the parameters affecting the contaminant removal is the most important factor that determines the effectiveness of the cleanliness of the indoor air. The main limitation encountered in applying VR to CFD aided design is due to complex and time consuming setup and computation steps of a CFD analysis. Consequently a CFD computation of the airflow pattern is done separately with a traditional CFD solver and then the data is imported in VR. This makes it infeasible to use CFD/VR to analyze a large number of layout design alternatives. A novel method for overcoming this problem has been conceptualized by using a VR preprocessing step. A mathematical expression of the dependence of the contaminant removal effectiveness on room parameters has been developed based on the experimental result. In this way, the selected set of preferred solutions is selected among the enormous number of possible alternatives. The restricted set of room layouts is further investigated by VR analysis of the CFD simulation. This provides insight for an effective positioning of all parameters for room air cleanliness. This two step CFD/VR aided design technique allows overcoming the problems that affect the integration of CFD and VR technique in design of contaminant-free environments. The methodology is well suited for the design of special indoor environments such as tuberculosis hospital facilities, clean rooms and certain electronic, pharmaceutical and chemical manufacturing facility rooms with special contamination control requirements.

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Eschenauer, Hans A., i Christof M. Weber. "Stiffened CFRP-Panels Under Buckling Loads: Modeling, Analysis, Optimization". W ASME 1995 Design Engineering Technical Conferences collocated with the ASME 1995 15th International Computers in Engineering Conference and the ASME 1995 9th Annual Engineering Database Symposium. American Society of Mechanical Engineers, 1995. http://dx.doi.org/10.1115/detc1995-0031.

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Abstract The present paper addresses the optimal layout of stiffened fiber composite plates (Fig. 1) considering buckling constraints; these plates are increasingly applied in many fields of engineering (air- and spacecraft technology, automotive industries, boatbuilding etc.). This particular area of structural optimization still requires substantial investigations into its fundamentals. The structural analysis alone for the treatment of this type of problems may increase to such a degree that the complete optimization process requires extremely long computation times due to the processing of a high amount of data, a fact that calls for the development of “intelligent” procedures in order to reduce the computation effort to a tolerable measure and to maintain reduplicability of the whole process. For this purpose, a so-called “constructive design model” is introduced.

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Bu, Hongyan, Yufeng Yang, Liming Song i Jun Li. "Improving the Film Cooling Performance of a Turbine Endwall With Multi-Fidelity Modeling Considering Conjugate Heat Transfer". W ASME Turbo Expo 2021: Turbomachinery Technical Conference and Exposition. American Society of Mechanical Engineers, 2021. http://dx.doi.org/10.1115/gt2021-59015.

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Abstract The gas turbine endwall is bearing extreme thermal loads with the rapid increase of turbine inlet temperature. Therefore, the effective cooling of turbine endwalls is of vital importance for the safe operation of turbines. In the design of endwall cooling layouts, numerical simulations based on conjugate heat transfer (CHT) are drawing more attention as the component temperature can be predicted directly. However, the computation cost of high-fidelity CHT analysis can be high and even prohibitive especially when there are many cases to evaluate such as in the design optimization of cooling layout. In this study, we established a multi-fidelity framework in which the data of low-fidelity CHT analysis was incorporated to help the building of a model that predicts the result of high-fidelity simulation. Based upon this framework, multi-fidelity design optimization of a validated numerical turbine endwall model was carried out. The high and low fidelity data were obtained from the computation of fine mesh and coarse mesh respectively. In the optimization, the positions of the film cooling holes were parameterized and controlled by a shape function. With the help of multi-fidelity modeling and sequentially evaluated designs, the cooling performance of the model endwall was improved efficiently.

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Song, Zhihang, Bruce T. Murray i Bahgat Sammakia. "Prediction of Hot Aisle Partition Airflow Boundary Conditions". W ASME 2013 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems. American Society of Mechanical Engineers, 2013. http://dx.doi.org/10.1115/ipack2013-73049.

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The integration of a simulation-based Artificial Neural Network (ANN) with a Genetic Algorithm (GA) has been explored as a real-time design tool for data center thermal management. The computation time for the ANN-GA approach is significantly smaller compared to a fully CFD-based optimization methodology for predicting data center operating conditions. However, difficulties remain when applying the ANN model for predicting operating conditions for configurations outside of the geometry used for the training set. One potential remedy is to partition the room layout into a finite number of characteristic zones, for which the ANN-GA model readily applies. Here, a multiple hot aisle/cold aisle data center configuration was analyzed using the commercial software FloTHERM. The CFD results are used to characterize the flow rates at the inter-zonal partitions. Based on specific reduced subsets of desired treatment quantities from the CFD results, such as CRAC and server rack air flow rates, the approach was applied for two different CRAC configurations and various levels of CRAC and server rack flow rates. Utilizing the compact inter-zonal boundary conditions, good agreement for the airflow and temperature distributions is achieved between predictions from the CFD computations for the entire room configuration and the reduced order zone-level model for different operating conditions and room layouts.

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