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Artykuły w czasopismach na temat "Circuit booléen"
Mokhtarnia, Hossein, Shahram Etemadi Borujeni i Mohammad Saeed Ehsani. "Automatic Test Pattern Generation Through Boolean Satisfiability for Testing Bridging Faults". Journal of Circuits, Systems and Computers 28, nr 14 (20.02.2019): 1950240. http://dx.doi.org/10.1142/s0218126619502402.
Pełny tekst źródłaMatrosova, Angela Yu, Victor A. Provkin i Valentina V. Andreeva. "Masking of Internal Nodes Faults Based on Applying of Incompletely Specified Boolean Functions". Izvestiya of Saratov University. New Series. Series: Mathematics. Mechanics. Informatics 20, nr 4 (2020): 517–26. http://dx.doi.org/10.18500/1816-9791-2020-20-4-517-526.
Pełny tekst źródłaLimaye, Nutan, Srikanth Srinivasan i Sébastien Tavenas. "Superpolynomial Lower Bounds Against Low-Depth Algebraic Circuits". Communications of the ACM 67, nr 2 (25.01.2024): 101–8. http://dx.doi.org/10.1145/3611094.
Pełny tekst źródłaBorodina, Yulia V. "Easily testable circuits in Zhegalkin basis in the case of constant faults of type “1” at gate outputs". Discrete Mathematics and Applications 30, nr 5 (27.10.2020): 303–6. http://dx.doi.org/10.1515/dma-2020-0026.
Pełny tekst źródłaAgrawal, Nishant. "Automatic Test Pattern Generation using Grover’s Algorithm". International Journal for Research in Applied Science and Engineering Technology 9, nr VI (14.06.2021): 2373–79. http://dx.doi.org/10.22214/ijraset.2021.34837.
Pełny tekst źródłaLi, Hongtao, Chunbiao Li, Zeshi Yuan, Wen Hu i Xiaochen Zhen. "A New Class of Chaotic Circuit with Logic Elements". Journal of Circuits, Systems and Computers 24, nr 09 (27.08.2015): 1550136. http://dx.doi.org/10.1142/s0218126615501364.
Pełny tekst źródłaPrihozhy, Anatoly A. "Synthesis of quantum circuits based on incompletely specified functions and if-decision diagrams". Journal of the Belarusian State University. Mathematics and Informatics, nr 3 (14.12.2021): 84–97. http://dx.doi.org/10.33581/2520-6508-2021-3-84-97.
Pełny tekst źródłaYOUNES, AHMED. "REDUCING QUANTUM COST OF REVERSIBLE CIRCUITS FOR HOMOGENEOUS BOOLEAN FUNCTIONS". Journal of Circuits, Systems and Computers 19, nr 07 (listopad 2010): 1423–34. http://dx.doi.org/10.1142/s0218126610006736.
Pełny tekst źródłaHou, Yue Wei, Xin Xu, Wei Wang, Xiao Bo Tian i Hai Jun Liu. "Titanium Oxide Memristor Based Digital Encoder Circuit". Applied Mechanics and Materials 644-650 (wrzesień 2014): 3430–33. http://dx.doi.org/10.4028/www.scientific.net/amm.644-650.3430.
Pełny tekst źródłaBardales, Andrea C., Quynh Vo i Dmitry M. Kolpashchikov. "Singleton {NOT} and Doubleton {YES; NOT} Gates Act as Functionally Complete Sets in DNA-Integrated Computational Circuits". Nanomaterials 14, nr 7 (28.03.2024): 600. http://dx.doi.org/10.3390/nano14070600.
Pełny tekst źródłaRozprawy doktorskie na temat "Circuit booléen"
Soyez-Martin, Claire. "From semigroup theory to vectorization : recognizing regular languages". Electronic Thesis or Diss., Université de Lille (2022-....), 2023. http://www.theses.fr/2023ULILB052.
Pełny tekst źródłaThe pursuit of optimizing regular expression validation has been a long-standing challenge,spanning several decades. Over time, substantial progress has been made through a vast range of approaches, spanning from ingenious new algorithms to intricate low-level optimizations.Cutting-edge tools have harnessed these optimization techniques to continually push the boundaries of efficient execution. One notable advancement is the integration of vectorization, a method that leverage low-level parallelism to process data in batches, resulting in significant performance enhancements. While there has been extensive research on designing handmade tailored algorithms for particular languages, these solutions often lack generalizability, as the underlying methodology cannot be applied indiscriminately to any regular expression, which makes it difficult to integrate to existing tools.This thesis provides a theoretical framework in which it is possible to generate vectorized programs for regular expressions corresponding to rational expressions in a given class. To do so, we rely on the algebraic theory of automata, which provides tools to process letters in parallel. These tools also allow for a deeper understanding of the underlying regular language, which gives access to some properties that are useful when producing vectorized algorithms. The contribution of this thesis is twofold. First, it provides implementations and preliminary benchmarks to study the potential efficiency of algorithms using algebra and vectorization. Second, it gives algorithms that construct vectorized programs for languages in specific classes of rational expressions, namely the first order logic and its subset restricted to two variables
Paperman, Charles. "Circuits booléens, prédicats modulaires et langages réguliers". Paris 7, 2014. http://www.theses.fr/2014PA077258.
Pełny tekst źródłaThe Straubing conjecture, stated in his book published in 1994, suggest that a regular language definable by a fragment of logic and equipped with an arbitrary numerical signature is definable using the same fragment of logic using only regular predicates. The considered fragments of logic are classed of formulas of monadic second order logic over finite words. This thesis is a contribution to the study of the Straubing conjecture. To prove such a conjecture, it seems necessary to obtain two results of two distinct types: 1. Algebraic characterizations of classes of regular languages defined by fragments of logics equipped with regular predicates, 2. Undefinability results of regular languages in fragments of logics equipped with arbitrary numerical predicates. The first part of this thesis is dedicated to the operation of adding regular predicates to a given fragment of logic, with a particular focus on modular predicates in the case where logical fragments have some algebraic structure. The second par of this thesis is dedicated to undefinability results with a particular focus on two-variable first order logic
Daitch, Samuel Isaac. "Translating alloy using Boolean circuits". Thesis, Massachusetts Institute of Technology, 2004. http://hdl.handle.net/1721.1/33129.
Pełny tekst źródłaIncludes bibliographical references (p. 71-72).
Alloy is a automatically analyzable modelling language based on first-order logic. An Alloy model can be translated into a Boolean formula whose satisfying assignments correspond to instances in the model. Currently, the translation procedure mechanically converts each piece of the Alloy model individually into its most straightforward Boolean representation. This thesis proposes a more efficient approach to translating Alloy models. The key is to take advantage of the fact that an Alloy model contains patterns that are used repeatedly. This makes it natural to give a model a more structured Boolean representation, namely a Boolean circuit. Reusable pieces in the model correspond to circuit components. By identifying the most frequently used components and optimizing their corresponding Boolean formulas, the size of the overall formula for the model would be reduced without significant additional work. A smaller formula would potentially decrease the time required to determine satisfiability, resulting in faster analysis overall.
by Samuel Isaac Daitch.
M.Eng.
Shi, Junhao. "Boolean techniques in testing of digital circuits". [S.l.] : [s.n.], 2006. http://deposit.ddb.de/cgi-bin/dokserv?idn=98361816X.
Pełny tekst źródłaChattopadhyay, Arkadev. "Circuits, communication and polynomials". Thesis, McGill University, 2008. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=115660.
Pełny tekst źródłaBoolean circuits are natural computing devices and are ubiquitous in the modern electronic age. We study the limitation of this model when the depth of circuits is fixed, independent of the length of the input. The power of such constant-depth circuits using gates computing modular counting functions remains undetermined, despite intensive efforts for nearly twenty years. We make progress on two fronts: let m be a number having r distinct prime factors none of which divides ℓ. We first show that constant depth circuits employing AND/OR/MODm gates cannot compute efficiently the MAJORITY and MODℓ function on n bits if 'few' MODm gates are allowed, i.e. they need size nW&parl0;1s&parl0;log n&parr0;1/&parl0;r-1&parr0;&parr0; if s MODm gates are allowed in the circuit. Second, we analyze circuits that comprise only MOD m gates, We show that in sub-linear size (and arbitrary depth), they cannot compute AND of n bits. Further, we establish that in that size they can only very poorly approximate MODℓ.
Our first result on circuits is derived by introducing a novel notion of computation of boolean functions by polynomials. The study of degree as a resource in polynomial representation of boolean functions is of much independent interest. Our notion, called the weak generalized representation, generalizes all previously studied notions of computation by polynomials over finite commutative rings. We prove that over the ring Zm , polynomials need Wlogn 1/r-1 degree to represent, in our sense, simple functions like MAJORITY and MODℓ. Using ideas from arguments in communication complexity, we simplify and strengthen the breakthrough work of Bourgain showing that functions computed by o(log n)-degree polynomials over Zm do not even correlate well with MODℓ.
Finally, we study the 'Number on the Forehead' model of multiparty communication that was introduced by Chandra, Furst and Lipton [CFL83]. We obtain fresh insight into this model by studying the class CCk of languages that have constant k-party deterministic communication complexity under every possible partition of input bits among parties. This study is motivated by Szegedy's [Sze93] surprising result that languages in CC2 can all be extremely efficiently recognized by very shallow boolean circuits. In contrast, we show that even CC 3 contains languages of arbitrarily large circuit complexity. On the other hand, we show that the advantage of multiple players over two players is significantly curtailed for computing two simple classes of languages: languages that have a neutral letter and those that are symmetric.
Extending the recent breakthrough works of Sherstov [She07, She08b] for two-party communication, we prove strong lower bounds on multiparty communication complexity of functions. First, we obtain a bound of n O(1) on the k-party randomized communication complexity of a function that is computable by constant-depth circuits using AND/OR gates, when k is a constant. The bound holds as long as protocols are required to have better than inverse exponential (i.e. 2-no1 ) advantage over random guessing. This is strong enough to yield lower bounds on the size of an important class of depth-three circuits: circuits having a MAJORITY gate at its output, a middle layer of gates computing arbitrary symmetric functions and a base layer of arbitrary gates of restricted fan-in.
Second, we obtain nO(1) lower bounds on the k-party randomized (bounded error) communication complexity of the Disjointness function. This resolves a major open question in multiparty communication complexity with applications to proof complexity. Our techniques in obtaining the last two bounds, exploit connections between representation by polynomials over teals of a boolean function and communication complexity of a closely related function.
Boyd, Mark J. "Complexity analysis of a massive parallel boolean satisfiability implication circuit /". Diss., Digital Dissertations Database. Restricted to UC campuses, 2005. http://uclibs.org/PID/11984.
Pełny tekst źródłaPELADEAU, PIERRE. "Classes de circuits booleens et varietes de monoides". Paris 6, 1990. http://www.theses.fr/1990PA066265.
Pełny tekst źródłaBowen, Richard Strong. "Minimal Circuits for Very Incompletely Specified Boolean Functions". Scholarship @ Claremont, 2010. https://scholarship.claremont.edu/hmc_theses/18.
Pełny tekst źródłaBarato, Matteo. "Sulla Conversione di Circuiti Booleani in Circuiti Quantistici". Bachelor's thesis, Alma Mater Studiorum - Università di Bologna, 2018.
Znajdź pełny tekst źródłaSengupta, Rimli. "Lower bounds for natural functions in restricted boolean circuits". Diss., Georgia Institute of Technology, 1995. http://hdl.handle.net/1853/8269.
Pełny tekst źródłaKsiążki na temat "Circuit booléen"
Lam, Tak-Kei, Wai-Chung Tang, Xing Wei, Yi Diao i David Yu-LiangWu. Boolean Circuit Rewiring. Singapore: John Wiley & Sons Singapore Pte. Ltd, 2016. http://dx.doi.org/10.1002/9781118750124.
Pełny tekst źródłaStanković, Radomir S., i Jaakko Astola. From Boolean Logic to Switching Circuits and Automata. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-11682-7.
Pełny tekst źródłaCommunication complexity: A new approach to circuit depth. Cambridge, Mass: MIT Press, 1989.
Znajdź pełny tekst źródłaThe complexity of Boolean functions. Stuttgart: B.G. Teubner, 1987.
Znajdź pełny tekst źródłaBoolean functions in coding theory and cryptography. Providence, R.I: American Mathematical Society, 2012.
Znajdź pełny tekst źródłaNoam, Nisan, red. Communication complexity. New York: Cambridge University Press, 1997.
Znajdź pełny tekst źródłaStanković, Radomir S. From Boolean logic to switching circuits and automata: Towards modern information technology. Berlin: Springer Verlag, 2011.
Znajdź pełny tekst źródłaVollmer, Heribert. Introduction to Circuit Complexity: A Uniform Approach. Berlin, Heidelberg: Springer Berlin Heidelberg, 1999.
Znajdź pełny tekst źródłaShalyto, A. A. Logicheskoe upravlenie: Metody apparatnoĭ i programmnoĭ realizat︠s︡ii algoritmov. Sankt-Peterburg: Nauka, 2000.
Znajdź pełny tekst źródłaKunz, Wolfgang. Reasoning in Boolean Networks: Logic Synthesis and Verification using Testing Techniques. Boston, MA: Springer US, 1997.
Znajdź pełny tekst źródłaCzęści książek na temat "Circuit booléen"
Kitaev, A., A. Shen i M. Vyalyi. "Boolean circuits". W Graduate Studies in Mathematics, 17–27. Providence, Rhode Island: American Mathematical Society, 2002. http://dx.doi.org/10.1090/gsm/047/04.
Pełny tekst źródłaHromkovič, Juraj. "Boolean Circuits". W Texts in Theoretical Computer Science An EATCS Series, 151–240. Berlin, Heidelberg: Springer Berlin Heidelberg, 1997. http://dx.doi.org/10.1007/978-3-662-03442-2_3.
Pełny tekst źródłaPaterson, Mike. "Boolean circuit complexity". W Algorithms and Computation, 187. Berlin, Heidelberg: Springer Berlin Heidelberg, 1992. http://dx.doi.org/10.1007/3-540-56279-6_71.
Pełny tekst źródłaSikkel, Klaas. "Boolean circuit parsing". W Texts in Theoretical Computer Science An EATCS Series, 311–44. Berlin, Heidelberg: Springer Berlin Heidelberg, 1997. http://dx.doi.org/10.1007/978-3-642-60541-3_14.
Pełny tekst źródłaLam, William K. C., i Robert K. Brayton. "Exact Circuit Performance Validation". W Timed Boolean Functions, 189–242. Boston, MA: Springer US, 1994. http://dx.doi.org/10.1007/978-1-4615-2688-9_6.
Pełny tekst źródłaClote, Peter, i Evangelos Kranakis. "Circuit Lower Bounds". W Boolean Functions and Computation Models, 61–154. Berlin, Heidelberg: Springer Berlin Heidelberg, 2002. http://dx.doi.org/10.1007/978-3-662-04943-3_2.
Pełny tekst źródłaClote, Peter, i Evangelos Kranakis. "Circuit Upper Bounds". W Boolean Functions and Computation Models, 155–205. Berlin, Heidelberg: Springer Berlin Heidelberg, 2002. http://dx.doi.org/10.1007/978-3-662-04943-3_3.
Pełny tekst źródłaBrown, Frank Markham. "Recursive Realizations of Combinational Circuits". W Boolean Reasoning, 211–37. Boston, MA: Springer US, 1990. http://dx.doi.org/10.1007/978-1-4757-2078-5_9.
Pełny tekst źródłaSengupta, Rimli, i H. Venkateswaran. "Non-cancellative Boolean circuits: A generalization of monotone Boolean circuits". W Lecture Notes in Computer Science, 298–309. Berlin, Heidelberg: Springer Berlin Heidelberg, 1996. http://dx.doi.org/10.1007/3-540-62034-6_58.
Pełny tekst źródłaWallis, W. D. "Boolean Algebras and Circuits". W A Beginner’s Guide to Discrete Mathematics, 65–89. Boston, MA: Birkhäuser Boston, 2003. http://dx.doi.org/10.1007/978-1-4757-3826-1_3.
Pełny tekst źródłaStreszczenia konferencji na temat "Circuit booléen"
Kombarov, Yury Anatolievich. "Improvement of circuit complexity lower bound for parity function in one infinite basis". W Academician O.B. Lupanov 14th International Scientific Seminar "Discrete Mathematics and Its Applications". Keldysh Institute of Applied Mathematics, 2022. http://dx.doi.org/10.20948/dms-2022-14.
Pełny tekst źródłaAudemard, Gilles, Frédéric Koriche i Pierre Marquis. "On Tractable XAI Queries based on Compiled Representations". W 17th International Conference on Principles of Knowledge Representation and Reasoning {KR-2020}. California: International Joint Conferences on Artificial Intelligence Organization, 2020. http://dx.doi.org/10.24963/kr.2020/86.
Pełny tekst źródłaDi Crescenzo, Giovanni, Jeyavijayan Rajendran, Ramesh Karri i Nasir Memon. "Boolean Circuit Camouflage". W CCS '17: 2017 ACM SIGSAC Conference on Computer and Communications Security. New York, NY, USA: ACM, 2017. http://dx.doi.org/10.1145/3139324.3139331.
Pełny tekst źródłaKuehlmann, Andreas, Malay K. Ganai i Viresh Paruthi. "Circuit-based Boolean Reasoning". W the 38th conference. New York, New York, USA: ACM Press, 2001. http://dx.doi.org/10.1145/378239.378470.
Pełny tekst źródłaCraig, R. G. A., G. S. Buller, F. A. P. Tooley, H. Ichikawa, S. D. Smith, A. C. Walker i B. S. Wherrett. "An All-Optical Programmable Logic Gate". W Optical Computing. Washington, D.C.: Optica Publishing Group, 1989. http://dx.doi.org/10.1364/optcomp.1989.pd6.
Pełny tekst źródłaYao-Hsin Chou, I-Ming Tsai i Sy-Yen Kuo. "Quantum boolean circuit is 1-testable". W 2007 7th IEEE Conference on Nanotechnology (IEEE-NANO). IEEE, 2007. http://dx.doi.org/10.1109/nano.2007.4601419.
Pełny tekst źródłaCiencialova, Lucie. "MEMBRANE AGENTS SIMULATING BOOLEAN CIRCUITS". W 17th International Multidisciplinary Scientific GeoConference SGEM2017. Stef92 Technology, 2017. http://dx.doi.org/10.5593/sgem2017/21/s07.053.
Pełny tekst źródłaTerui, K. "Proof nets and Boolean circuits". W Proceedings of the 19th Annual IEEE Symposium on Logic in Computer Science, 2004. IEEE, 2004. http://dx.doi.org/10.1109/lics.2004.1319612.
Pełny tekst źródłaSedighi, Behnam, Joseph J. Nahas, Michael Niemier i Xiaobo Sharon Hu. "Boolean circuit design using emerging tunneling devices". W 2014 32nd IEEE International Conference on Computer Design (ICCD). IEEE, 2014. http://dx.doi.org/10.1109/iccd.2014.6974705.
Pełny tekst źródłaCavalar, Bruno Pasqualotto, i Yoshiharu Kohayakawa. "Sunflower Theorems in Monotone Circuit Complexity". W Concurso de Teses e Dissertações da SBC. Sociedade Brasileira de Computação, 2021. http://dx.doi.org/10.5753/ctd.2021.15761.
Pełny tekst źródłaRaporty organizacyjne na temat "Circuit booléen"
Barnett, Janet Heine. Applications of Boolean Algebra: Claude Shannon and Circuit Design. Washington, DC: The MAA Mathematical Sciences Digital Library, lipiec 2013. http://dx.doi.org/10.4169/loci004000.
Pełny tekst źródłaMahooti, Rabe'eh. A CMOS circuit generator using differential pass transistors for implementing Boolean functions. Portland State University Library, styczeń 2000. http://dx.doi.org/10.15760/etd.5689.
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