Rozprawy doktorskie na temat „Biphasic stimulation”
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Howe, Daniel Steven. "A WIRELESS ELECTRICAL STIMULATION SYSTEMFOR WOUND HEALING THERAPYWITH BIPHASIC HIGH-VOLTAGE PULSED CURRENT OUTPUT". Case Western Reserve University School of Graduate Studies / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=case1365179992.
Pełny tekst źródłaPetersson, Marcus. "Computational Modeling of Deep Brain Stimulation". Thesis, Linköping University, Department of Biomedical Engineering, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-9512.
Pełny tekst źródłaDeep brain stimulation (DBS) is a surgical treatment technique, which involves application of electrical pulses via electrodes inserted into the brain. Neurons, typically located in the basal ganglia network, are stimulated by the electrical field. DBS is currently widely used for symptomatically treating Parkinson’s disease patients and could potentially be used for a number of neurological diseases. In this study, computational modeling was used to simulate the electrical activity of neurons being affected by the electrical field, to gain better understanding of the mechanisms of DBS. The spatial and temporal distribution of the electrical field was coupled to a cable model representing a human myelinated axon. A passing fiber with ends infinitely far away was simulated. Results show that excitation threshold is highly dependent on the diameter of the fiber and the influence (threshold-distance and threshold-diameter relations) can be controlled to some extent, using charge-balanced biphasic pulses.
Ly, Mai Thanh Graduate School of Biomedical Engineering Faculty of Engineering UNSW. "Electrical stimulation of cells involved in wound healing". Publisher:University of New South Wales. Graduate School of Biomedical Engineering, 2008. http://handle.unsw.edu.au/1959.4/41523.
Pełny tekst źródłaHyde, Molly. "The Combined and Differential Effects of Monophasic and Biphasic Repetitive Transcranial Magnetic Stimulation on ERP-Indexed Attentional Processing in Treatment-Resistant Depression". Thesis, Université d'Ottawa / University of Ottawa, 2019. http://hdl.handle.net/10393/39932.
Pełny tekst źródłaYao, Tien Sing, i 姚天行. "Neurotic biphasic stimulation driver". Thesis, 2016. http://ndltd.ncl.edu.tw/handle/77703033399425110847.
Pełny tekst źródłaLi, Jin-Wei, i 李晉緯. "An Adjustable Biphasic Pulse Electrical stimulation chip". Thesis, 2014. http://ndltd.ncl.edu.tw/handle/wwc6yt.
Pełny tekst źródła國立雲林科技大學
電子工程系
102
This study considered the specifications of electrical stimulation output current and thus used TSMC 0.25-um HV mixed signal Based BCD process to integrate a system and components used in traditional electrical stimulator into one chip. The architecture of this electrical stimulation chip contained an 8-bit digital-to-analog converter and a high-voltage driver circuit. Considering the differential nonlinearity (DNL) as well as the glitch and avoiding unnecessary waste of area, to achieve high-linearity current output, the 8-bit digital-to-analog converter was implemented on segmented current mode structure, which was consisted of thermometer-coded 6-bit MSBs and binary-weighted 2-bit LSBs, and generated 1mA. In order to increase the performance of the electrical stimulator, the converter combined high-voltage driver circuit to amplify the output current with pulse width modulation circuit transferred from FPGA. The circuit simulation applied HSPICE to simulate, and the simulation result of the 8-bit digital-to-analog converter showed that the maximum differential nonlinearity (DNL,max) and integral nonlinearity (INL,max) were 0.0025 LSB and 0.078 LSB, respectively. After the amplification of high-voltage driver circuit, the output current gained from 1mA to 50mA, and the anodic maximum differential nonlinearity (DNLan,max) and anodic integral nonlinearity (INLan,max) were 0.04 LSB and 0.21 LSB, respectively, while the cathodic maximum differential nonlinearity (DNLca,max) and cathodic integral nonlinearity (INLca,max) were 0.04 LSB and 0.138 LSB, respectively. This study widens the line of output current terminal and modifies the size of MOS. In addition, since the current source is easily interfered by temperature, which makes this system become nonlinear, a bandgap is added to the biasing circuit for preventing the biasing voltage from the influence of temperature. Thus, the system can improve the linearity of digital-to-analog convertor and combines FPGA to control electrical stimulation cycle, which increases the applicability and the performance of the entire system.
Chen, Gui-Rong, i 陳桂榕. "A 50mA Biphasic Pulse Stimulation Chip Using High-Voltage Process". Thesis, 2013. http://ndltd.ncl.edu.tw/handle/41567221845096622959.
Pełny tekst źródła國立雲林科技大學
電子與光電工程研究所碩士班
101
This study used TSMC 0.25-um HV mixed signal Based BCD 2.5/5/7/12/20/24/40/45/60V process to implement the Biphasic Pulse Stimulation Chip ,which aimed to reduce the large volume caused by the high-power components of booster circuit in traditional electric stimulator. In this electrical stimulator architecture, a suitable structure was planed to solve the problem with power consumption and area consumption caused by high-voltage transistors. The structure contained 8-bit high-voltage digital-to-analog converter to control any intensity of output current in electrical stimulation. It also taken segmented current mode structure, 6-bit MSBs thermomeder-coded and 2-bit LSBs binary-weighted to achieve high linearity. Furthermore, since this study utlizied 5/30/60V as power supply, linearity offset may occur between low-voltage circuit and high-voltage circuit. Therefore voltage limiting technique was proposed to increase the linearity of output value from the electrical stimulator. In circuit simulation, we apply for HSPICE to simulation. The simulation result showed that, the maximum output current of anodic(Ian,max) and cathodic(Ica,max) were 49.98mA and 50.03mA respectively. The maximum differential nonlinearity(DNLan,max) and integral nonlinearity(INLan,max) of anodic were -0.12 LSB and 0.51 LSB respectively. The maximum differential nonlinearity(DNLca,max) and integral nonlinearity(INLca,max) of cathodic were -0.19 LSB and 0.28 LSB respectively. In addition, the frequency of electrical stimulation (TP) was 24.9Hz, the stimulation duration of anodic(Ta) and cathodic(Tc) were 300.08μs and 300.05μs respectively.
Lu, Yi-Ching, i 盧怡晴. "A Biphasic Current Mode Functional Electrical Stimulator with A Class-AB Charge Compensation Mechanism for Deep Brain Stimulation". Thesis, 2019. http://ndltd.ncl.edu.tw/handle/4hbg44.
Pełny tekst źródła國立臺灣科技大學
電機工程系
107
A current mode functional electrical stimulator(FES) with class-AB charge compensation mechanism is proposed. In the two-channel FES, a six-bit current DAC is equipped to provide the stimulation current, and the current intensity can be adjusted from 50 uA to 3 mA for animal experiments and human body use. In addition, the safety issue of the electric stimulator is also considered. Therefore, the biphasic current mode is applied to suppress the epileptic effect first by a cathodic current, and then an anodic current of the same intensity is performed for the first stage charge elimination. Besides, the generated stimulation waveform parameters can be adjusted in 12 bits to increase the application flexibility. However, due to the non-ideal effect of the process, the accumulated charge cannot be completely cancelled by the biphasic current. Therefore, an innovative class-AB based charge compensator is proposed. By the characteristics of the class AB OTA, low quiescent current and high compensation efficiency can be achieved. The two-channel FES system was combined with an analog front-end (AFE) system to develop an animal experimental platform and cooperated with the team of Professor Fang-Chia Chang of the Taiwan University Veterinary Department to conduct animal experiments to verify the safety issue and the effectiveness of the FES. In order to further increase the flexibility of the FES, a single channel FES is modularized to facilitate channel expansion. At the same time, the biphasic current architecture is improved, and the shape selection function between pulse and decaying exponential shape is added to further analysis the stimulation efficiency. This design is applied in a four-channel FES, and the performance of the chip is being measured.
"Gamma Band Oscillation Response to Somatosensory Feedback Stimulation Schemes Constructed on Basis of Biphasic Neural Touch Representation". Doctoral diss., 2017. http://hdl.handle.net/2286/R.I.45529.
Pełny tekst źródłaDissertation/Thesis
Doctoral Dissertation Biomedical Engineering 2017
Lai, Chia-Lin, i 賴佳琳. "Interaction between Peripheral Blood Monocytes (PBM) and Lymphocytes (PBLs) of Healthy Porcine Circovirus TypeⅡ (PCV2)-Carrier Pigs Following Monophasic or Biphasic Stimulation". Thesis, 2007. http://ndltd.ncl.edu.tw/handle/45755478966075571077.
Pełny tekst źródła國立臺灣大學
獸醫學研究所
95
Porcine circovirus type Ⅱ (PCV2) infection has been demonstrated to be an essential factor in the induction of the newly emerged disease, postweaning multisystemic wasting syndrome (PMWS), in pigs. PCV2 antibodies have been found in pigs worldwidely, usually with high seroprevalence. Although monocyte/macrophage lineage cells are considered as the major target cells, the role of lymphocytes on the disease development is still uncertain. Immune activation and co-factors such as bacteria or viruses have been suggested to be important factors in the induction of PMWS. Our previous studies have demonstrated that the PCV2 nucleic acid and antigens could be detected intranuclearly in bacterial lipopolysaccharide (LPS)-treated PCV2-inoculated swine alveolar macrophages (AMs) and in concanavalin A (Con A)-stimulated swine peripheral blood lymphocytes (PBLs). The objective of the present study was to further evaluate whether there is an enhancement effect on the PCV2-positive rate in either monocytes or lymphocytes of peripheral blood following monophasic or biphasic stimulation with LPS and/or Con A in healthy PCV2-carrier pigs. After stimulation with LPS and/or Con A, both PCV2 antigen- and nucleic acid-containing rates of the peripheral blood mononuclear cells (PBMCs) of healthy PCV2-carrier pigs measured by immunofluorescent assay (IFA), surface marker IFA, in situ hybridization-polymerase chain reaction (ISH-PCR), and real time PCR increased with time. The levels of the PCV2 antigen-containing rate in Con A-treated group and the group treated simultaneously with LPS and Con A ( (LPS + Con A)-treated groups) were significantly greater than those of the NT and LPS-treated groups. Significant difference was also seen among the LPS-, Con A, and (LPS + Con A)-treated groups. The viral titer of the (LPS + Con A)-treated group increased at 3 days post-incubation (DPI) as did antigen- and nucleic acid-containing rates. Two third of the PCV2-positive cells belonged to SWC3- population; this implies that lymphocytes may also play an important role on PCV2 replication. The results indicate that interaction between PBMs and PBLs may exist and simultaneous activation of PBMs and PBLs may result in increased PCV2 load in both cells. The results further support that immune activation may increase the morbidity of PMWS in PCV2-infected pigs via the increase in viral load.
Lai, Chia-Lin. "Interaction between Peripheral Blood Monocytes (PBM) and Lymphocytes (PBLs) of Healthy Porcine Circovirus Type2 (PCV2)-Carrier Pigs Following Monophasic or Biphasic Stimulation". 2007. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-1907200718003800.
Pełny tekst źródłaHuang, Shih-Yun, i 黃詩芸. "The Design of 180-nm CMOS 256-Pixel Sensing and Biphasic Current Stimulation Chips with Bidirectional-Sharing Electrodes and Charge Pump for Subretinal Prosthesis". Thesis, 2019. http://ndltd.ncl.edu.tw/handle/eq66hv.
Pełny tekst źródłaLiao, Jung-Hsing, i 廖容興. "THE DESIGN OF 180-NM CMOS 480-PIXEL SENSING AND BIPHASIC CURRENT STIMULATION CHIPS WITH FOUR DIRECTIONAL SHARING ELECTRODES AND CHARGE PUMP FOR SUBRETINAL PROSTHESIS". Thesis, 2018. http://ndltd.ncl.edu.tw/handle/9u4376.
Pełny tekst źródła國立交通大學
電子研究所
106
A photovoltaic-cell-powered CMOS 480-pixel implantable chip is proposed for subretinal prostheses. In the proposed chip, the divisional power supply scheme (DPSS) and the active pixel sensor (APS) are adopted to improve the efficiency of output stimulation currents and the image sensitivity. The proposed chip consists of totally 480 photodiode array with 32 DPSS divisions, control signal generator circuits, and photovoltaic cells. It is designed and fabricated in 180-nm CMOS image sensor (CIS) technology. The chip size is 3.1mm x 3.1mm. At first, the chip have not any output function. After FIB, this chip measured frequency of 32-phase control signals is 30 Hz under signal light intensity of 505.4 lux and background IR intensity of 94 mW/cm2. The measured output stimulation current is 9.0 μA under 10-kΩ load. Under the equivalent electrode impedance load, the measured frequency of 32-phase control signals is 38 Hz. The measured peak output stimulation current is 9.0 μA and the amount of injected charges per pixel is 9.8 nC. The measurement results have verified the correct function of the proposed subretinal implant chip after FIB.
Sung, Wei-Jie, i 宋偉傑. "THE DESIGN OF 180-NM CMOS 256-PIXEL SENSING AND BIPHASIC STIMULATION CHIPS WITH ON-CHIP PHOTOVOLTAIC CELLS AND DIVISIONAL POWER SUPPLY SCHEME FOR SUBRETINAL PROSTHESES". Thesis, 2016. http://ndltd.ncl.edu.tw/handle/gnd233.
Pełny tekst źródła國立交通大學
電子工程學系 電子研究所
104
A photovoltaic-cell-powered CMOS 256-pixel implantable chip is proposed for subretinal prostheses. In the proposed chip, the divisional power supply scheme (DPSS) and the active pixel sensor (APS) are adopted to improve the efficiency of output stimulation currents and the image sensitivity. The proposed chip consists of a 16x16 photodiode array with 8 DPSS divisions, control signal generator circuits, and photovoltaic cells. It is designed and fabricated in 180-nm CMOS image sensor (CIS) technology. The chip size is 3mm x 3mm. The DPSS11 measured frequency of eight-phase control signals is 47.68 Hz under signal light intensity of 5 mW/cm2 and background IR intensity of 80 mW/cm2. The measured output stimulation current is 19.9 μA under 10-kΩ load. Under the equivalent electrode impedance load, the measured frequency of eight-phase control signals is 45.45 Hz. The measured peak output stimulation current is 19.52 μA and the amount of injected charges per pixel is 1.1 nC. The DPSS12 measured frequency of eight-phase control signals is 30.2 Hz under signal light intensity of 0.4 mW/cm2 and background IR intensity of 80 mW/cm2. The measured output stimulation current is 19.95 μA under 10-kΩ load. Under the equivalent electrode impedance load, the measured frequency of eight-phase control signals is 30.2 Hz. The measured peak output stimulation current is 19.84 μA and the amount of injected charges per pixel is 1.64 nC. The measurement results have verified the correct function of the proposed subretinal implant chip. DPSS11—CMOS CIS 256-pixel subretinal chip version I DPSS12-- CMOS CIS 256-pixel subretinal chip version II
Su, Chao-Kuei, i 蘇釗逵. "The design of 65-nm cmos 64-pixel sensing and biphasic stimulation chips with on-chip solar cells and divisional power supply scheme for implanted subretinal prostheses". Thesis, 2014. http://ndltd.ncl.edu.tw/handle/9tcq9r.
Pełny tekst źródła國立交通大學
電子工程學系 電子研究所
102
In this thesis, a solar-cell powered CMOS current stimulation chip and an implant system for subretinal prostheses are proposed and analyzed. The chip structure is based on the proposed Divisional Power Supply Scheme (DPSS) to improve the efficiency of output stimulation current. N+/P-well photodiode structure with floating P-substrate and NMOSET in P-well with floating deep n-well (DNW) are adopted to prevent photocurrent leakage and enable CMOS devices integration in twin-well CMOS technology with DNW structure. The experimental chips consists of three 8×8 photodiode array with 4 and 8 divisions and control signal generator circuits. The experimental chips has been designed and fabricated in TSMC 0.18um and 65nm CMOS standard process technology respectively. The final chip size is 2.8 mm×2.8 mm. The measured frequency of four eight phase control signals is 189 Hz with the clock frequency of 1.5 kHz under 80mW/cm2 of signal light intensity and 40mW/cm2 of background IR. The measured output biphasic stimulation current is 9.9
Chang, E. Yuan, i 張峨源. "A High Energy-Efficiency, Biphasic Exponential Current Stimulator with Loading Adaptability". Thesis, 2017. http://ndltd.ncl.edu.tw/handle/6t9upf.
Pełny tekst źródła國立清華大學
電機工程學系
105
With the development of technology, Bio-medical Electrics has drawn more attention then before. Researches had shown that Functional electrical stimulation(FES) can be used to cure or replace function loss of human body and can even treat some neuron-related diseases. And thanks to the improvement of semi-conductor technology, these bio-medical devices can be integrated into small implant devices, which can replace damaged function on human body in daily life or detect and cure neuron-related problems whenever necessary. In recent years, many research groups has started to compare conventional rectangular stimuli with non-rectangular ones, and most groups has mentioned or concluded the high energy-efficiency of exponentially deceasing current stimuli. A high energy-efficiency current stimulator that can be applied to deep brain stimulation(DBS) has been proposed in this study. A maximum 300uA output stimulation can be generated to electrode of 20kohm equivalent impedance with 1V supply voltage. In order to reduce energy consumption while delivering stimulation, exponential current pulses are used due to their higher energy-efficiency when inducing action potential on tissue than conventional rectangular pulses. However, conventional exponential stimulators use a fixed high voltage source to drive the output stimulation path, this causes energy waste while exponential stimulation is not at its peak current.Therefore, a technique is proposed to make the output high voltage tracing the output stimulation current to reach high energy-efficiency. A high voltage tolerant switch array is also proposed to sustain the mentioned varying high voltage. The proposed work is simulated and fabricated using standard TSMC 0.18 um process and the circuit is designed with consideration of high voltage issue on transistors. The second proposed design is measured to have 40\% of energy consumption reduction and can generate a full biphasic exponential pulse.
Hsieh, Chia-Chi, i 謝佳琪. "Design of Multi-Channel Monopolar Biphasic Voltage Stimulator for Implantable Biomedical Application". Thesis, 2018. http://ndltd.ncl.edu.tw/handle/33xrmh.
Pełny tekst źródła國立交通大學
電子研究所
106
Neurological disorder causes unusual electrical activity in the brain that further affects the motor system, such as Parkinson’s disease and epilepsy, and there are seventy million population around the world suffer from these symptoms. Instead of drugs, electrical stimulation therapy has been proven to effectively restore some physical functions of patients by stimulating the abnormal nerve sites. With the development of CMOS process and bioelectronics, an implantable system-on-chip (SoC) device is able to be realized. Combing with microelectronics, medicine and biochemistry, the biomedical chip is made for different therapeutic applications. For example, closed-loop deep brain stimulation (DBS) system, implantable SoC for seizure control, and cochlear implant. According to the research of our biomedical group, a multi-channel voltage stimulator is proposed for Parkinson’s disease treatment. It completes every stimulation by delivering biphasic stimulus voltage to implantable pulse generator (IPG) case from one of the stimulator outputs. Considering of loading adaptation due to electrode-tissue impedance variation, a wide-range of stimulus voltage from ±0.5V to ±8V is designed. The adjustable output voltage is controlled by 4-bit binary code, which allows the system to generate 16 different amplitudes. Therefore, the proposed stimulator can be used in many biomedical applications through providing a proper stimulus voltage. In the treatment of Parkinson’s disease, voltage stimulation under 3.5V is often used. However, a voltage that is larger than 5V might be needed in the animal experiment of cochlear. For implantable SoC integration, safety, power consumption, and reliability have to be taken into consideration. A multi-charge-pump (MCP) system, which serves as power supply to stimulator and provides ±10V to support the circuit operation. The whole stimulator circuit has been fabricated in TSMC 0.25-μm HV USG 2.5-V/5-V/12-V CMOS process without device overstress, p-n junction breakdown issue, or p-n junction forward-leakage problem under 20V compliance voltage and negative voltage operation.
Huang, Yu-Kai, i 黃昱凱. "Design of Four-Channel Monopolar Biphasic Current Stimulator System for Cochlear Implant Application". Thesis, 2019. http://ndltd.ncl.edu.tw/handle/9j43d6.
Pełny tekst źródła國立交通大學
電子研究所
108
With rapid development of biomedical science and semiconductor, SoC for biomimicry is becoming feasible. Cochlear implant is an implanted hearing-aid device which provides senses of sound by electrical stimulation. In this work, the stimulator system employs four electrodes placed on the surface of bone and one electrode on the round window to preserve partial hearing. The proposed circuit is capable of providing monopolar biphasic current stimulation with single-output or dual-output mode. The pulse shape and magnitude of current can be flexibly controlled by digital signals, and the tuning range of the magnitude is from 10A to 1.2mA with resolution of 10μA. The matching between cathodic and anodic current is within the safety regulation of implantable devices. Besides, positive and negative high voltages are required due to the high impedance of load and monopolar configuration. The proposed design is realized in low voltage process with the ability to tolerant high voltage and operate in complex power domains. The positive and negative high voltages are provided by multiple-charge-pump which is able to provide ±6V and -3V simultaneously. With pulse-frequency-modulation feedback control, the voltages can be regulated within 2.5mA loading current. Also, the four-phase clock scheme is utilized to suppress the generation of reverse current; hence, the power efficiency can be improved. The proposed stimulator system has been taped out in TSMC 0.18μm low voltage CMOS process and the functions are verified by electrical measurement.
Hung, Tao-Jung, i 洪道容. "Design of Monopolar Biphasic 8-channel Current and Voltage Stimulator for Parkinson\'s Disease". Thesis, 2019. http://ndltd.ncl.edu.tw/handle/re82da.
Pełny tekst źródła國立交通大學
電子研究所
108
Neuromodulation is a technique to affect nerve behavior and the device of it can be implanted in many places to treat illness such as Parkinson’s disease. Neuromodulation can be chemical or electrical. Chemical neuromodulation is to implant pharmaceutical agents to tissue. Electrical neuromodulation is to use electric to stimulate nerves. The stimulation can have two stimulation modes (voltage and current), two system configu- rations (monopolar and bipolar), and two kinds of stimulation pulses (monophasic and biphasic). This thesis proposes three monopolar biphasic stimulator architectures, cur- rent stimulator in LV and current and voltage stimulator both in LV and HV. The LV circuit is designed in 0.18µm LV 1.8/3.3V CMOS process and HV is designed in 0.25µm 2.5/5/12V HV CMOS process. The LV current stimulator can provide 0 ∼ ±3.6mA with 0.2mA per step. The power supplies are ±6V, ±3V and 1.8V. The LV current and voltage stimulator is the current simulator with an additional function to provide 0 ∼ ±3.6V with 0.2V per step. The HV current and voltage stimulator function is the same as the function of LV current and voltage stimulator but the output can be 0 ∼ ±10V and 0 ∼ ±10mA. The power supplies of HV current and voltage simulator are ±15V, ±10V ±5V and 2.5V. The power mentioned before are generated by power supply at the time of measuring. However, it will be provided by power management unit in SoC.