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AZAROV, Oleksiy, i Anna FIGAS. "THERMOSTABLE REFERENCE CURRENT AND VOLTAGE SOURCES FOR HIGH-LINEAR ANALOGUE-CODE-ANALOGUE SYSTEM". Herald of Khmelnytskyi National University. Technical sciences 311, nr 4 (sierpień 2022): 23–28. http://dx.doi.org/10.31891/2307-5732-2022-311-4-23-28.
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DC sources and reference voltage sources are widely used in various electronic devices: analog-to-digital and digital-to-analog converters, DC amplifiers, sample-and-hold devices, stabilized voltage sources, and others. At the same time, the accuracy and temperature characteristics of the latter largely depend on the same characteristics of direct current and voltage sources, which are subject to stringent requirements. There are quite a lot of different approaches to the construction of reference voltage and current source circuits with thermal compensation. The most famous of them – with the use of thermally compensated zener diodes operating in reverse breakdown mode. However, devices based on them have a high power consumption and low efficiency and a high level of noise, and it is difficult to implement temperature drift compensation due to a wide spread of temperature characteristics. The so-called bandgap circuits are also widely used – transistor reference voltage sources, the value of the reference voltage of which is determined by the band gap of the semiconductor. The most famous of them are Vidlar’s bandgaps and Brokau’s bandgaps. The specificity of all bandgap circuits is the rigid binding of the output voltage to the band gap of the semiconductor. The article proposes an alternative approach to the construction of direct current and voltage sources, which consists in the use of circuits of two-pole direct current sources. A new approach to the construction of thermally stable reference current sources based on bipolar transistors using the band gap voltage of a semiconductor and current mirrors is proposed. The principles of operation of the circuits are described and the possibility of achieving thermal compensation is proved. Computer modelling of the static characteristics of the proposed reference current sources, in particular, the temperature drift of the currents, has been carried out. A new approach to the construction of thermally stable reference voltage sources based on bipolar transistors with the use of thermally stable reference current generators is proposed. Analytical expressions are obtained that describe operation of circuits of reference voltage sources according to the proposed approach. A method for increasing the loading capacity of these reference voltage sources is proposed.
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Zhang, Wei Juan, Yan Zhao, Ju Wang i Kun Li. "A Band-Gap Voltage Reference for LDO Circuit". Applied Mechanics and Materials 599-601 (sierpień 2014): 626–30. http://dx.doi.org/10.4028/www.scientific.net/amm.599-601.626.
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A band-gap voltage reference applicable for LDO circuit was designed. The band-gap voltage reference with lower change rate and low temperature-drift and high PSRR was acquired, which uses the two stage operational amplifier as the input terminal, and the miller compensation circuit was adopted in order to improve the stability of the voltage reference circuit. The circuit was simulated with Cadence tool and 0.5μm CMOS model. The results show that the reference voltage is 1.2182V, the PSRR of band-gap voltage reference is-76.8dB. The measured results indicated that the designed band-gap voltage reference is prospective for application in LDO circuit.
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Grella, K., S. Dreiner, A. Schmidt, W. Heiermann, H. Kappert, H. Vogt i U. Paschen. "High Temperature Characterization up to 450°C of MOSFETs and Basic Circuits Realized in a Silicon-on-Insulator (SOI) CMOS Technology". Journal of Microelectronics and Electronic Packaging 10, nr 2 (1.04.2013): 67–72. http://dx.doi.org/10.4071/imaps.374.
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Standard bulk CMOS technology targets operating temperatures of not more than 175°C. Silicon-on-insulator technologies are commonly used up to 250°C. In this work, we evaluate the limit for electronic circuit function realized in thin film SOI technologies for even higher temperatures. At Fraunhofer IMS, a versatile 1.0 μm SOI-CMOS process based on 200 mm wafers is available. It features three layers of tungsten metallization with excellent reliability concerning electromigration, as well as voltage-independent capacitors, various resistors, and single-poly-EEPROMs. We present a study of the temperature dependence of MOSFETs and basic circuits produced in this process. The electrical characteristics of an NMOSFET transistor and a PMOSFET transistor are studied up to 450°C. In a second step, we investigate the functionality of a ring oscillator (representing a digital circuit) and a band gap reference as an example of a simple analog component. The frequency and the current consumption of the ring oscillator, as well as the output voltage and the current of the band gap reference, are characterized up to 450°C. We find that the ring oscillator still oscillates at this high temperature with a frequency of about one third of the value at room temperature. The output voltage of the band gap reference is in the specified range (change < 3%) up to 250°C. The deviations above this temperature are analyzed and measures to improve the circuit are discussed. The acquired data provide an important foundation to extend the application of CMOS technology to its real maximum temperature limits.
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Marani, R., i A. G. Perri. "Review—Thermal Effects in the Design of CNTFET-Based Digital Circuits". ECS Journal of Solid State Science and Technology 11, nr 4 (1.04.2022): 041006. http://dx.doi.org/10.1149/2162-8777/ac63e6.
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In this paper we review a method to analyse the thermal effects in the design of CNTFET-based digital circuits, enhancing a compact model, already proposed by us, in which the temperature variation in the drain current equation and in energy band gap is considered. At first the impact of temperature variations on design parameters of CNTFET is shown, with particular reference to the output and trans-characteristics, the output resistance, the transconductance. Then, using ADS software, the effects of temperature variations in the design of some digital circuits, are illustrated and widely discussed, emphasizing that the reviewed procedure can easily be applied to any other circuit based on CNTFET.
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Li, Zheng Da, i Lin Xie. "One Kind of Band-Gap Voltage Reference Source with Piecewise High-Order Temperature Compensation and Power Supply Rejection Ratio". Applied Mechanics and Materials 644-650 (wrzesień 2014): 3575–78. http://dx.doi.org/10.4028/www.scientific.net/amm.644-650.3575.
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This paper designed a new band-gap voltage reference circuit with two-stage temperature compensation.It realizes non-linear temperature compensation by using NMOS-pipe leakage current and increases the power supply rejection ratio of the band-gap voltage reference source by introducing negative feedback between the operational amplifier and the power supply. What is more, the paper simulates the band-gap voltage reference source based on CSMC 0.5μm CMOS technique. The result as follow: the band-gap voltage reference source has the temperature coefficient of 8.2ppm/oC among-40-120oC with the supply voltage of 3V, the low-frequency power supply rejection ratio is 83dBat 27oC and the power supply rejection ratio is 71dB in 1KHz, the output voltage regulation is 1.05mV/V in the supply voltage range from 2.4V to 5V.
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Shrivastava, Amandeep, R. S. Gamad i R. C. Gurjar. "Design of Improved Band Gap Reference Circuit for CS-VCO Application Using 180nm CMOS Technology". IOP Conference Series: Materials Science and Engineering 1272, nr 1 (1.12.2022): 012009. http://dx.doi.org/10.1088/1757-899x/1272/1/012009.
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Electronics engineers are currently faced with the task of designing linear and broad scale voltage regulated oscillator for analogue and a varied signal applications for a shorter design period of time. The Band gap reference source is used here to compensate the noise which affects the Phase lock loop operation from power supplied noise. A cascode current mirror based band gap reference current starved voltage controlled Oscillator (BG-CSVCO) is discussed in detailed as a new design strategy for reducing power supplied noise in Phase lock loop (PLL) applications. A cascode current mirror based band gap reference CS-VCO design is simulated and direct employing in 180nm Cadence CMOS technology. A frequency range of band gap reference CS-VCO is 0.009 GHz up to the 2.07 GHz for adjusting range of 0.5V to 1.8V with the power dissipation is 0.564mW. The VDD as supplied voltage was 1.8volt.
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Liang, Chao-Jui, Chiu-Chiao Chung i Hongchin Lin. "A low-voltage band-gap reference circuit with second-order analyses". International Journal of Circuit Theory and Applications 39, nr 12 (12.07.2010): 1247–56. http://dx.doi.org/10.1002/cta.699.
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Li, Fan, Ang Li, Yuhao Zhu, Chengmurong Ding, Yubo Wang, Weisheng Wang, Miao Cui, Yinchao Zhao, Huiqing Wen i Wen Liu. "Monolithic Si-Based AlGaN/GaN MIS-HEMTs Comparator and Its High Temperature Characteristics". Applied Sciences 11, nr 24 (17.12.2021): 12057. http://dx.doi.org/10.3390/app112412057.
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Monolithic GaN High Electron Mobility Transistor (HEMT)-integrated circuits are a promising application of wide band-gap materials. To date, most GaN-based devices behave as NMOS-like transistors. As only NMOS GaN HEMT is currently commercially available, its control circuit requires special design if monolithic integration is desired. This article analyzes the schematics of a GaN-based comparator, and three comparator structures are compared through ADS simulation. The optimal structure with the bootstrapped technique is fabricated based on AlGaN/GaN Metal–Insulator–Semiconductor (MIS) HEMT with the recessed gate method. The comparator has excellent static characteristics when the reference voltage increases from 3 V to 8 V. Dynamic waveforms from 10 kHz to 1 MHz are also obtained. High-temperature tests from 25 °C to 250 °C are applied upon both DC and AC characteristics. The mechanisms of instability issues are explained under dynamic working condition. The results prove that the comparator can be used in the state-of-art mixed-signal circuits, demonstrating the potential for the monolithic all-GaN integrated circuits.
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Ma, Bill, i Feng Qi Yu. "A 1.2-V 1.76-Ppm/°C Low Voltage CMOS Band-Gap Reference". Applied Mechanics and Materials 303-306 (luty 2013): 1798–802. http://dx.doi.org/10.4028/www.scientific.net/amm.303-306.1798.
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This paper proposes an innovative CMOS band-gap reference (BGR) topology with a curvature-compensation by using MOS transistors operating in weak inversion region. The mechanism is analyzed thoroughly and the corresponding BGR circuit has been implemented in standard CMOS 0.18u technology. The proposed BGR achieves 1.76 ppm/°C in the range of -40°C to 120°C at 1.2V supply voltage. In addition, it consumes only 30uA current.
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Han, Yifeng, Mingjing Zhai i Junfeng Zhou. "A thermal protection module for automotive integrated circuits". Modern Physics Letters B 31, nr 19-21 (27.07.2017): 1740097. http://dx.doi.org/10.1142/s0217984917400978.
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Automotive ICs work in wide ambient temperature range up to 150[Formula: see text]C. It is important to design an over temperature protection mechanism for the reliability of ICs and systems. A thermal protection module for the automotive ICs is reported in this paper. Dual channel detection and decision scheme was designed based on band gap voltage reference. Precision thermal protection point was set by serial resistors and the variations of power supply, temperature and the process were removed by the resistor ratio. The thermal protection module was implemented in CSMC 0.5 [Formula: see text] 60 V BCD process, incorporated in a CAN transceiver chip. The area of the module was about 0.02 mm2 and thus it was very compact and low cost to integrate in chips. The performance of the thermal protection parameters was measured in incubators. The thermal shutdown temperature was about 164.4[Formula: see text]C and the thermal recovery temperature was about 153[Formula: see text]C with hysteresis temperature of 10 K. Additionally, the thermal protection module showed good consistency with different chips.
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Aloulou, Rahma, P.-O. Lucas de Peslouan, J. Armand, Hassene Mnif, Frederic Alicalapa, Mourad Loulou i Jean Daniel Lan Sun Luk. "Micropower Clock Generator Circuit Using an Optimized Band-Gap Reference for Energy Harvesting Charge Pumps". International Review of Electrical Engineering (IREE) 10, nr 2 (30.04.2015): 257. http://dx.doi.org/10.15866/iree.v10i2.5132.
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Yao, Fang Fang, Xiao Jing Zhang, Zhi Qiang Gao i Xiao Wei Liu. "Design of Charge Pump for Inertial Sensor Drive Circuit". Key Engineering Materials 609-610 (kwiecień 2014): 942–51. http://dx.doi.org/10.4028/www.scientific.net/kem.609-610.942.
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A transistor-level circuit design of charge pump is introduced to drive the inertial device. The design is made of several big modules, including main charge pump module, band gap reference module, comparator module, oscillating module, control module, temperature protection module. A three-stage charge pump is applied to achieve 5 V to 18 V DC/DC conversion, and each stage uses the cross coupled charge pump circuit, taking body effect, threshold voltage drop and efficiency into account. Considering efficiency and power consumption, the band gap reference module adopts a self-biased op amp. To make the comparator transient response fast, the op amp cascades two inverters. The temperature protection module sets a maximum temperature to protect the charge pump. The control module is composed of a data selector, a two-phase non-overlap clock circuit and a frequency divider to optimize clock signal. Then simulations are given and the charge pump is analyzed, finally the efficiency of charge pump is calculated. Designed in CSMC 0.5um process, the charge pump has an efficiency of 87.63 percent, a 19.85V output voltage, a 100 mA output current, and 6.05mV ripple.
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Chan, Hao-Ping, i Yu-Cherng Hung. "None Operational Amplifier (OPA) Based: Design of Analogous Bandgap Reference Voltage". MATEC Web of Conferences 201 (2018): 02002. http://dx.doi.org/10.1051/matecconf/201820102002.
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By using 0.35-um CMOS process, this work achieves a design of analogous band-gap reference voltage circuit with low temperature coefficient. The proposed circuit operates at 3V and generates a reference current of 44 uA. The HSPICE simulation results show the temperature coefficient of this circuit is 23 ppm/°C at range of -10 °C to 100 °C, and the line regulation (the ratio of output current variation to supply voltage variation) is estimated as 1.95 uA/V from supply voltage variation of 3 V to 5 V. The experimental chip is fabricated and measured. The circuit provides adjustable capability for output voltage among temperature variation of -10 - 100 °C. The chip area is 534 × 695 um2. In this new design, the operational amplifier is not necessary. The chip design effort can be great reduced.
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Li, Xiangyu, Liang Yin, Weiping Chen, Zhiqiang Gao i Xiaowei Liu. "A high-resolution tunneling magneto-resistance sensor interface circuit". Modern Physics Letters B 31, nr 04 (10.02.2017): 1750030. http://dx.doi.org/10.1142/s0217984917500300.
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In this paper, a chopper instrumentation amplifier and a high-precision and low-noise CMOS band gap reference in a standard 0.5 [Formula: see text] CMOS technology for a tunneling magneto-resistance (TMR) sensor is presented. The noise characteristic of TMR sensor is an important factor in determining the performance of the sensor. In order to obtain a larger signal to noise ratio (SNR), the analog front-end chip ASIC weak signal readout circuit of the sensor includes the chopper instrumentation amplifier; the high-precision and low-noise CMOS band gap reference. In order to achieve the low noise, the chopping technique is applied in the first stage amplifier. The low-frequency flicker noise is modulated to high-frequency by chopping switch, so that the modulator has a better noise suppression performance at the low frequency. The test results of interface circuit are shown as below: At a single 5 V supply, the power dissipation is 40 mW; the equivalent offset voltage is less than 10 uV; the equivalent input noise spectral density 30 nV/Hz[Formula: see text](@10 Hz), the equivalent input noise density of magnetic is 0.03 nTHz[Formula: see text](@10 Hz); the scale factor temperature coefficient is less than 10 ppm/[Formula: see text]C, the equivalent input offset temperature coefficient is less than 70 nV/[Formula: see text]C; the gain error is less than 0.05%, the common mode rejection ratio is greater than 120 dB, the power supply rejection ratio is greater than 115 dB; the nonlinear is 0.1% FS.
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Tavora de Albuquerque Silva, Andre, Claudio Ferreira Dias, Eduardo Rodrigues de Lima, Gustavo Fraidenraich i Larissa Medeiros de Almeida. "A New Reconfigurable Filter Based on a Single Electromagnetic Bandgap Honey Comb Geometry Cell". Electronics 10, nr 19 (30.09.2021): 2390. http://dx.doi.org/10.3390/electronics10192390.
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This work presents a new unit cell electromagnetic bandgap (EBG) design based on HoneyComb geometry (HCPBG). The new HCPBG takes a uniplanar geometry (UCPBG—uniplanar compact PBG) as a reference and follows similar design methods for defining geometric parameters. The new structure’s advantages consist of reduced occupied printed circuit board area and flexible rejection band properties. In addition, rotation and slight geometry modification in the HCPBG cell allow changing the profile of the attenuation frequency range. This paper also presents a reconfigurable unit cell HCPBG filter strategy, for which the resonance center frequency is shifted by changing the gap capacitance with the assistance of varactor diodes. The HCPBG filter and reconfiguration behavior is demonstrated through electromagnetic (EM) simulations over the FR1 band of the 5G communication network. Intelligent communication systems can use the reconfiguration feature to select the optimal operating frequency for maximum attenuation of unwanted or interfering signals, such as harmonics or intermodulation products.
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Ore, Erenn, Gehan Amaratunga i Stefaan De Wolf. "HIT Solar Cell With V2Ox Window Layer". MRS Advances 2, nr 53 (2017): 3147–56. http://dx.doi.org/10.1557/adv.2017.465.
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ABSTRACTIn the conventional crystalline silicon heterojunction solar cell with the intrinsic thin layer structure (the HIT solar cell), a p-doped thin film silicon or its alloy (pDTF-Si/A) is used as the hole collecting window layer. However, the parasitic absorbance in the pDTF-Si/A window layer, and the toxic, explosive diborane gas used for p-doping are limiting factors for achieving HIT cells with reduced processing costs and / or higher efficiencies. In this work, pDTF-Si/A is replaced by V2Ox, which is deposited by a simple physical vapor deposition technique. Due to the wide band gap of V2Ox, the HIT solar cell with the V2Ox window layer generates a higher short-circuit current density than the reference conventional HIT cell under 1 sun, and achieves an open-circuit voltage of 0.7 V. Furthermore, the charge carrier lifetime and pseudo-efficiency values of the HIT solar cell with the V2Ox window layer indicate that this cell has the potential to outperform the conventional HIT cell in terms of the power conversation efficiency under the standard test conditions.
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Riches, S. T., C. Warn, K. Cannon, G. Rickard, L. Stoica i C. Johnston. "Design and Assembly of High Temperature Distributed Aero-engine Control System Demonstrator". Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, HITEC (1.01.2014): 000285–90. http://dx.doi.org/10.4071/hitec-tha12.
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This paper covers the development of a distributed high temperature electronics demonstrator for integration with sensor elements to provide digital outputs that can be used by the FADEC (Full Authority Digital Electronic Control) system or the EHMS (Engine Health Monitoring System) on an aircraft engine. This distributed electronics demonstrator eliminates the need for the FADEC or EHMS to process the sensor signal, which will assist in making the overall system more accurate and efficient in processing only digital signals. This will offer weight savings in cables, harnesses and connector pin reduction. The design concept was to take the output from several on-engine sensors, carry out the signal conditioning, multiplexing, analogue to digital conversion and data transmission through a serial data bus. The unit has to meet the environmental requirements of DO-160 with the need to operate at 200°C, with short term operation at temperatures up to 250°C. The work undertaken has been to design an ASIC based on 1.0μm Silicon on Insulator (SOI) device technology incorporating sensor signal conditioning electronics for sensors including resistance temperature probes, strain gauges, thermocouples, torque and frequency inputs. The ASIC contains analogue multiplexers, temperature stable voltage band-gap reference and bias circuits, ADC, BIST, core logic, DIN inputs and two parallel ARINC 429 serial databuses. The ASIC was tested and showed to be functional up to a maximum temperature of 275°C. The ASIC has been integrated with other high temperature components including voltage regulators, a crystal oscillator, precision resistors, silicon capacitors within a hermetic hybrid package. The hybrid circuit has been assembled within a stainless steel enclosure with high temperature connectors. The high temperature electronics demonstrator has been shown to operate from −40°C to +250°C. This work has been carried out under the EU Clean Sky HIGHTECS project with the Project being led by Turbomeca (Fr) and carried out by GE Aviation Systems (UK), GE Research – Munich (D) and Oxford University (UK).
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Seo, Kyeong-Ho, Xue Zhang, Jaehoon Park i Jin-Hyuk Bae. "Numerical Approach to the Plasmonic Enhancement of Cs2AgBiBr6 Perovskite-Based Solar Cell by Embedding Metallic Nanosphere". Nanomaterials 13, nr 13 (23.06.2023): 1918. http://dx.doi.org/10.3390/nano13131918.
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Lead-free Cs2AgBiBr6 perovskites have emerged as a promising, non-toxic, and eco-friendly photovoltaic material with high structural stability and a long lifetime of carrier recombination. However, the poor-light harvesting capability of lead-free Cs2AgBiBr6 perovskites due to the large indirect band gap is a critical factor restricting the improvement of its power conversion efficiency, and little information is available about it. Therefore, this study focused on the plasmonic approach, embedded metallic nanospheres in Cs2AgBiBr6 perovskite solar cells, and quantitatively investigated their light-harvesting capability via finite-difference time-domain method. Gold and palladium were selected as metallic nanospheres and embedded in a 600 nm thick-Cs2AgBiBr6 perovskite layer-based solar cell. Performances, including short-circuit current density, were calculated by tuning the radius of metallic nanospheres. Compared to the reference devices with a short-circuit current density of 14.23 mA/cm2, when a gold metallic nanosphere with a radius of 140 nm was embedded, the maximum current density was improved by about 1.6 times to 22.8 mA/cm2. On the other hand, when a palladium metallic nanosphere with the same radius was embedded, the maximum current density was improved by about 1.8 times to 25.8 mA/cm2.
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Nawito, M., H. Richter, A. Stett i J. N. Burghartz. "A programmable energy efficient readout chip for a multiparameter highly integrated implantable biosensor system". Advances in Radio Science 13 (3.11.2015): 103–8. http://dx.doi.org/10.5194/ars-13-103-2015.
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Abstract. In this work an Application Specific Integrated Circuit (ASIC) for an implantable electrochemical biosensor system (SMART implant, Stett et al., 2014) is presented. The ASIC drives the measurement electrodes and performs amperometric measurements for determining the oxygen concentration, potentiometric measurements for evaluating the pH-level as well as temperature measurements. A 10-bit pipeline analog to digital (ADC) is used to digitize the acquired analog samples and is implemented as a single stage to reduce power consumption and chip area. For pH measurements, an offset subtraction technique is employed to raise the resolution to 12-bits. Charge integration is utilized for oxygen and temperature measurements with the capability to cover current ranges between 30 nA and 1 μA. In order to achieve good performance over a wide range of supply and process variations, internal reference voltages are generated from a programmable band-gap regulated circuit and biasing currents are supplied from a wide-range bootstrap current reference. To accommodate the limited available electrical power, all components are designed for low power operation. Also a sequential operation approach is applied, in which essential circuit building blocks are time multiplexed between different measurement types. All measurement sequences and parameters are programmable and can be adjusted for different tissues and media. The chip communicates with external unites through a full duplex two-wire Serial Peripheral Interface (SPI), which receives operational instructions and at the same time outputs the internally stored measurement data. The circuit has been fabricated in a standard 0.5-μm CMOS process and operates on a supply as low as 2.7 V. Measurement results show good performance and agree with circuit simulation. It consumes a maximum of 500 μA DC current and is clocked between 500 kHz and 4 MHz according to the measurement parameters. Measurement results of the on-chip ADC show a Differential Non Linearity (DNL) lower than 0.5 LSB, an Integral Non Linearity (INL) lower than 1 LSB and a Figure of Merit (FOM) of 6 pJ/conversion.
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Karadoğan, Betül, İbrahim Erden i Savaş Berber. "Asymmetric phthalocyanine compounds in the structure D-π-A containing cyano groups: Design, synthesis and dye-sensitized solar cell applications". Main Group Chemistry 20, nr 2 (22.07.2021): 155–63. http://dx.doi.org/10.3233/mgc-210018.
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In this study, asymmetric zinc phthalocyanine compounds with Donor-π-Anchor (D-π-A) property that enable the movement of electrons in molecular structure in one direction were synthesized. Phthalocyanines were designed to ensure electron mobility within the molecule and to facilitate the transfer of electrons to the TiO2 layer. The synthesized asymmetric zinc phthalocyanines (ZnPc-1 and ZnPc-2) are molecules with three donor biphenyls and one anchor aldehyde group and three acceptor/anchor cyano and one anchor aldehyde group, respectively. The effect of biphenyl and cyano groups on cell efficiency with aldehyde anchor group was investigated. The structure of the synthesized phthalocyanines was characterized by Fourier Transform Infrared Spectrometry (FTIR), Mass Spectrometry (MS), UV-vis, Fluorescence spectroscopy. The experimentally calculated optical band gap values were supported by the values found by Density Functional Theory (DFT) calculations. dye sensitive solar cells were measured and the efficiencies were evaluated with reference to the N719 standard dye. In the solar cell measurements of the designed phthalocyanines, the structure containing the cyano group has been given a higher photovoltaic cell thanks to the higher short circuit photo-current (Jsc). In this way, the highest power conversion efficiency value was achieved among the cyano group molecules.
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Das, Suman, Hengfei Gu, Lu Wang, Ayayi Ahyi, Leonard C. Feldman, Eric Garfunkel, Marcelo Kuroda i Sarit Dhar. "Nitrogen Annealing As a Sustainable Method for Interface Trap Passivation in 4H-SiC Mosfets". ECS Meeting Abstracts MA2022-02, nr 15 (9.10.2022): 817. http://dx.doi.org/10.1149/ma2022-0215817mtgabs.
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Silicon Carbide (4H-SiC) has emerged as a leading wide band gap semiconductor for high-power, high-temperature applications1. 4H-SiC metal-oxide semiconductor-field-effect transistors (MOSFETs) have lower power dissipation compared to silicon, allowing for low-noise and high-efficiency all-electric vehicle drives, fast-charging stations, solar inverters, and more. While these devices provide substantial advancements for next-generation energy efficient power systems, 4H-SiC may also offer additional functionality in the form of integrated circuits (ICs) at high temperatures (>300 °C). Because of its high noise immunity and low static power consumption, lateral complementary-metal-oxide-semiconductor (CMOS) IC technology in 4H-SiC is desirable for large-scale integration2. This technology necessitates the use of both n- and p-channel MOSFETs that can operate at high temperatures. Despite the advances of 4H-SiC MOSFETs, the high density of interface states (Dit) at the 4H-SiC/SiO2 interface prevents reaching full potential resulting in high channel resistance and low mobility. Alternatives to nitric oxide (NO) annealing, the most common method adopted to reduce Dit in 4H-SiC3,4, are actively sought due to its toxicity and relatively expensive cost. Annealing in pure nitrogen (N2)5,6 at high temperatures (1400 °C-1600 °C) has been recently demonstrated promising results for 4H-SiC MOSFET processing. In this work, we report Dit measurements consistent with [6] and attempt to correlate the nitrogen areal densities of the near interfacial regions with the Dit for high temperature N2 annealing processes compared to NO. In our study, metal oxide semiconductor capacitors were fabricated on p- and n-type 4H-SiC epitaxial layers. Gate oxides were thermally grown at 1150 °C for 10 h in dry O2 resulting in a ~ 60 nm thick oxide layer. Selected samples are then annealed in flowing N2 at high temperatures (1400 °C, 1 h; 1450 °C, 1 h; and 1500 °C, 30 minutes or 1 h) or NO (1175 °C, 2 h). X-ray photoelectron spectroscopy (XPS), carried out after etching the oxide, indicates that the amount of nitrogen at the interface due to high temperature N2 annealing is ~ 4 × higher than NO annealed devices. Simultaneous high frequency (100 kHz)- low frequency CV was performed to extract interface trap densities (Dit) for each process and compared at room temperature (27 °C) with reference 1175 °C, 2 h NO annealed samples. The comparison reveals that, N2 annealing at 1500 °C for 30 minutes with a flow rate of 3 LPM results in Dit values comparable to NO annealing across the bandgap. Moreover, nitrogen annealing is more effective in reducing Dit near the valence band than NO annealing, while the opposite is true close to the conduction band-edge, consistent with previous reports [6] and observed in atomistic models of these interfaces using the density functional theory7. Nitrogen annealing also decreases the positive fixed charges at the interface of p-type 4H-SiC and SiO2, as evidenced from the flat band voltage comparison. The oxide breakdown voltage for the devices made with 1500 °C N2 annealing was similar to that of NO annealed devices. XPS analysis of the N2 annealed devices, their behavior under high temperature and bias, and their potential to substitute NO will be further discussed. The authors gratefully acknowledge the support from the National Renewable Energy Laboratory/ US Department of Energy sub-contract NREL-AHL-9-92362-01. References: 1 T. Kimoto and J.A. Cooper, Fundamentals of Silicon Carbide Technology: Growth, Characterization, Devices and Applications (John Wiley & Sons, 2014). 2 D. Liu and C. Svensson, IEEE J. Solid-State Circuits 29, 663 (1994). 3 G. Liu, B.R. Tuttle, and S. Dhar, Appl. Phys. Rev. 2, 021307 (2015). 4 S. Das, T. Isaacs-Smith, A. Ahyi, M.A. Kuroda, and S. Dhar, J. Appl. Phys. 130, 225701 (2021). 5 A. Chanthaphan, T. Hosoi, T. Shimura, and H. Watanabe, AIP Adv. 5, 097134 (2015). 6 K. Tachiki and T. Kimoto, IEEE Trans. Electron Devices 68, 638 (2021). 7 L. Wang, S. Dhar, L.C. Feldman, and M.A. Kuroda, Phys. Status Solidi B 259, 2100224 (2022). Figure 1
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Daves, Glenn G. "Trends in Automotive Packaging". Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, DPC (1.01.2014): 001818–50. http://dx.doi.org/10.4071/2014dpc-keynote_th1_daves.
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The long-term trend in automobiles has been increasing electronics content over time. This trend is expected to continue and drives diverse functional, form factor, and reliability requirements. These requirements, in turn, are leading to changes in the package types selected and the performance specifications of the packages used for automotive electronics. Several examples will be given. This abstract covers the development of a distributed high temperature electronics demonstrator for integration with sensor elements to provide digital outputs that can be used by the FADEC (Full Authority Digital Electronic Control) system or the EHMS (Engine Health Monitoring System) on an aircraft engine. This distributed electronics demonstrator eliminates the need for the FADEC or EHMS to process the sensor signal, which will assist in making the overall system more accurate and efficient in processing only digital signals. This will offer weight savings in cables, harnesses and connector pin reduction. The design concept was to take the output from several on-engine sensors, carry out the signal conditioning, multiplexing, analogue to digital conversion and data transmission through a serial data bus. The unit has to meet the environmental requirements of DO-160 with the need to operate at 200°C, with short term operation at temperatures up to 250°C. The work undertaken has been to design an ASIC based on 1.0 μm Silicon on Insulator (SOI) device technology incorporating sensor signal conditioning electronics for sensors including resistance temperature probes, strain gauges, thermocouples, torque and frequency inputs. The ASIC contains analogue multiplexers, temperature stable voltage band-gap reference and bias circuits, ADC, BIST, core logic, DIN inputs and two parallel ARINC 429 serial databuses. The ASIC was tested and showed to be functional up to a maximum temperature of 275°C. The ASIC has been integrated with other high temperature components including voltage regulators, a crystal oscillator, precision resistors, silicon capacitors within a hermetic hybrid package. The hybrid circuit has been assembled within a stainless steel enclosure with high temperature connectors. The high temperature electronics demonstrator has been demonstrated operating from −40°C to +250°C. This work has been carried out under the EU Clean Sky HIGHTECS project with the Project being led by Turbomeca (Fr) and carried out by GE Aviation Systems (UK), GE Research – Munich (D) and Oxford University (UK).
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Farzan Moghaddam, Ali, i Alex Van den Bossche. "A Smart High-Voltage Cell Detecting and Equalizing Circuit for LiFePO4 Batteries in Electric Vehicles". Applied Sciences 9, nr 24 (10.12.2019): 5391. http://dx.doi.org/10.3390/app9245391.
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A battery management system (BMS) plays an important role in electric vehicles (EVs) in order to achieve a reasonable-lasting lifetime. An equalizing method is essential in order to obtain the best performance. A monitoring system is required to check if any cell voltage is high or low. In this paper, an equalizing and monitoring system for an ultra-light electric vehicle is proposed. The monitoring system detects if one cell is fully charged or all cells are fully charged and the equalizing system tops each cell at the desired voltage. To solve this issue, a light-emitting diode (LED) band gap is used as a voltage reference to inform the user if any cell is at its high voltage. A smart monitoring displays on the liquid crystal display (LCD), if one cell is high or all cells are high. This detection also provides a signal to the microcontroller to turn on/off the charger if all cells are high. Also, a Bluetooth module was designed to command the microcontroller the charger to turn on/off via voice/text message by using a smartphone. Additionally, a new smart monitoring system based on the Bluetooth model (HC05) and mobile app has been made in order to monitor individual cell voltage. A major feature of the system is to draw a very-low current, so that the system does not contribute significantly to the self-discharge of the battery and the circuit does not need sophisticated control. Manufacturers of large electric vehicles may have more intelligent systems that may require a permanent connection to the grid and allow high standby losses, where more state of charge (SOC) may be lost per day. The paper is rather focused on reducing the standby losses, and to activate the equalizer only when charging and/or driving. The experimental results are performed in order to verify the feasibility of the proposed circuit.
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Lian, Ziyang, Hongping Hu, Longxiang Dai, Yuxing Liang, Bin Luo i Xuedong Chen. "Coupling between two kinds of band gaps of a shunted tube piezoelectric phononic crystal". Journal of Intelligent Material Systems and Structures 28, nr 16 (24.01.2017): 2153–66. http://dx.doi.org/10.1177/1045389x16685437.
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A tube-type piezoelectric phononic crystal model is proposed to study interaction between locally resonant and Bragg band gaps, which is arrayed periodically by metal and piezoelectric segments. Each piezoelectric segment consists of a shell with series-connected and opposite directions polarized double layers and a resonant shunting circuit. According to the interaction between Bragg scattering and local electromagnetic oscillation, three regions corresponding to the inductance can be divided as follows: quasi-short circuits region, coupling region, and quasi-open circuits region. Some interesting phenomena are found from the coupling between Bragg scattering and locally resonant of electromagnetic oscillation. (1) In the coupling region, a pass band splits a Bragg band gap into two band gaps. But the cut-off frequency of the second band gap does not change with the inductance. (2) In the quasi-open circuits region, Bragg and locally resonant band gaps exist independently. (3) The first band gap transits from Bragg scattering to local resonance when the inductance increases from quasi-short circuits region to quasi-open circuits region. (4) The cut-off frequency of the first band gap is always less than the estimated resonant frequency of inductor-capacitor oscillators. Finally, the theoretical result is validated by two kinds of finite element models based on ANSYS.
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Naranjo, Santiago, Lina Castañeda, Luis Daniel Salazar Hoyos, Carlos Ignacio Sanchez i Luisa Maria Alvarez Gonzalez. "Synthesis of ZnO Nanorods-Based Photoanode and Electrochemical Characterization for Azoic Dyes Degradation: Reactive Red 239 Study Case". ECS Meeting Abstracts MA2022-02, nr 54 (9.10.2022): 2012. http://dx.doi.org/10.1149/ma2022-02542012mtgabs.
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The use of solar energy as an energy vector has been a subject of great interest and study in recent years, showing vast improvements in the efficiencies associated with the conversion to electrical energy. This interest has extended to various applications, among which the production of green hydrogen from the decomposition of water and in environmental remediation processes stand out. The main motivation in focusing the use of solar energy in photoelectrocatalytic degradation processes is the negative impact that the disposal of colored water has on the different effluents, causing a deterioration of the quality of these ecosystems and the death of many forms of life. In this sense, the application of semiconductors based on zinc oxide (ZnO) supported on FTO conductive glass was studied for the treatment of wastewater from the textile industry, contaminated with reactive red azo dye 239. The main motivation in focusing the use of solar energy in photoelectrocatalytic degradation processes is the negative impact that the disposal of colored water effluents has on the different ecosystems, causing a deterioration of the quality of these ecosystems and the death of many forms of life. In this sense, the application of semiconductors based on zinc oxide (ZnO) supported on FTO was studied for the treatment of wastewater from the textile industry, contaminated with reactive red azo dye 239. In the present writing, a process for the synthesis of a ZnO-based semiconductor was defined. This precedence was performed directly on the substrate of 15x15x1.1mm FTO conductive glass plates. Prior to the synthesis process, a pretreatment of the glass is performed. The pretreatment of the plates consists of washing with neutral soap, then immersion in 0.01 M nitric acid (HNO3) for 10 minutes, and finally, cleaning with deionized water in ultrasound for 10 minutes. The synthesis of the nanostructured ZnO was performed in two steps. First, a chronoamperometric electrodeposition of the ZnO seeds on the substrate at a fixed potential of -1.38 V vs. Ag/AgCl as reference, and a platinum electrode as counter electrode, was performed at 70ºC for 200 seconds with a Gamry® Interface 1000 potentiostat, then subjected to a heating period at 400ºC for 2 hours. After electronucleation of the seeds and heat treatment, an additional step is carried out, which is the chemical growth of ZnO, waiting for the formation of ZnO nanorods in the (100), (002) and (101) planes typical of the wurtzite structure, this is done in a zinc nitrate solution at 90ºC, pH > 13.5, for 75 minutes. In the semiconductor characterization, different electrochemical techniques such as cyclic voltammetry, electrochemical impedance spectroscopy and anodic linear scanning were evaluated. At the same time, the response of the photoanode to illumination with a 350 W xenon arc lamp was studied, showing the remarkable effect of light on the generation of charge carriers, decreasing recombination, and increasing photocurrents. On the other hand, the density of charge carriers in the semiconductor was evaluated and defined, as well as the position of the valence and conduction bands and their respective band gap. The charge carrier density was determined from Mott-Schottky, finding densities of 6.25x1021 and 3.72x1021 carriers/cm3, for frequencies of 500 and 1000 Hz, respectively. In parallel, the flat band potential, which under certain circumstances of charge carrier density can approximate the conduction band potential, was evaluated. This was estimated from three methods, Mott-Schottky (500 and 1000 Hz), photocurrent onset potential and open circuit potential, finding values of -0.086 and -0.124 (at 500 and 1000 Hz), -0.121 and -0.161 V vs. Ag/AgCl, respectively. The determination of the bad gap was performed from UV-VIS, obtaining a value of 3.13 eV. Finally, the discoloration of the solution was evaluated from UV-VIS measurements. This analysis was performed on a problem solution that resembles the concentration of dye and salts of a textile industry effluent. A ZnO electrode was used, with a defined working area of 1.30 cm2, and a dye volume of 25 mL. The experiment was carried out for a time period of 4 hours, and an applied potential of 1 V vs. Ag/AgCl/Cl- 3M, reaching a decolorization of 23.2% of the initial solution.
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Lemmon, Andrew, Michael Mazzola, James Gafford i Christopher Parker. "Instability in Half-Bridge Circuits Switched With Wide Band-Gap Transistors". IEEE Transactions on Power Electronics 29, nr 5 (maj 2014): 2380–92. http://dx.doi.org/10.1109/tpel.2013.2273275.
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Bauer, James, i Sajeev John. "Molding light flow from photonic band gap circuits to microstructured fibers". Applied Physics Letters 90, nr 26 (25.06.2007): 261111. http://dx.doi.org/10.1063/1.2752732.
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Park, Jeongpyo, i Changsik Yoo. "Band-gap Reference Voltage Generator Insensitive to Mismatch Variation". Journal of the Institute of Electronics and Information Engineers 54, nr 12 (31.12.2017): 27–32. http://dx.doi.org/10.5573/ieie.2017.54.12.27.
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Nasre, Vrushali G., i G. M. Asutkar G. M. Asutkar. "CMOS Band Gap Reference (BGR) Design Techniques: A Review". Indian Journal of Applied Research 3, nr 8 (1.10.2011): 235–38. http://dx.doi.org/10.15373/2249555x/aug2013/76.
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Clark, David T., Ewan P. Ramsay, A. E. Murphy, Dave A. Smith, Robin F. Thompson, R. A. R. Young, Jennifer D. Cormack, C. Zhu, S. Finney i John Fletcher. "High Temperature Silicon Carbide CMOS Integrated Circuits". Materials Science Forum 679-680 (marzec 2011): 726–29. http://dx.doi.org/10.4028/www.scientific.net/msf.679-680.726.
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The wide band-gap of Silicon Carbide (SiC) makes it a material suitable for high temperature integrated circuits [1], potentially operating up to and beyond 450°C. This paper describes the development of a 15V SiC CMOS technology developed to operate at high temperatures, n and p-channel transistor and preliminary circuit performance over temperature achieved in this technology.
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Yang, Fei-Ran, Yongxi Qian, Roberto Coccioli i Tatsuo Itoh. "Analysis and Application of Photonic Band-Gap (PBG) Structures for Microwave Circuits". Electromagnetics 19, nr 3 (maj 1999): 241–54. http://dx.doi.org/10.1080/02726349908908642.
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Shen, Fengfu, Ge Zhu, Qing Shi i Zengtao Lv. "Manipulation of negative-index collimation beam using band-gap guidance". European Physical Journal Applied Physics 82, nr 1 (kwiecień 2018): 10401. http://dx.doi.org/10.1051/epjap/2018170212.
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We manipulate the source distance, emission position and number of negative-index collimation beam in a two-dimensional hybrid sonic crystal by using band-gap waveguide to control the flow of acoustic waves from a point source. The desired beam manipulations can be achieved at many different frequencies by suitably selecting the first order resonant mode of two crystal components and the waveguide structures. These results have potential applications in acoustic mutifunctional directional emission and acoustic integrated circuits. The proposed approach is also applicable for the similar manipulations of other types of acoustic collimation beams.
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Chen, Shengbing. "Wave propagation in acoustic metamaterials with resonantly shunted cross-shape piezos". Journal of Intelligent Material Systems and Structures 29, nr 13 (31.05.2018): 2744–53. http://dx.doi.org/10.1177/1045389x18778367.
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Cross-shape piezoelectric patches were originally proposed to improve the band-gap properties of acoustic metamaterials with shunting circuits. The dispersion curves are characterized through the application of finite element method. Also, the theoretical band-gap predictions are verified by simulation results obtained from COMSOL. The investigation results show that the proposed scheme distinguishes itself from the conventional square patches by broader band gaps, whose bandwidth is almost doubled. The inherent capacitance of the piezoelectric patch is strongly related to the boundary conditions, so the local resonant band gap is strongly affected by the shape of piezoelectric patches as well. As a result, the band-gap width and location of metamaterials with different shape patches are rather different, even with the same size patches. Also, negative modulus (NM) and Poisson’s ratio were observed around the resonant frequencies. The transmission properties of finite periods agree well with band-gap predictions. An obvious attenuation zone (AZ) is produced around the band-gap location, in which the wave propagation is decayed strongly. Similarly, the width of AZ of the proposed metamaterial is much larger than that of the conventional one. Hence, the proposed scheme demonstrates more advantages in the application to vibration isolation when compared with the conventional.
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Wang, Faze, Enyi Hu, Jun Wang, Lei Yu, Soonpa Hong, Jung-Sik Kim i Bin Zhu. "Tuning La2O3 to high ionic conductivity by Ni-doping". Chemical Communications 58, nr 27 (2022): 4360–63. http://dx.doi.org/10.1039/d1cc07183a.
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Ultra-wide band gap semiconductor La2O3 is tuned into a high ionic conductivity material via Ni-doping. The energetic properties are studied experimentally and theoretically. Schottky junction is proposed to interpret the avoidance of short circuits.
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Zhou, Sui Hua, Shi Min Feng i Zhi Yi Chen. "A Single Side-Band Modulation Circuit in Underwater Electric Current Communication". Advanced Materials Research 712-715 (czerwiec 2013): 1737–40. http://dx.doi.org/10.4028/www.scientific.net/amr.712-715.1737.
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On the basis of the carrier has a low frequency in underwater electric current communication, carrier phase shift network, low frequency wide band phase shift network and multiplier circuit were designed to realize the single side-band (SSB) modulation. The circuits were designed and debugged. Through testing the actual circuits, sideband suppression ratio obtains 36dB which can satisfy the underwater electric current communication system. It will be stated reference on actual application for SSB modulation with low carrier frequency using phase shift method.
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Keßler, P., K. Lorenz i R. Vianden. "Implanted Impurities in Wide Band Gap Semiconductors". Defect and Diffusion Forum 311 (marzec 2011): 167–79. http://dx.doi.org/10.4028/www.scientific.net/ddf.311.167.
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Wide band gap semiconductors, mainly GaN, have experienced much attention due to their application in photonic devices and high-power or high-temperature electronic devices. Especially the synthesis of InxGa1-xN alloys has been studied extensively because of their use in LEDs and laser diodes. Here, In is added during the growth process and devices are already very successful on a commercial scale. Indium in nitride ternary and quaternary alloys plays a special role; however, the mechanisms leading to more efficient light emission in In-containing nitrides are still under debate. Therefore, the behaviour of In in GaN and AlN, the nitride semiconductor with the largest bandgap is an important field of study. In is also an important impurity in another wide band gap semiconductor – the II-VI compound ZnO where it acts as an n-type dopant. In this context the perturbed angular correlation technique using implantation of the probe111In is a unique tool to study the immediate lattice environment of In in the wurtzite lattice of these wide band gap semiconductors. For the production of GaN and ZnO based electronic circuits one would normally apply the ion implantation technique, which is the most widely used method for selective area doping of semiconductors like Si and GaAs. However, this technique suffers from the fact that it invariably produces severe lattice damage in the implanted region, which in nitride semiconductors has been found to be very difficult to recover by annealing. The perturbed angular correlation technique is employed to monitor the damage recovery around implanted atoms and the properties of hitherto known impurity – defect complexes will be described and compared to proposed structure models.
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Kumar, Anup, Pawan Heera, P. B. Baraman i Raman Sharma. "Investigative Study of Optical Parameters of Se80.5Bi1.5Te18-yAgy Thin Films". Materials Science Forum 710 (styczeń 2012): 739–44. http://dx.doi.org/10.4028/www.scientific.net/msf.710.739.
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The optical constants, like absorption coefficient (α), optical band gap (Eg) and refractive index (n), in Se80.5Bi1.5Te18-yAgy (y= 0, 1.0 and1.5) thin films are calculated using well known Swanepoel’s method in the spectral range of 600-2000 nm. The optical band gap has been estimated by using Tauc’s extrapolation method and is found to increase with increase in Ag content. The present results shows that the large value of nonlinear refractive index and good transparency of these thin films will make them a very promising materials for optical integrated circuits in the optical communication systems.
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Zhu, Yan, i Mantu K. Hudait. "Low-power tunnel field effect transistors using mixed As and Sb based heterostructures". Nanotechnology Reviews 2, nr 6 (1.12.2013): 637–78. http://dx.doi.org/10.1515/ntrev-2012-0082.
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AbstractReducing supply voltage is a promising way to address the power dissipation in nano-electronic circuits. However, the fundamental lower limit of subthreshold slope (SS) within metal oxide semiconductor field effect transistors (MOSFETs) is a major obstacle to further scaling the operation voltage without degrading ON/OFF ratio in current integrated circuits. Tunnel field-effect transistors (TFETs) benefit from steep switching characteristics due to the quantum-mechanical tunneling injection of carriers from source to channel, rather than by conventional thermionic emission in MOSFETs. TFETs based on group III-V compound semiconductor materials further improve the ON-state current and reduce SS due to the low band gap energies and smaller carrier tunneling mass. The mixed arsenide/antimonide (As/Sb) InxGa1-xAs/GaAsySb1-y heterostructures allow a wide range of band gap energies and various staggered band alignments depending on the alloy compositions in the source and channel materials. Band alignments at source/channel heterointerface can be well modulated by carefully controlling the compositions of the mixed As/Sb material system. In particular, this review introduces and summarizes the progress in the development and optimization of low-power TFETs using mixed As/Sb based heterostructures including basic working principles, design considerations, material growth, interface engineering, material characterization, device fabrication, device performance investigation, band alignment determination, and high temperature reliability. A review of TFETs using mixed As/Sb based heterostructures shows superior structural properties and distinguished device performance, both of which indicate the mixed As/Sb staggered gap TFET as a promising option for high-performance, low-standby power, and energy-efficient logic circuit application.
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Et. al., Suresh Akkole,. "DESIGN OF SQUARE MICROSTRIP PATCH MULTI BAND ANTENNA FOR WIRELESS COMMUNICATION USING EBG STRUCTURE". INFORMATION TECHNOLOGY IN INDUSTRY 9, nr 2 (13.04.2021): 1086–89. http://dx.doi.org/10.17762/itii.v9i2.456.
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Application of electromagnetic band-gap (EBG) structure and its use in the design of antenna and microwave integrated circuits is becoming more attractive. The recent electromagnetic band-gap structure method is capturing more importance in antenna design due to its uniqueness properties to suppress the propagation of surface waves in microstrip patch antenna. In this paper a square microstrip antenna is designed and its performance parameters are compared with geometry designed on EBG structure. The square antenna of 29 mm x29 mm size is designed at 2.455 GHz and analysis is done using IE3D simulation software. The proposed work mainly focuses on modification of antenna using electronic band gap structure (EBG). The antenna parameters such as Return loss, VSWR, Gain and Bandwidth, with and without EBG are obtained using IE3D simulation tool. The Electromagnetic band-gap structures have been used to improve the performance of the gain of the antennas and radiation patterns. One of the main advantages of electromagnetic band-gap structure is its ability to suppress the surface wave current present on the microstrip antenna. Combining the square patch with EBG structure, the bandwidth of the antenna has been increased by 34.66%, and attained gain of 44.44% at resonant frequency around 2.4 GHz as compared to the antenna without EBG..
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Singh, Shakti, Nourhan El Sayed, Hazem Elgabra, Tamador ElBoshra, Maisam Wahbah i Mariam Al Zaabi. "Modeling of High Performance 4H-SiC Emitter Coupled Logic Circuits". Materials Science Forum 778-780 (luty 2014): 1009–12. http://dx.doi.org/10.4028/www.scientific.net/msf.778-780.1009.
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SiC, a wide band gap semiconductor, is capable of robust operation at temperatures well above 600°C. SiC bipolar transistors are well suited for applications at high temperatures as, unlike MOSFET, it does not have a critical gate oxide, and hence oxide reliability at high temperatures is not an issue. In this paper, the design of optimized emitter coupled logic technology circuits using 4H-SiC bipolar transistors is presented. The circuits work over a wide range of temperatures and power supply voltages at high speeds, demonstrating the potential of robust high speed ECL integrated circuits in SiC for small-scale logic applications.
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Marani, Roberto, i Anna Gina Perri. "A Review on the Study of Temperature Effects in the Design of A/D Circuits based on CNTFET". Current Nanoscience 15, nr 5 (19.07.2019): 471–80. http://dx.doi.org/10.2174/1573413714666181009125058.
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In this paper, we review a procedure to study the effects of temperature in the design of A/D circuits based on CNTFETs. At first, we briefly describe a compact model, already proposed by us, in which the temperature variation in the drain current equation and in energy band gap is considered. Then, the effects of temperature variations in the design of analog circuits, such as a cascode current sink mirror and an Operational Transconductance Amplifier (OTA), and in the design of digital circuits including in particular NAND and NOR logic gates, are illustrated and widely discussed.
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Klatt, Michael A., Paul J. Steinhardt i Salvatore Torquato. "Phoamtonic designs yield sizeable 3D photonic band gaps". Proceedings of the National Academy of Sciences 116, nr 47 (6.11.2019): 23480–86. http://dx.doi.org/10.1073/pnas.1912730116.
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We show that it is possible to construct foam-based heterostructures with complete photonic band gaps. Three-dimensional foams are promising candidates for the self-organization of large photonic networks with combinations of physical characteristics that may be useful for applications. The largest band gap found is based on 3D Weaire–Phelan foam, a structure that was originally introduced as a solution to the Kelvin problem of finding the 3D tessellation composed of equal-volume cells that has the least surface area. The photonic band gap has a maximal size of 16.9% (at a volume fraction of 21.6% for a dielectric contrast ε=13) and a high degree of isotropy, properties that are advantageous in designing photonic waveguides and circuits. We also present results for 2 other foam-based heterostructures based on Kelvin and C15 foams that have somewhat smaller but still significant band gaps.
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Uma Maheswari Y, Amudha A i Ashok Kumar L. "A Review on EMI Issues in High speed Designs and Solutions". Journal of Electronics, Electromedical Engineering, and Medical Informatics 4, nr 4 (29.10.2022): 191–203. http://dx.doi.org/10.35882/jeeemi.v4i4.253.
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As data speed on printed circuit boards have increased, new difficulties have evolved and necessitating the development of new analytical methodologies and solutions. It will be necessary to continue research in order to keep up with the ever-increasing data rates and smaller form factors. The literature and issue pertaining to the EMI/EMC of printed circuit boards are reviewed in detail in this paper for the purpose of providing an overview and to assist people looking for more extensive references related to this area. This review includes EMI issues related to high speed PCB, EMI measurement techniques using software and hardware and solution for the EMI issues. Also reviewed the use of electromagnetic band gap (EBG) technology to minimize electromagnetic interference (EMI). In recent years, there have been a number of articles describing the several uses of EBG for the purpose of blocking undesired radiation at discontinuities. Various EBG structure performances with its applications are analysed and detailed.
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Wang, Chuanlong, Xiongliang Yao, Guoxun Wu i Li Tang. "Vibration Band Gap Characteristics of Two-Dimensional Periodic Double-Wall Grillages". Materials 14, nr 23 (25.11.2021): 7174. http://dx.doi.org/10.3390/ma14237174.
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In this article, the wave finite element method (WFEM) is used to calculate the band gap characteristics of two-dimensional (2D) periodic double-wall grillages (DwGs), which are verified by the grillage model vibration measurement experiment and finite element calculation. To obtain the band gap characteristics of periodic DwGs, the finite element calculation model is established according to the lattice and energy band theory and the characteristic equation of the periodic unit cell under the given wave vector condition is solved based on Bloch theorem. Then, the frequency transfer functions of finite-length manufactured and finite element models are obtained to verify the band gap characteristics of periodic DwGs. Finally, the effects of material parameters and structural forms on band gap characteristics and transfer functions are analyzed, which can provide a reference for engineering structure vibration and noise reduction design.
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Guo, Hui, Yaru Zhang, Tao Yuan, Pei Sun Qian, Qian Cheng i Yansong Wang. "Vibration Attenuation Optimization in a Rod With Different Periodic Piezoelectric Shunting Configurations". International Journal of Acoustics and Vibration 26, nr 3 (30.09.2021): 212–20. http://dx.doi.org/10.20855/ijav.2021.26.31751.
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Wave propagation control in piezoelectric meta-materials has been extensively investigated in recent years due to its significant effects on elastic wave attenuation. In this work, a novel piezoelectric meta-material rod connected to three configurations of shunting circuits is proposed for broad band gaps. The numerical model is constructed to predict the band gap, attenuation constant, and vibration transmission. For larger attenuation within the band gaps, the shunting circuit parameters are optimized with a genetic algorithm. The result shows that the structure with the optimized parameters provides prominent vibration control ability. Both the attenuation constant and the width of the band gaps are enlarged.
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CONTI, CLAUDIO, GAETANO ASSANTO i STEFANO TRILLO. "GAP SOLITONS AND SLOW LIGHT". Journal of Nonlinear Optical Physics & Materials 11, nr 03 (wrzesień 2002): 239–59. http://dx.doi.org/10.1142/s0218863502001000.
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Optical nonlinearity and feedback through Bragg periodicity are the basic ingredients for light localization into gap solitons. We review the basic concepts and model equations for gap solitons in Kerr and quadratic nonlinear media encompassing a one-dimensional Bragg resonance. With specific regard to frequency doubling media, we generalize the concept of a photonic crystal to band-gaps of a nonlinear origin, and finally address the slow character of quadratic gap-solitons with reference to their excitation.
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Tripathi, S., R. Brajpuriya, C. Mukharjee i S. M. Chaudhari. "Determination of band gap in polycrystalline Si/Ge thin film multilayers". Journal of Materials Research 21, nr 3 (1.03.2006): 623–31. http://dx.doi.org/10.1557/jmr.2006.0096.
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The valence band (VB) photoemission supported by ultraviolet–visible–near infrared spectroscopy techniques were used to determine the band gap values of polycrystalline Si and Ge single layers as well as of Si/Ge multilayer structures. The band gap values obtained from VB photoemission measurements for these structures were found to be much larger than their corresponding bulks and to match well with those determined from standard optical absorption measurements. In each case, the VB offset values were obtained by considering the corresponding VB maximum as a reference. The increase in band gap in case of thin single layers of Si and Ge with respect to bulks were interpreted in terms of quantum confinement effect, while in case of multilayer sample, the effect of various factors such as (i) intermixing leading to the formation of SiGe alloy, (ii) roughness at the interface, (iii) particle size, and (iv) strain seem to play an important role in the observed change in band gap.
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Zhang, Fu Chun, Ying Gao, Hong Wei Cui, Xing Xiang Ruan i Wei Hu Zhang. "First-Principles Study on Electronic Structure of 15R-SiC Polytypes". Advanced Materials Research 971-973 (czerwiec 2014): 77–80. http://dx.doi.org/10.4028/www.scientific.net/amr.971-973.77.
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To study the geometrical and electronic structure of 15R-SiC polytypes, the lattice parameter, band structure, density of states (DOS) and charge density of 15R-SiC are calculated by using density functional theory based on the plane wave pseudopotential approach, and electronic structure and ground properties of 15R-SiC are investigated by the calculated band structure and DOS, the results show that 15R-SiC is an indirect band gap semiconductor, with calculated indirect band gap width being 2.16 eV and band gap dependent on Si 3p and C 2p states. While charge density results show that Si-C bond is a hybrid bond semiconductor strong in covalent bond and weak in ionicity, characterized by intense sp3 hybrid characteristics, which is in accordance with the experimental results. The above mentioned results are considered as theoretical reference for design and application of SiC polytype materials.
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Shi, Ling-feng, i Bin Hou. "A Novel Compact Electromagnetic Band-gap Structure Using for SSN Suppression in High Speed Circuits". Journal of Electronics & Information Technology 33, nr 9 (30.09.2011): 2283–86. http://dx.doi.org/10.3724/sp.j.1146.2011.00022.
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Liu, Shuo, Wenlong Gao, Qian Zhang, Shaojie Ma, Lei Zhang, Changxu Liu, Yuan Jiang Xiang, Tie Jun Cui i Shuang Zhang. "Topologically Protected Edge State in Two-Dimensional Su–Schrieffer–Heeger Circuit". Research 2019 (5.02.2019): 1–8. http://dx.doi.org/10.34133/2019/8609875.
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Topological circuits, an exciting field just emerged over the last two years, have become a very accessible platform for realizing and exploring topological physics, with many of their physical phenomena and potential applications as yet to be discovered. In this work, we design and experimentally demonstrate a topologically nontrivial band structure and the associated topologically protected edge states in an RF circuit, which is composed of a collection of grounded capacitors connected by alternating inductors in the x and y directions, in analogy to the Su–Schrieffer–Heeger model. We take full control of the topological invariant (i.e., Zak phase) as well as the gap width of the band structure by simply tuning the circuit parameters. Excellent agreement is found between the experimental and simulation results, both showing obvious nontrivial edge state that is tightly bound to the circuit boundaries with extreme robustness against various types of defects. The demonstration of topological properties in circuits provides a convenient and flexible platform for studying topological materials and the possibility for developing flexible circuits with highly robust circuit performance.