Tesi sul tema "Dispositifs CMOS et integration"
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Dubreuil, Théophile. "Architecture 3D 1T1R innovante à base de RRAMs pour le calcul hyperdimensionnel". Electronic Thesis or Diss., Université Grenoble Alpes, 2023. http://www.theses.fr/2023GRALT085.
Testo completoIn the years to come, due to the insatiable need for data-intensive machine learning applications, a drastic expansion of computing power is required to confront a veritable “data deluge”. To meet this challenge, high-performance In-Memory-Computing (IMC) architectures require the development of novel storage devices that are also suited for local computations. In this context, this thesis work presents a novel 3D 1T1R memory array derived from vertically stacked-nanosheet technology, which is used for Hyperdimensional Computing (HDC), an error-resilient and highly parallel brain-inspired computing paradigm. Firstly, the IMC paradigm can greatly benefit from novel 3D non-volatile memory (NVM) architectures which increase the density and the computing performances. However, the fabrication challenges and parasitics can greatly limit the potential benefits of these architectures. With the 3D 1T1R technology, made by coupling new disruptive gate-independent stacked-nanosheets with drain-based RRAM cells, we show that some of these issues can be overcome, thus leading to high-density 3D NVM arrays. We demonstrate various technological modules necessary for the fabrication of 3D 1T1R structures. Devices are fabricated and electrically characterized for both storage and computing applications. In particular, functional MEOL drain-based RRAM cells are demonstrated with a doped-Si bottom electrode for various types of selector technologies. Finally, we propose a full-IMC architecture of HDC to take advantage of the 3D 1T1R structure. Different hardware implementations are proposed and compared with SPICE simulations. We also show with software-based simulations that language and gesture recognition can be realistically performed with our 3D 1T1R implementation
Charbonneau, Micaël. "Etude et développement de points mémoires résistifs polymères pour les architectures Cross-Bar". Thesis, Grenoble, 2012. http://www.theses.fr/2012GRENT116/document.
Testo completoOver the past decade, non-volatile Flash storage technologies have played a major role in the development of mobile electronics and multimedia (MP3, Smartphone, USB, ultraportable computers ...). To further enhance performances, increase the capacity and reduce manufacturing costs, new technological solutions are now studied to provide complementary solutions or replace Flash technology. Cited by ITRS, the polymer resistive memories present very promising characteristics: low cost processing and ability for integration at high densities above CMOS interconnections or on flexible substrate. This PhD specifically focused on the development and study of composite material made of Poly-Methyl-Methacrylate (PMMA) polymer resist doped with C60 fullerene molecules. Studies were carried out on three different axes in parallel: Composite materials development & characterization, integration of the organic material in specific test structure and advanced devices and finally detailed electrical characterization of memory cells and performances analysis
Cassé, Mikaël. "Caractérisation Électrique et Modélisation du Transport dans les Dispositifs CMOS Avancés". Habilitation à diriger des recherches, Université de Grenoble, 2014. http://tel.archives-ouvertes.fr/tel-00974652.
Testo completoLee, Sang Bruno. "Développement de procédés technologiques pour une intégration 3D monolithique de dispositifs nanoélectroniques sur CMOS". Thèse, Université de Sherbrooke, 2016. http://hdl.handle.net/11143/8955.
Testo completoAbstract : The single electron transistor (SET) is a nanoelectronic device very attractive due to its ultra-low power consumption and its high integration density, but he is not capable of completely replace CMOS technology. Nevertheless, the hybridization of these two technologies is an interesting approach since it combines the advantages of both technologies, in order to obtain circuits with new and unique functionalities. This thesis deals with the 3D monolithic integration of nanodevices in the back-end-ofline (BEOL) of a CMOS chip. This approach gives the opportunity to build hybrid circuits and to add value to CMOS chips without fundamentally changing the process fabrication of MOS transistors. This study is based on the nanodamascene process developed at UdeS, which is used to fabricate nanoelectronic devices on a SiO2 layer. This document presents the work done on the nanodamascene process optimization, in order to make it compatible with the BEOL of CMOS circuits. The development of plasma etching processes has been required to fabricate metallic and dielectric nanostructures useful to the fabrication of nanodevices. MIM junctions and metallic SET have been fabricated with the new reverse nanodamascene process on a SiO2 substrate. Electrical characterizations of MIM devices and SET formed with TiN/Al2O3 junctions have shown trap sites in the dielectric and a functional SET at low temperature (1.5 K). The transfer process on CMOS substrate and the vertical interconnection process have also been developed. Finally, a 3D circuit consisting of a titanium nanowire connected to a MOS transistor is fabricated and is functional. The results obtained during this thesis prove that the co-integration of nanoelectronic devices in the BEOL of a CMOS chip is possible, using a compatible process.
Lim, Tek Fouy. "Dispositifs de protection contre les décharges électrostatiques pour les applications radio fréquences et millimétriques". Thesis, Grenoble, 2013. http://www.theses.fr/2013GRENT033/document.
Testo completoAdvanced CMOS technologies provide an easier way to realize radio-frequency integrated circuits (RFICs). However, the lithography dimension shrink make electrostatic discharges (ESD) issues become more significant. Specific ESD protection devices are embedded in RFICs to avoid any damage. Unfortunately, ESD protections parasitic capacitance limits the operating bandwidth of RFICs. ESD protection size dimensions are also an issue for the protection of RFICs, in order to avoid a significant increase in production costs. This work focuses on a broadband ESD solution (DC-100 GHz) able to be implemented in an I/O pad to protect RFICs in advanced CMOS technologies. Thanks to the signal transmission properties of coplanar / microstrip lines, a broadband ESD solution is achieved by implementing ESD components under a transmission line. The silicon proved structure is broadband; it can be used in any RF circuits and fulfill ESD target. The physical dimensions also enable easy on-chip integration
Le, Goulven Katell. "Dispositifs institutionnels et integration des marches la commercialisation du porc au vietnam". Montpellier, ENSA, 2000. http://www.theses.fr/2000ENSA0012.
Testo completoMaggioni, Mezzomo Cécilia. "Caractérisation et modélisation des fluctuations aléatoires des paramètres électriques des dispositifs en technologies CMOS avancées". Phd thesis, Université de Grenoble, 2011. http://tel.archives-ouvertes.fr/tel-00987632.
Testo completoMaggioni, Mezzomo Cecilia. "Caractérisation et modélisation des fluctuations aléatoires des paramètres électriques des dispositifs en technologies CMOS avancées". Thesis, Grenoble, 2011. http://www.theses.fr/2011GRENT044/document.
Testo completoThis research characterizes and models the mismatch of electrical parameters in advanced MOS transistors. All characterizations are made through a test structure, which is experimentally validated using a structure based on Kelvin method. A model, valid in the linear region, is proposed. It is used for modeling the threshold voltage fluctuations of the transistors with pocket-implants, for any transistor length and gate voltage. It gives a deep understanding of the mismatch, especially for devices with non-uniform channel. Another study analyzes the mismatch of the drain current by characterizing and modeling in terms of the drain voltage. A second model is then proposed for transistors without pocket-implants. In order to apply this model, the correlation of threshold voltage fluctuations and mobility fluctuations must be considered. Characterizations are also performed on transistors with pocket-implants, showing a new drain current mismatch behavior for long transistors. Finally, characterizations are made to analyze the impact of gate roughness fluctuations on mismatch
Hossri, Nabil al. "Etude du phénomène métastable dans les dispositifs bistables de technologie CMOS modélisation, caractérisation et simulation". Grenoble 2 : ANRT, 1986. http://catalogue.bnf.fr/ark:/12148/cb37598345s.
Testo completoHossri, Nabil al. "Etude du phénomène métastable dans les dispositifs bistables de technologie CMOS : modélisation, caractérisation et simulation". Bordeaux 1, 1986. http://www.theses.fr/1986BOR10868.
Testo completoHossri, Nabil al. "Etude du phénomène métastable dans les dispositifs bistables de technologie CMOS : modélisation, caractérisation et simulation". Bordeaux 1, 1986. http://www.theses.fr/1986BOR10678.
Testo completoLabalette, Marina. "Intégration 3D de dispositifs mémoires résistives complémentaires dans le back end of line du CMOS". Thesis, Lyon, 2018. http://www.theses.fr/2018LYSEI037/document.
Testo completoIn our digital era, management, manipulation and data storage are real challenges. To support this reality the need for more efficient, less energy and money consuming memory technologies is drastically increasing. Among those emerging memory technologies we find the oxide resistive memory technology (OxRRAM), where the information is stored as the electrical resistance of a switching oxide in sandwich between two metallic electrodes. Resistive memories are really interested if used inside passive memory matrix. However the main drawback of this architecture remains related to sneak path currents occurring when addressing any point in the passive matrix. To face this problem complementary resistive switching devices (CRS), consisting in two OxRRAM back to back, have been proposed as efficient and costless BEOL CMOS compatible solution. This thesis brought the proof of concept of fabrication and 3D monolithic integration of CRS devices in CMOS BEOL
Solaro, Yohann. "Conception, fabrication et caractérisation de dispositifs innovants de protection contre les décharges électrostatiques en technologie FDSOI". Thesis, Grenoble, 2014. http://www.theses.fr/2014GRENT098/document.
Testo completoFDSOI architecture (Fully Depleted Silicon On Insulator) allows a significantimprovement of the electrostatic behavior of the MOSFETs transistors for the advancedtechnologies. It is industrially employed from the 28 nm node. However, theimplementation of ESD (Electrostatic Discharges) protections in these technologies isstill a challenge. While the standard approach relies on SOI substrate hybridization (byetching the BOX (buried oxide)), allowing to fabricate vertical power devices, we focushere on structures where the current flows laterally, in the silicon film. In this work,alternative approaches using innovative devices (Z²-FET and BBC-T) are proposed. Theirstatic, quasi-static and transient characteristics are studied in detail, with TCADsimulations and electrical characterizations
Laforest, Timothé. "Nouveaux dispositifs intégrés pour l'analyse et le contrôle de lumière cohérente : conception conjointe de circuits opto-électroniques et systèmes optiques". Thesis, Grenoble, 2014. http://www.theses.fr/2014GRENT113/document.
Testo completoAmong the optical medical imaging techniques used in medicine, the main limitation is the low resolution at a penetration depth greater than a few mm. This limitation does not allows competing with the standard imaging techniques such as X rays or RMI based imaging. In that scope, the acousto-optical imaging features several advantages: it allows measuring an optical contrast useful to detect tumors, in conjunction with the spatial resolution of ultrasound. However, the state of the art detecting devices feature a lack of sensitivity, which prevent its transfer to medical practitioners.This leads us to study the intrinsic features of the acousto-optical signal in order to propose two CMOS pixel architectures. The first one, fully analog, is compliant with the correlation time of biological tissue (1 ms typ.) and features an analog processing of the relevant signal. The second one is based on a digital pixel which contains an analog to digital converter, allowing simplifying the optical setup and increasing the robustness of the processing.In addition, related to the recent progress in wavefront control, an opto-electronic device, coupled with the first pixel architecture, has been proposed. It allows performing an optical phase operation (e.g. phase conjugation) in parallel on a pixels array, within the correlation time of biological media. Thus, this monolithic device circumvents the speed limitations of state of the art setup by a physical stacking of a liquid crystals spatial light modulator over a CMOS image sensor
Athanasiou, Sotirios. "Conception, fabrication et caractérisation de nouveaux dispositifs de FDSOI avancés pour protection contre les décharges électrostatiques". Thesis, Université Grenoble Alpes (ComUE), 2017. http://www.theses.fr/2017GREAT003/document.
Testo completo"The thesis main objective is the design of protection againstelectrostatic discharge (ESD), for deep submicron (DSM)state-of-the-art fully depleted silicon-on-insulator technology (FDSOI).This requires the ESD characterization of existing elementary devicesand design of new FDSOI devices. The detailed characterization of thephysical mechanisms and device performance will be conducted at IMEPwhich has adequate facilities and scientific competence in this field.It will then be necessary to make choices for ESD protectionstrategies based on circuit applications by STMicroelectronics. Anambitious approach aims to develop novel SOI components used for ESDprotection. This part of the work will be performed under theresponsibility of IMEP as it has has recently invented and publishedseveral types of revolutionary transistors Z 2-FET, TFET andBET-FET. It will be necessary to understand the fabrication processtechnology of STMicroelectronics. In this framework, 3D simulation ofthe technology will be performed on TCAD software for 28nm FDSOI andfuture technologies. Physical simulation, with TCAD tools of thesemiconductor will be used to study more precisely the behavior of theelementary devices of ESD protection. Collaboration with the IMEP isessential for the identification and analysis of the physicalmechanisms governing device operation.In particular, the main objective is to integrate ESD protection andevaluate its effectiveness and design. It will also be possible toperform mixed-mode simulation to better analyse the effects of the 3Dstructure (corner effects, depolarization of substrate) and evaluatethe influence of trigger circuits associated with this protection.Optimizing the implementation of ESD protection will then be possible.Having studied from a theoretical point of view and numericalsimulation, ESD protection cells and trigger circuits associated withthe ESD protection strategy, qualification on silicon will be applied.This will be done by a test vehicle in the chosen SOI technology, andelectrical characterization of the structures and protection networkswill follow. Finally, the ESD performance will be analyzed to provideoptimization of the design and the choice of ESD protection strategybased on targeted applications."
Thirion, Valérie. "Croissance et nitruration à basse pression d'oxydes minces de silicium : caractérisations physiques et électriques pour l'application aux dispositifs CMOS". Université Joseph Fourier (Grenoble), 1994. http://www.theses.fr/1994GRE10052.
Testo completoPic, David. "Etude de la fiabilité de l'oxyde SiO2 dans les dispositifs CMOS avancés et les mémoires non-volatiles". Aix-Marseille 1, 2007. http://www.theses.fr/2007AIX11062.
Testo completoThe SiO2 dielectric reliability always involves a major interest for the new technologies integration and the development of adapted methods for oxide quality evaluation during product manufacturing. This thickness layer has not stopped to decrease and has become lower than 1. 5 nm for the most advanced technologies. The physical origin of the mechanism responsible of the breakdown for this oxide range is not still completely clarified. On the other hand, the EEPROM memories integration is faced to the mechanism of stress induced leakage current which constitutes a major problem for reliability to guarantee the data conservation during 10 years. The STMicroelectronics Rousset site is in charge of the transfer of 90nm CMOS technologies with embedded non-volatile memories in production. One of the main sector of its activity concerns automotive applications working at 150ºC. In this fundamental and applied context, this manuscript treats the oxide reliability. We have investigated two items: The ultra-thin oxide reliability (<3. 5nm) and the oxide reliability for EEPROM memories (6-8nm). We establish several conclusions concerning Si-H bond breaking mechanism allowing to explain the breakdown for thin oxides. EEPROM memory uses oxide thickness range very sensitive to the SILC mechanism. It requires a better understanding of this mechanism to interpret and understand the charge loss in memory plan. We have characterized SILC in terms of annealing, thermal activation and generation to explain intrinsic and extrinsic cells behavior classically observed in a memory plan
Ben, Akkez Imed. "Etudes théorique et expérimentale des performances des dispositifs FD SOI sub 32 nm". Thesis, Grenoble, 2012. http://www.theses.fr/2012GRENT081/document.
Testo completoThis manuscript presents a theoretical and experimental study carried out on advanced technology the FD SOI MOSFETs (Fully Depleted Silicon On Insulator MOSFET’s). Electrical measurements combined with modeling were performed with an aim of bringing explanations of phenomena related to the dimension reduction in these structures. This work gives an answer of the impact of these aspects on the electrical parameters and on the carriers transport in the channel
Ben, akkez Imed. "Etudes théorique et expérimentale des performances des dispositifs FD SOI sub 32 nm". Phd thesis, Université de Grenoble, 2012. http://tel.archives-ouvertes.fr/tel-00870329.
Testo completoLim, Tek fouy. "Dispositifs de protection contre les décharges électrostatiques pour les applications radio fréquences et millimétriques". Phd thesis, Université de Grenoble, 2013. http://tel.archives-ouvertes.fr/tel-00947361.
Testo completoGautier, Gaël. "Conception, réalisation et mise au point d'une technologie CMOS en transistors couches minces sur substrat de verre". Rennes 1, 2002. http://www.theses.fr/2002REN10149.
Testo completoFruleux, Frédérique. "Conception, élaboration et caractérisation de dispositifs CMOS émergents : une nouvelle approche d'intégration de transistors multi-grille de type FinFet". Lille 1, 2007. https://pepite-depot.univ-lille.fr/RESTREINT/Th_Num/2007/50376-2007-287.pdf.
Testo completoThe incredible growth of semiconductor industry has been possible thanks to the extreme downscaling of CMOS devices up to nanometric dimensions. However to continue this evolution, it becomes necessary to introduce new device architectures. Ln that context, this study deals with one ( the most promising architecture : the CMOS double gate transistor, called FinFET. Ln particular, it presents an innovative process, named "spacer first", which gives a solution to the major technological challenges of such transistors. A second part of this work is focused on process development. 1) The optimization of the e-beam lithography leads to the realization of nanometric fins densely packed. 2) A 2-nm gate oxide is thermally grown uniformly around silicon fins. 3) An innovative damascene type process enables the realization of gate module (spacers included) without any stringers. 4) Metallic and low Schottky barrier junctions are integrated. Finally, the last section of this work is dedicated to the electrical characterization of the proposed devices and demonstrates the validity of this work thanks to electrical performances at the state of the art of Schottky barrier transistors
Foucher, Johann. "Etude et développement de procédés de gravure plasma pour l'élaboration de grilles silicium de dispositifs CMOS sub-20 nm". Université Joseph Fourier (Grenoble), 2003. http://www.theses.fr/2003GRE10031.
Testo completoFroment, Benoît. "Integration du siliciure de nickel pour les technologies cmos decananométriques : 65nm et en deça". Grenoble INPG, 2010. http://www.theses.fr/2010INPG0063.
Testo completoThe nickel silicide, pur or alloyed with Pt is nowadays used as a contact material for CM OS technologies because it requires a lower thermal budget, has a lower resistivity, consume less silicon, has a formation controlled by diffusion and forms a less resistive phase on SiGe, whereas its counterpart CoSb does not. Despite of theses advantages, a large number of troubles remained or remains linked to its integration in decananometric dimensions. Beyond a better knowledge of the NiSi behaviour in temperature and the nickel silicide properties, the goal of the thesis is to improve our knowledge of NiSi to integrate it on the 65nm technological node and beyond, and to characterize and eventually solve ail the challenges related to the integration of this new material in a downscaled environ ment. The results and characterizations obtained allowed us to propose a scenario of the formation of the silicide encroachment into the transistor channel
Mitard, Jérôme. "Etude des propriétés électriques d’empilements high-K/grille métal en vue de leur intégration dans les dispositifs CMOS-sub 45 nm". Grenoble INPG, 2006. http://www.theses.fr/2007INPG0042.
Testo completoThis work concerns the study of electrical properties of advanced transistors integrating High-KImetal materials. We addressed in a first part, the basic characterization of these stacks especially EûT thermal star first-level defects characterization and conduction analysis. We are also interested in electrical defects resultin! phenomenon named Positive Bias Temperature Instability (PB TI). To make an intensive investigation of parasitic effect, we have introduced a new time resolved characterization technique evidencing different categ of PBTI defects depending on reversible or irreversible behavior. Afterwards, we focused on the modelir reversible traps. After an accurate identification of charging and discharging mechanisms, a SRH model led extract traps physical properties. Finally, we have investigated another phenomenon resulting in an uncontr flat band voltage with an electrical and optical technique based on InternaI Photo-Emission
Gensolen, Fabrice. "ARCHITECTURE ET CONCEPTION DE RETINES CMOS :INTEGRATION DE LA MESURE DU MOUVEMENT GLOBALDANS UN IMAGEUR". Phd thesis, Université Montpellier II - Sciences et Techniques du Languedoc, 2006. http://tel.archives-ouvertes.fr/tel-00119758.
Testo completomobiles, qui embarquent pour la majorité les fonctions photo ou vidéo. En effet, les contraintes d'intégration et de coût favorisent la technologie CMOS. Cependant la prise de vue à l'aide de ces dispositifs portables, très sujets aux tremblements, nécessite une stabilisation de la vidéo qui implique d'estimer le mouvement global inter images. Aussi, l'objectif de ce travail est d'intégrer cette fonction aux imageurs fabriqués par la société STMicroelectronics.
Pour ce faire, une technique novatrice pour estimer ce mouvement global est présentée dans ce mémoire. Cette méthode consiste à extraire un modèle du mouvement global à partir de mesures de déplacements locaux en périphérie des images. Elle a tout d'abord été validée de
façon algorithmique, avant d'être intégrée sur silicium. L'architecture finale du capteur se caractérise par une zone photosensible partitionnée en une zone centrale et une zone périphérique. La chaîne de traitement du signal comporte quant à elle un traitement au niveau pixel afin de mesurer les mouvements locaux périphériques. Elle comprend aussi un posttraitement dédié aux tâches d'estimation du modèle du mouvement global ainsi qu'à la compensation du mouvement indésiré.
Gout, Michel. "Le rapport entre langue et intégration dans les dispositifs linguistiques pour migrants nouveaux arrivants en Allemagne, Belgique, France et Royaume Uni". Thesis, Aix-Marseille, 2015. http://www.theses.fr/2015AIXM3038.
Testo completoThis sociolinguistic research addresses the links between the knowledge of the official language of the host country and the integration. Indeed, the knowledge of the language of the country of immigration is presented, even in the speeches of Council of Europe, as the key of migrants’ integration and we have been facing for about ten years, in all countries, the deployment of compulsory host language learning schemes intended to solve the integration difficulties for the newcomers. Yet, is it sufficient to speak the language of a country to integrate this country?This study carried out in four large countries of immigration in Europe (Germany, Belgium, France and United-Kingdom) deals with two aspects of the question.In the first part, the institutional conceptions of the integration by the language in these countries are examined and the four national linguistic learning schemes for migrants are compared. The second part of the research is based on a vast field study and analyses the various teaching practises of the languages and cultures and their impacts on the integration process. After cross-fertilizing the perspectives of these various educational processes, this thesis suggests, as a conclusion, a few didactic approaches to an integrative host language teaching and for training the teachers
Diese soziolinguistische Studie handelt sich um die Verbindungen zwischen der Kenntnis der Sprache des Gastlandes und der Integration. Die Kenntnis der Sprache des Immigrationslandes ist, eigentlich, bis in den Reden des Europarates, als sei sie der Schlüssel zur Integration der Migranten präsentiert und seit einem Jahrzehnten bemerken wir, in allen Ländern, die Umsetzung von obligatorischen Lehrprogrammen der Aufnahmesprache für Neuankömmlinge, die die Schwierigkeiten zur Integration lösen sollen. Ist es aber genug die Sprache eines Landes anzuwenden, um sich in diesem Land zu integrieren?Diese in vier großen europäischen Immigrationsländern durchgeführte Studie (Deutschland, Belgien, Frankreich und Gross-Britannien) beantwortet zwei Aspekte der Frage.In dem ersten Teil wird der Institutionelle Begriff der durch-die-Aufnahmesprache Integration in diesen Ländern behandelt. Diese erste vergleichende Analyse ermöglicht der vier nationalen für Migranten Sprachbildungssystemen nebeneinander zu setzen.Der zweite Teil der Studie stützt sich auf einer umfangreichen Feldstudie und analysiert die didaktische Praktiken der Sprache und Kultur des Gastlandes, und die Auswirkungen auf dem Integrationsprozess.Nachdem sie die Blickwinkel dieser verschiedenen Lehrmethoden berücksichtigt und die Gedanken von vielen Akteuren aus der Praxis gegenübergestellt hat, schließt sich diese Studie mit didaktischen Vorschlägen für eine integrative Bildung der Sprache des Gastlandes und für die Lehreausbildung ab
Save, Didier. "Etude et developpement de technologies d'isolation cmos pour circuits integres ulsi". Toulouse 3, 1988. http://www.theses.fr/1988TOU30011.
Testo completoAit-Ali, Cédric. "Les contributions des dispositifs hors classe aux apprentissages : le cas des élèves de 4ème et 3ème de l'enseignement agricole". Thesis, Toulouse 2, 2014. http://www.theses.fr/2014TOU20102/document.
Testo completoThis thesis target the out of class device in the institution and, to be more exact, call for the pupil’s learning, school or psychosocial learning. It gives an account of the organization out of class and knowing spacio-temporal encroaching for young in the out of class time and in the informal moment. The theoretical framework leans on learning exploration’s concept, in its process-sized and it product-sized.The modeling proposed enable to categorize and characterize the out of class time and the school time in the formal’s distance. The empiric work had been done in farming’s institution and in a public middle school, with 4ème and 3ème’s pupils, who are changed their learning’s ways. A join method, quantitative and qualitative research, was done. It enables to take the feeling of the educational player and the teachers who operate out of class and, what’s more important, the learner. This survey use quiz, interviews, observations, pictures and schedule. It shows us significant results in the differential contribution of the out of class learning device, as much as the school results than the psychosocial hit. In challenging the separation of “in class” and “out of class” by “in school” and “out of school”, it hypothesizes an educational curriculum which ask about the part of school in the society and the part of each player, especially younger, in the new education call the global education
Zhang, Yue. "Modélisation compacte et conception de circuit hybride pour les dispositifs spintroniques basés sur la commutation induite par le courant". Phd thesis, Université Paris Sud - Paris XI, 2014. http://tel.archives-ouvertes.fr/tel-01058504.
Testo completoHarrison, Samuel. "Dispositifs GAA [Gate-All-Around] en technologie SON [Silicon-On-Nothing] : conception, caractérisation et modélisation en vue de l'intégration dans les noeuds CMOS avancés". Aix-Marseille 1, 2005. http://www.theses.fr/2005AIX11021.
Testo completoTachi, Kiichi. "Etude physique et technologique d'architectures de transistors MOS à nanofils". Phd thesis, Université de Grenoble, 2011. http://tel.archives-ouvertes.fr/tel-00721968.
Testo completoHernandez, Caroline. "Mise au point, developpement et integration de materiaux a base de si et ge dans les technologies avancees silicium de type cmos, bicmos et alternatives". Orléans, 1999. http://www.theses.fr/1999ORLE2046.
Testo completoUsai, Giulia. "Conception et Fabrication hybride 3D monolithique de relais NEMS co-integrés CMOS". Thesis, Université Grenoble Alpes (ComUE), 2019. http://www.theses.fr/2019GREAT069.
Testo completoThis manuscript focuses on Nano-Electro-Mechanical (NEM) relays with electrostatic actuation for advanced logic and memory applications. The use of Nano-Electro-Mechanical relays was recently proposed for digital logic circuits in order to overcome the fundamental energy-efficiency limitations that mainstream CMOS technology is currently facing. The cumulated benefits of essentially Zero Off-State current and ultimately abrupt DC switching characteristics enable alleviating the power-performance trade-off as the supply voltage VDD is reduced. Additionally, for some particular switch designs (e.g. free of dielectric layers), an increased resistance to ionizing radiations is also anticipated, making such components valuable for defense or aerospace applications.However, NEM relays have intrinsic limitations in terms of integration density, endurance and operation frequency. Therefore, rather than considering them as technology that could replace MOSFETs, we adopt an intermediate approach that consists in using NEM relays as a complement to CMOS circuits (e.g.: buffers, non-volatile elements for SRAM and CAM), which can be fabricated in a 3D co-integration scheme. This approach mitigates the area penalty issue.The thesis explores the strength and the weakness of NEMS relays and identifies applications for which hybrid NEMS/CMOS circuits are potentially interesting.This work includes the manufacturing of prototype devices designed to be proof of concept for the identified applications. At first, NV NEM relays design and dimensioning through modelling and simulations was performed. Then NV NEM/CMOS circuits were validated trough simulations. This was followed by the tapeout and the process integration of monolithically co-integrated NEMS above CMOS. After wafer processing the devices were electrically characterized.This all-inclusive works allows identifying some crucial challenges that NEMS relays still have to face
Philippe, Julien. "Technologie de fabrication et analyse de fonctionnement d'un système multi-physique de détection de masse à base de NEMS co-intégrés CMOS". Thesis, Grenoble, 2014. http://www.theses.fr/2014GRENT099/document.
Testo completoDuring these last decades, Very Large Scale Integration (VLSI) techniques, well developed for transistors, have been used for the Micro ElectroMechanical Systems (MEMS) devices. Thanks to the combination of different physical properties (such as electronic, mechanical, optical etc.) the fabrication of various kinds of miniaturized sensors has been made possible. The sub-µm downscaling of MEMS has allowed the emergence of a new kind of devices called NEMS (for Nano ElectroMechanical Systems) and the possible use of the electromechanical systems in specific applications in which a high level of sensitivity and resolution is necessary, such as gas sensing, mass spectrometry and molecules recognition, to replace traditional bulky machines. Nevertheless, the use of these NEMS requires a CMOS electronic to enhance NEMS resonators readout and to implement closed-loop oscillators (e.g. phase-locked loop or self-oscillating loop) that provide real-time mass measurements. The integration of the electronic circuit with the resonators is a critical aspect for the fabrication of high performance sensors. The best way consists in monolithically processing these two parts on the same die allowing a size reduction of the sensor and an optimal signal transmission between the NEMS resonators and the CMOS circuit. In a first time, this thesis proposes to analyze the interest of this co integration from an electrical point of view. In a second time, this thesis deals with the development of a 3D co integration in which the nano resonators are fabricated above the CMOS circuit and the interconnections. The final part is focused on the layout design considerations for the implementation of a compact mass sensor based on a NEMS array co integrated with a CMOS
Tallal, Jamal. "Développement de techniques de fabrication collectives de dispositifs électroniques à nanostructure unique". Phd thesis, Grenoble 1, 2007. http://www.theses.fr/2007GRE10205.
Testo completoThe development of the micro 1 nano electronic field is based on the constant reduction of the critical dimensions. This constant change in scale willlead to severe physical (quantum perturbation. . . ) and technological issues (resolution treshold ofindustrial fabrication processes). One of the most promissing alternative to overcome these problems is the global integration ofnanometric objects in electronic devices. Ln this framework, we have developed several nanofabrication processes based or the use of a global, high resolution technique: the nanoimprint lithography. Manipulation and localisation of gold colloids have been performed using dielectrophoresis and several devices at the single particle level have been obtained. Electrical tests on these fabricated structures showed Coulomb blockage and staircases at low-temperature
Tallal, Jamal. "Développement de techniques de fabrication collectives de dispositifs électroniques à nanostructure unique". Phd thesis, Université Joseph Fourier (Grenoble), 2007. http://tel.archives-ouvertes.fr/tel-00197851.
Testo completoIsselé, Hélène. "Caractérisation et modélisation mécaniques de couches minces pour la fabrication de dispositifs microélectronoiques-application au domaine de l'intégration 3D". Phd thesis, Université de Grenoble, 2014. http://tel.archives-ouvertes.fr/tel-00987507.
Testo completoRibot, Pascal. "Développement et réalisation de structures Silicium et Silicium-Germanium par RTCVD et leur intégration dans les technologies BiCMOS et CMOS avancées". Université Joseph Fourier (Grenoble), 2001. http://www.theses.fr/2001GRE10051.
Testo completoGerber-Morata, Elisabeth. "Les dispositifs de formation et d'évaluation des compétences linguistiques des migrants adultes dans l’espace francophone européen : approches croisées". Thesis, Aix-Marseille, 2014. http://www.theses.fr/2014AIXM3003/document.
Testo completoOur research regarding three francophone european countries (Belgium, France and Switzerland) shows first that there are significant differences in terms of immigration and integration policy. At the European level we notice a greater control of migration, actions against illegal immigration and the restriction of asylum applications while building a European action centered around the question of the social integration of migrant populations hardly takes place. We focused then our attention on the implementation of these policies through training schemes and skills evaluation of migrants learners. The training devices implemented in each country are primarily designed according to national specificities and national history. Thus, a detailed examination of the measures taken in the three francophone countries show opposite interpretations of the equation 'language , immigration, integration'. Our study brings out two opposite designs : on one side, a design focused on the linguistic integration of migrants and their individual efforts to achieve 'language mastery' set by the host country and on the opposite a design focused on social integration centered around a social long-term process with the strong commitment of the host country. Finally, the third microsociological component, through an action research around the implementation of a language portfolio, has revealed the teachers 'difficulties of adapting their teaching methods and learners' traditional views regarding language learning
Botelho, Diego Pereira. "Méthode des éléments naturels appliquée aux problèmes électromagnétiques : développement d’un outil de modélisation et de conception des dispositifs électriques". Thesis, Université Grenoble Alpes (ComUE), 2015. http://www.theses.fr/2015GREAT138/document.
Testo completoIn order to overcome the limitations related to the finite element method’s (FEM) narrow dependency of the solution on the mesh, meshless or meshfree methods were developed over the last 20 years. These techniques present the advantage of yielding very smooth approximations, being able to respond more adequately to the increasing demands of applications. However, some intrinsic features of most of these approaches make the implementation difficult, often requiring additional specific techniques for the imposition of the boundary conditions and the treatment of physical discontinuities. Recently, the natural element method (NEM) was developed. This approach, based on the Voronoi diagram and the “natural neighbors” concepts, combines the advantages of very smooth approximations and a FEM-like implementation. This thesis focuses on the study and development of the NEM, dedicated to electrical engineering applications. The main purpose of this exploratory work is the study of the limitations, benefits and the potential of the NEM and its underlying concepts. Several analyses of NEM’s performance are presented. As far as the numerical integration, higher order approximations and the vector interpolation are concerned, original developments are proposed
Bourgeois, Clara. "Les défis de l'intersectorialité : l'exemple de la mise en oeuvre des dispositifs d'insertion professionnelle des immigrés". Thesis, Bordeaux, 2015. http://www.theses.fr/2015BORD0458/document.
Testo completoOver the past years, the linkage between policy fields has been promoted in France and in Europe,following the development of activation policies, aiming at a more comprehensive anddecompartmentalized approach of professionnal inclusion issues. This work analyses the practisesthat underlie these changes by studying how they are implemented by local institutionnal actorsand street level bureaucrats working with the unemployed.Three level of public action are analysed : a macro level that informs us about the context in whichemployment policies’ cross-sectoriality is developped in France and in Europe, a meso level whichenlightens the way actors implement these policies at the local level, and last, a micro level whichanalyses street level buraucrats’ work.While the few studies on cross-sectoriality focused on the link between the employment and thesocial policy fields, this work will look into the link between the employment and the immigrationpolicy fields. This case of cross-sectoriality will enable us to shed light on the variables that impactsectorial linkages
Kuprenaite, Sabina. "Heterogeneous integration of functional thin films for acoustic and optical devices". Thesis, Bourgogne Franche-Comté, 2019. http://www.theses.fr/2019UBFCD039.
Testo completoThe control of microstructure and surface morphology is essential for the thin films to be applied in optical and acoustic devices. Thin films of TiO2, LaNiO3 and ZnO and their heterostructures in this work were obtained by radio frequency (RF) magnetron sputtering and metalorganic chemical vapor deposition (MOCVD) techniques. The optimization of deposition parameters, such as temperature, total chamber pressure, O2 partial pressure and growth rate, led to high structural quality of functional thin films and their heterostructures. The orientation of epitaxial ZnO and TiO2 thin films was tuned not only through lattice matching with various substrates, but as well through deposition conditions. The optical quality of TiO2 films was mostly optimized through elimination of microstructural defects and increasing oxygen non-stoichiometry. It was shown that microstructural and lattice defects in polycrystalline and epitaxial films played a key role in optical propagation losses. Effect of substrate polarity on the structural, optical and acoustic properties of ZnO-based thin films was studied, as well. The sacrificial and/or seed layers were identified for heterogeneous intégration of functional acoustical and optical films with semiconductor substrates
Fagade, Carole. "L'intégration des dispositifs numériques de l'information et de la communication dans les universités béninoises : le cas de WhatsApp à l'Université d'Abomey-Calavi (UAC)". Electronic Thesis or Diss., Bordeaux 3, 2021. http://www.theses.fr/2021BOR30056.
Testo completoAt the University of Abomey-Calavi (UAC), the number of students enrolled each year is increasing sharply. Add to this phenomenon the “antiquated” means of communication of the administration, which are always limited to “word of mouth” or to signage, in terms of communication with students. In this context, in order to meet the information and communication needs they encounter, the student leaders and the students themselves engage in practices of the Internet in the sense of de Certeau (1990). They use digital social networks such as Whatsapp to build virtual student communities in which information “flows”: information is not only given but also relayed. This circulation takes place through the participation and dynamism of each member of the network. The managers are informed by the administration which entrusts them with the total responsibility of informing all the other students. In this new “info-communicational” scheme, managers can also count on other students to produce information in turn. This way of participating helps to overcome the phenomenon of insufficient information, communication and collaboration that students face in their daily lives. Our study helps, at first, to show the representations, motivations and usages of Whatsapp groups. It aims, in a second phase, to participate in the improvement of institutional policies for the development of ICT in universities by making it possible to identify the essential aspects for the progressive and effective integration of the digital technology at the University of Benin
Velmuradova, Maya. "Communication pour le développement et l'intégration sociale des nouveaux dispositifs : le rôle de la valeur perçue d'usage. : étude de cas dans l'appui à des Petites et moyennes entreprises au Turkménistan". Thesis, Aix-Marseille, 2015. http://www.theses.fr/2015AIXM5906/document.
Testo completoNumber of researchers call to reconsider communication for development and social change, as a problem of techniques and society. Thus, the models of social integration of innovations are used here to study how the new development support components are accepted and appropriated by their users in developing countries, notably in Central Asia (Turkmenistan). There is no need to prove anymore that users’ reception and appropriation is critical to the development programs effectiveness. Hence, we synthesize the Anglo-Saxon and French models and distinguish the common determinant axes for the innovation reception: before its actual use (acceptance models) and after it (cognitive appropriation models). It appears to be the mental construction of the meaning of use: the user mobilizes his representations « already there » and his imaginary to assess the associated functional and symbolic benefits-costs, the anticipated and perceived use experience. In the literature, this mental construction process appears as the formation of the Perceived Value of Use (Jouet; Mallein, Toussaint and coll.; Boenisch; Assude et al.; Nelson; Kim et al.). However, it would be necessary to further investigate this process. We explore this concept in detail in our qualitative multi-site case study, conducted within one of the SME support components in Turkmenistan. As result, we model the role of the Perceived Value of Use for the acceptance and the appropriation of the new services of social utility, as well as its mental formation on the organisational users’ side
Velmuradova, Maya. "Communication pour le développement et l'intégration sociale des nouveaux dispositifs : le rôle de la valeur perçue d'usage. : étude de cas dans l'appui à des Petites et moyennes entreprises au Turkménistan". Electronic Thesis or Diss., Aix-Marseille, 2015. http://www.theses.fr/2015AIXM5906.
Testo completoNumber of researchers call to reconsider communication for development and social change, as a problem of techniques and society. Thus, the models of social integration of innovations are used here to study how the new development support components are accepted and appropriated by their users in developing countries, notably in Central Asia (Turkmenistan). There is no need to prove anymore that users’ reception and appropriation is critical to the development programs effectiveness. Hence, we synthesize the Anglo-Saxon and French models and distinguish the common determinant axes for the innovation reception: before its actual use (acceptance models) and after it (cognitive appropriation models). It appears to be the mental construction of the meaning of use: the user mobilizes his representations « already there » and his imaginary to assess the associated functional and symbolic benefits-costs, the anticipated and perceived use experience. In the literature, this mental construction process appears as the formation of the Perceived Value of Use (Jouet; Mallein, Toussaint and coll.; Boenisch; Assude et al.; Nelson; Kim et al.). However, it would be necessary to further investigate this process. We explore this concept in detail in our qualitative multi-site case study, conducted within one of the SME support components in Turkmenistan. As result, we model the role of the Perceived Value of Use for the acceptance and the appropriation of the new services of social utility, as well as its mental formation on the organisational users’ side
Faye, Oumoul khairy Aby. "Les papillons de cité : trajectoires scolaires et parcours socioprofessionnels d'un groupe de jeunes sans qualification au sein des dispositifs d'insertion : une étude de cas à Strasbourg". Thesis, Strasbourg, 2018. http://www.theses.fr/2018STRAG002.
Testo completoThis doctoral thesis deals with the socio-institutional trajectories of a group of youth with low-level qualifications or no qualifications at all, who benefit from a reinsertion policy measure designed to help them find job. The purpose of this research is to study how this target-group of youth – characterized by multiple forms of disqualifications – is getting the proposed support. First and foremost, it should be noted that those who have resorted to public assistance have been long wrongly considered a homogeneous social stratum, whereas indeed, there are several ways to deliver social support, depending on individuals, their different life experiences or even the specific phases they are go through by the time they ask for help. In line with this assertion, following the model of medical diagnosis, I undertook an“anamnesis” towards understanding, more or less, the etiological history of those male and female as well, finding themselves “ à posteriori” playing the institutionalized part of“pathological” trainees. From that point of view, I had to study different spaces that are namely : the family, the school and the institutional environment as well as their impacts on the socio-professional trajectories of the individuals concerned. In other words, the objective was to check to what extent, based on social supports received (nature, intensity, quality of resources ...), that youth may find the springs and dynamics allowing them to trace their own path.It is in this context that I integrated two associations active in social work towards facilitating the process of inserting young people having difficulties to enter the world of employment. Considered as communicational spaces, the “Mission Locale” and particularly “l’Atelier” were my privileged places of ethnographic observation, where I strived to single out the games of actors, power games, objectives and the multiple interactions entwined in these territories. A specific interest was put on personal experiences, perceptions, conflictual and /or cooperative interactions between social workers and beneficiaries. Jogging, basket (shoes), cap position (back / front) or street language, this field survey also allowed me to study the esthetics, postures and body expressions of young people by looking at the significance they take as individuals and / or collective action, particularly within social associations. In a broader prospect, I have tried to see how and to what extent the agents / actors of the social institutions take into account the specificities of this public and manage to create points of balance between the request of the beneficiaries and the institutional command, between imperatives as mediate and immediate structural constraints
Gamet, Arnaud. "Etude et mise en oeuvre de transitions passives aux interfaces circuit/boîtier pour les bases de temps intégrées résonantes". Thesis, Aix-Marseille, 2017. http://www.theses.fr/2017AIXM0002.
Testo completoNowadays, the integration of oscillators into microcontrollers is a major industrial challenge which involves a large competition between the main actors of this market. Indeed, sine wave oscillators are essential circuits, and are fore the most part based on external crystal or MEMs resonators. More and more investigations are carried out in order to integrate the resonant structure into the package, and avoid all external constraints able to restrict the performances of the oscillator. With this in mind, we studied in this work the electrical behavior, in particular the inductive behavior of bond wires which are electrical connections between a die and its package. The main advantage to use this type of component is its low cost of manufacturing. This passive component has been characterized using several measurement tools on a wide range of frequencies. A RLC model has been presented, allowing analogue designers to use an electrical equivalent circuit in standard CMOS technology. The integration of the passive component in a resonant cell has been demonstrated in a prototype
Tagro, Yoann. "Mise au point d’une méthodologie de caractérisation des 4 paramètres de bruit HF des technologies CMOS et HBT avancées dans la bande 60-110 GHz : développement de système à impédance variable in-situ". Thesis, Lille 1, 2010. http://www.theses.fr/2010LIL10123/document.
Testo completoThe advanced technologies following the gate length scaling in agreement with Moore’s law allow today to get high performances of silicon transistors (ft/fMax > 150 GHz). The knowledge of the silicon transistors’ dynamic and noise performances in millimeter wave range is mandatory but they characterization is difficult due to the limitation of measurement tools. In this thesis we establish in a first step a state of the art of existing impedance tune. This study is followed by the design and the characterization of integrated impedance tuners in order to avoid the insertion losses induced by the passive devices between mechanical tuner and transistors under test in classical setup. We have described the BEOL, the different integrated tuner’s components, and defined a common tuner’s architecture for both technologies (CMOS 65 nm and BiCMOS9MW). The tuner measures presented performances (TOS of 7:1 and 150:1) better than mechanical ones. The noise characterization methods are presented with particular focus on the multi impedance method that we have used in cold-noise source. We conclude by the extraction of the 4 noise parameters of the MOSFET and HBT transistors, using designed integrated tuners. The obtained noise performances in millimeter wave range are respectively around 2 dB (MOSFET) and 3.5 dB (HBT) and are in agreement with the used models. The possibility to address a broad band of applications with these tuners is also presented, such as load-pull applications, G band integrated tuner, variable gain amplifier
Gamet, Arnaud. "Etude et mise en oeuvre de transitions passives aux interfaces circuit/boîtier pour les bases de temps intégrées résonantes". Electronic Thesis or Diss., Aix-Marseille, 2017. http://www.theses.fr/2017AIXM0002.
Testo completoNowadays, the integration of oscillators into microcontrollers is a major industrial challenge which involves a large competition between the main actors of this market. Indeed, sine wave oscillators are essential circuits, and are fore the most part based on external crystal or MEMs resonators. More and more investigations are carried out in order to integrate the resonant structure into the package, and avoid all external constraints able to restrict the performances of the oscillator. With this in mind, we studied in this work the electrical behavior, in particular the inductive behavior of bond wires which are electrical connections between a die and its package. The main advantage to use this type of component is its low cost of manufacturing. This passive component has been characterized using several measurement tools on a wide range of frequencies. A RLC model has been presented, allowing analogue designers to use an electrical equivalent circuit in standard CMOS technology. The integration of the passive component in a resonant cell has been demonstrated in a prototype