Tesi sul tema "Computer network architectures"

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1

Seah, Peng Leong Chung Wai Kong. "Architectures for device aware network /". Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 2005. http://library.nps.navy.mil/uhtbin/hyperion/05Mar%5FSeah.pdf.

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2

Chung, Wai Kong. "Architectures for device aware network". Thesis, Monterey, California. Naval Postgraduate School, 2005. http://hdl.handle.net/10945/2306.

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Abstract (sommario):
In today's heterogeneous computing environment, a wide variety of computing devices with varying capabilities need to access information in the network. Existing network is not able to differentiate the different device capabilities, and indiscriminatingly send information to the end-devices, without regard to the ability of the end-devices to use the information. The goal of a device-aware network is to match the capability of the end-devices to the information delivered, thereby optimizing the network resource usage. In the battlefield, all resources - including time, network bandwidth and battery capacity - are very limited. A device-aware network avoids the waste that happens in current, device-ignorant networks. By eliminating unusable traffic, a device-aware network reduces the time the end-devices spend receiving extraneous information, and thus saves time and conserves battery-life. In this thesis, we evaluated two potential DAN architectures, Proxy-based and Router-based approaches, based on the key requirements we identified. To demonstrate the viability of DAN, we built a prototype using a hybrid of the two architectures. The key elements of our prototype include a DAN browser, a DAN Lookup Server and DAN Processing Unit (DPU). We have demonstrated how our architecture can enhance the overall network utility by ensuring that only appropriate content is delivered to the end-devices.
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3

Crowley, Patrick. "Design and analysis of architectures for programmable network processing systems /". Thesis, Connect to this title online; UW restricted, 2003. http://hdl.handle.net/1773/6991.

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4

McKenzie, Neil R. "The Cranium network interface architecture : support for message passing on adaptive packet routing networks /". Thesis, Connect to this title online; UW restricted, 1997. http://hdl.handle.net/1773/6874.

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5

Umeh, Njideka Adaku. "Security architecture methodology for large net-centric systems". Diss., Rolla, Mo. : University of Missouri-Rolla, 2007. http://scholarsmine.mst.edu/thesis/Umeh_09007dcc8049b3f0.pdf.

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Abstract (sommario):
Thesis (M.S.)--University of Missouri--Rolla, 2007.
Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed December 6, 2007) Includes bibliographical references (p. 60-63).
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6

Diana, Gary M. "Internetworking : an analysis and proposal /". Online version of thesis, 1990. http://hdl.handle.net/1850/10605.

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7

Becker, Russell W. "A test bed for detection of botnet infections in low data rate tactical networks". Thesis, Monterey, California : Naval Postgraduate School, 2009. http://edocs.nps.edu/npspubs/scholarly/theses/2009/Sep/09Sep%5FBecker.pdf.

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Thesis (M.S. in Electrical Engineering)--Naval Postgraduate School, September 2009.
Thesis Advisor(s): JMcEachen, John ; Tummala, Murali. "September 2009." Description based on title screen as viewed on November 04, 2009. Author(s) subject terms: Botnet, Tactical Network, BotHunter, Honeynet, Honeypot, Low Data Rate, Network Security Includes bibliographical references (p. 57-59). Also available in print.
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8

Nguyen, Thanh Vinh. "Content distribution networks over shared infrastructure a paradigm for future content network deployment /". Access electronically, 2005. http://www.library.uow.edu.au/adt-NWU/public/adt-NWU20060509.094632/index.html.

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9

Wing, Peter D. "Enhancements to the XNS authentication-by-proxy model /". Online version of thesis, 1990. http://hdl.handle.net/1850/10613.

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10

Suryanarayanan, Deepak. "A Methodology for Study of Network Processing Architectures". NCSU, 2001. http://www.lib.ncsu.edu/theses/available/etd-20010720-154055.

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A new class of processors has recently emerged that encompasses programmable ASICs and microprocessors that can implement adaptive network services. This class of devices is collectively known as Network Processors (NP). NPs leverage the flexibility of software solutions with the high performance of custom hardware. With the development of such sophisticated hardware, there is a need for a holistic methodology that can facilitate study of Network Processors and their performance with different networking applications and traffic conditions. This thesis describes the development of Component Network Simulator (ComNetSim) that is based on such a tech-nique. The simulator demonstrates the implementation of Diffserv applications on a Network Processor architecture and the performance of the system under different network traffic conditions.

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11

Zhang, Yu Ph D. Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science. "Exploring neural network architectures for acoustic modeling". Thesis, Massachusetts Institute of Technology, 2017. http://hdl.handle.net/1721.1/113981.

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Abstract (sommario):
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.
Cataloged from PDF version of thesis.
Includes bibliographical references (pages 121-132).
Deep neural network (DNN)-based acoustic models (AMs) have significantly improved automatic speech recognition (ASR) on many tasks. However, ASR performance still suffers from speaker and environment variability, especially under low-resource, distant microphone, noisy, and reverberant conditions. The goal of this thesis is to explore novel neural architectures that can effectively improve ASR performance. In the first part of the thesis, we present a well-engineered, efficient open-source framework to enable the creation of arbitrary neural networks for speech recognition. We first design essential components to simplify the creation of a neural network with recurrent loops. Next, we propose several algorithms to speed up neural network training based on this framework. We demonstrate the flexibility and scalability of the toolkit across different benchmarks. In the second part of the thesis, we propose several new neural models to reduce ASR word error rates (WERs) using the toolkit we created. First, we formulate a new neural architecture loosely inspired by humans to process low-resource languages. Second, we demonstrate a way to enable very deep neural network models by adding more non-linearities and expressive power while keeping the model optimizable and generalizable. Experimental results demonstrate that our approach outperforms several ASR baselines and model variants, yielding a 10% relative WER gain. Third, we incorporate these techniques into an end-to-end recognition model. We experiment with the Wall Street Journal ASR task and achieve 10.5% WER without any dictionary or language model, an 8.5% absolute improvement over the best published result.
by Yu Zhang.
Ph. D.
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12

Zheng, Huanyang. "SOCIAL NETWORK ARCHITECTURES AND APPLICATIONS". Diss., Temple University Libraries, 2017. http://cdm16002.contentdm.oclc.org/cdm/ref/collection/p245801coll10/id/470889.

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Computer and Information Science
Ph.D.
Rather than being randomly wired together, the components of complex network systems are recently reported to represent a scale-free architecture, in which the node degree distribution follows power-law. While social networks are scale-free, it is natural to utilize their structural properties in some social network applications. As a result, this dissertation explores social network architectures, and in turn, leverages these architectures to facilitate some influence and information propagation applications. Social network architectures are analyzed in two different aspects. The first aspect focuses on the node degree snowballing effects (i.e., degree growth effects) in social networks, which is based on an age-sensitive preferential attachment model. The impact of the initial links is explored, in terms of accelerating the node degree snowballing effects. The second aspect focuses on Nested Scale-Free Architectures (NSFAs) for social networks. The scale-free architecture is a classic concept, which means that the node degree distribution follows the power-law distribution. `Nested' indicates that the scale-free architecture is preserved when low-degree nodes and their associated connections are iteratively removed. NSFA has a bounded hierarchy. Based on the social network structure, this dissertation explores two influence propagation applications for the Social Influence Maximization Problem (SIMP). The first application is a friend recommendation strategy with the perspective of social influence maximization. For the system provider, the objective is to recommend a fixed number of new friends to a given user, such that the given user can maximize his/her social influence through making new friends. This problem is proved to be NP-hard by reduction from the SIMP. A greedy friend recommendation algorithm with an approximation ratio of $1-e^{-1}$ is proposed. The second application studies the SIMP with the crowd influence, which is NP-hard, monotone, non-submodular, and inapproximable in general graphs. However, since user connections in Online Social Networks (OSNs) are not random, approximations can be obtained by leveraging the structural properties of OSNs. The modularity, denoted by $\Delta$, is proposed to measure to what degree this problem violates the submodularity. Two approximation algorithms are proposed with ratios of $\frac{1}{\Delta+2}$ and $1-e^{-1/(\Delta+1)}$, respectively. Beside the influence propagation applications, this dissertation further explores three different information propagation applications. The first application is a social network quarantine strategy, which can eliminate epidemic outbreaks with minimal isolation costs. This problem is NP-hard. An approximation algorithm with a ratio of 2 is proposed through utilizing the problem properties of feasibility and minimality. The second application is a rating prediction scheme, called DynFluid, based on the fluid dynamics. DynFluid analogizes the rating reference among the users in OSNs to the fluid flow among containers. The third application is an information cascade prediction framework: given the social current cascade and social topology, the number of propagated users at a future time slot is predicted. To reduce prediction time complexities, the spatiotemporal cascade information (a larger size of data) is decomposed to user characteristics (a smaller size of data) for subsequent predictions. All these three applications are based on the social network structure.
Temple University--Theses
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13

Poluri, Pavan Kamal Sudheendra. "Fault Tolerant Network-on-Chip Router Architectures for Multi-Core Architectures". Diss., The University of Arizona, 2014. http://hdl.handle.net/10150/338752.

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As the feature size scales down to deep nanometer regimes, it has enabled the designers to fabricate chips with billions of transistors. The availability of such abundant computational resources on a single chip has made it possible to design chips with multiple computational cores, resulting in the inception of Chip Multiprocessors (CMPs). The widespread use of CMPs has resulted in a paradigm shift from computation-centric architectures to communication-centric architectures. With the continuous increase in the number of cores that can be fabricated on a single chip, communication between the cores has become a crucial factor in its overall performance. Network-on-Chip (NoC) paradigm has evolved into a standard on-chip interconnection network that can efficiently handle the strict communication requirements between the cores on a chip. The components of an NoC include routers, that facilitate routing of data between multiple cores and links that provide raw bandwidth for data traversal. While diminishing feature size has made it possible to integrate billions of transistors on a chip, the advantage of multiple cores has been marred with the waning reliability of transistors. Components of an NoC are not immune to the increasing number of hard faults and soft errors emanating due to extreme miniaturization of transistor sizes. Faults in an NoC result in significant ramifications such as isolation of healthy cores, deadlock, data corruption, packet loss and increased packet latency, all of which have a severe impact on the performance of a chip. This has stimulated the need to design resilient and fault tolerant NoCs. This thesis handles the issue of fault tolerance in NoC routers. Within the NoC router, the focus is specifically on the router pipeline that is responsible for the smooth flow of packets. In this thesis we propose two different fault tolerant architectures that can continue to operate in the presence of faults. In addition to these two architectures, we also propose a new reliability metric for evaluating soft error tolerant techniques targeted towards the control logic of the NoC router pipeline. First, we present Shield, a fault tolerant NoC router architecture that is capable of handling both hard faults and soft errors in its pipeline. Shield uses techniques such as spatial redundancy, exploitation of idle resources and bypassing a faulty resource to achieve hard fault tolerance. The use of these techniques reveals that Shield is six times more reliable than baseline-unprotected router. To handle soft errors, Shield uses selective hardening technique that includes hardening specific gates of the router pipeline to increase its soft error tolerance. To quantify soft error tolerance improvement, we propose a new metric called Soft Error Improvement Factor (SEIF) and use it to show that Shield’s soft error tolerance is three times better than that of the baseline-unprotected router. Then, we present Soft Error Tolerant NoC Router (STNR), a low overhead fault tolerating NoC router architecture that can tolerate soft errors in the control logic of its pipeline. STNR achieves soft error tolerance based on the idea of dual execution, comparison and rollback. It exploits idle cycles in the router pipeline to perform redundant computation and comparison necessary for soft error detection. Upon the detection of a soft error, the pipeline is rolled back to the stage that got affected by the soft error. Salient features of STNR include high level of soft error detection, fault containment and minimum impact on latency. Simulations show that STNR has been able to detect all injected single soft errors in the router pipeline. To perform a quantitative comparison between STNR and other existing similar architectures, we propose a new reliability metric called Metric for Soft error Tolerance (MST) in this thesis. MST is unique in the aspect that it encompasses four crucial factors namely, soft error tolerance, area overhead, power overhead and pipeline latency overhead into a single metric. Analysis using MST shows that STNR provides better reliability while incurring low overhead compared to existing architectures.
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14

Long, Weili. "On the topology design of hose-model VPN networks /". View abstract or full-text, 2008. http://library.ust.hk/cgi/db/thesis.pl?ECED%202008%20LONG.

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15

Morley, George David. "Analysis and design of ring-based transport networks". Thesis, National Library of Canada = Bibliothèque nationale du Canada, 2001. http://www.collectionscanada.ca/obj/s4/f2/dsk3/ftp04/NQ60329.pdf.

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16

Tay, Wee Peng. "Decentralized detection in resource-limited sensor network architectures". Thesis, Massachusetts Institute of Technology, 2008. http://hdl.handle.net/1721.1/42910.

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Abstract (sommario):
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.
This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Includes bibliographical references (leaves 201-207).
We consider the problem of decentralized binary detection in a network consisting of a large number of nodes arranged as a tree of bounded height. We show that the error probability decays exponentially fast with the number of nodes under both a Neyman-Pearson criterion and a Bayesian criterion, and provide bounds for the optimal error exponent. Furthermore, we show that under the Neyman-Pearson criterion, the optimal error exponent is often the same as that corresponding to a parallel configuration, implying that a large network can be designed to operate efficiently without significantly affecting the detection performance. We provide sufficient, as well as necessary, conditions for this to happen. For those networks satisfying the sufficient conditions, we propose a simple strategy that nearly achieves the optimal error exponent, and in which all non-leaf nodes need only send 1-bit messages. We also investigate the impact of node failures and unreliable communications on the detection performance. Node failures are modeled by a Galton-Watson branching process, and binary symmetric channels are assumed for the case of unreliable communications. We characterize the asymptotically optimal detection performance, develop simple strategies that nearly achieve the optimal performance, and compare the performance of the two types of networks. Our results suggest that in a large scale sensor network, it is more important to ensure that nodes can communicate reliably with each other(e.g.,by boosting the transmission power) than to ensure that nodes are robust to failures. In the case of networks with unbounded height, we establish the validity of a long-standing conjecture regarding the sub-exponential decay of Bayesian detection error probabilities in a tandem network. We also provide bounds for the error probability, and show that under the additional assumption of bounded Kullback-Leibler divergences, the error probability is (e cnd ), for all d> 1/2, with c c(logn)d being a positive constant. Furthermore, the bound (e), for all d> 1, holds under an additional mild condition on the distributions. This latter bound is shown to be tight. Moreover, for the Neyman-Pearson case, we establish that if the sensors act myopically, the Type II error probabilities also decay at a sub-exponential rate.
(cont.) Finally, we consider the problem of decentralized detection when sensors have access to side-information that affects the statistics of their measurements, and the network has an overall cost constraint. Nodes can decide whether or not to make a measurement and transmit a message to the fusion center("censoring"), and also have a choice of the transmission function. We study the tradeoff in the detection performance with the cost constraint, and also the impact of sensor cooperation and global sharing of side-information. In particular, we show that if the Type I error probability is constrained to be small, then sensor cooperation is not necessary to achieve the optimal Type II error exponent.
by Wee Peng Tay.
Ph.D.
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17

Zoumpoulis, Spyridon Ilias. "Decentralized detection in sensor network architectures with feedback". Thesis, Massachusetts Institute of Technology, 2009. http://hdl.handle.net/1721.1/52775.

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Abstract (sommario):
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.
This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Cataloged from student-submitted PDF version of thesis.
Includes bibliographical references (p. 73-74).
We investigate a decentralized detection problem in which a set of sensors transmit a summary of their observations to a fusion center, which then decides which one of two hypotheses is true. The focus is on determining the value of feedback in improving performance in the regime of asymptotically many sensors. We formulate the decentralized detection problem for different network configurations of interest under both the Neyman-Pearson and the Bayesian criteria. In a configuration with feedback, the fusion center would make a preliminary decision which it would pass on back to the local sensors; a related configuration, the daisy chain, is introduced: the first fusion center passes the information from a first set of sensors on to a second set of sensors and a second fusion center. Under the Neyman-Pearson criterion, we provide both an empirical study and theoretical results. The empirical study assumes scalar linear Gaussian binary sensors and analyzes asymptotic performance as the signal-to-noise ratio of the measurements grows higher, to show that the value of feeding the preliminary decision back to decision makers is asymptotically negligible. This motivates two theoretical results: first, in the asymptotic regime (as the number of sensors tends to infinity), the performance of the "daisy chain" matches the performance of a parallel configuration with twice as many sensors as the classical scheme; second, it is optimal (in terms of the exponent of the error probability) to constrain all decision rules at the first and second stage of the "daisy chain" to be equal.
(cont.) Under the Bayesian criterion, three analytical results are shown. First, it is asymptotically optimal to have all sensors of a parallel configuration use the same decision rule under exponentially skewed priors. Second, again in the asymptotic regime, the decision rules at the second stage of the "daisy chain" can be equal without loss of optimality. Finally, the same result is proven for the first stage.
by Spyridon Ilias Zoumpoulis.
M.Eng.
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18

Belinkov, Yonatan. "Neural network architectures for Prepositional Phrase attachment disambiguation". Thesis, Massachusetts Institute of Technology, 2014. http://hdl.handle.net/1721.1/91147.

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Abstract (sommario):
Thesis: S.M. in Computer Science and Engineering, Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014.
This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
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Cataloged from student-submitted PDF version of thesis.
Includes bibliographical references (pages 41-44).
This thesis addresses the problem of Prepositional Phrase (PP) attachment disambiguation, a key challenge in syntactic parsing. In natural language sentences, a PP may often be attached to several possible candidates. While humans can usually identify the correct candidate successfully, syntactic parsers are known to have high error rated on this kind of construction. This work explores the use of compositional models of meaning in choosing the correct attachment location. The compositional model is defined using a recursive neural network. Word vector representations are obtained from large amounts of raw text and fed into the neural network. The vectors are first forward propagated up the network in order to create a composite representation, which is used to score all possible candidates. In training, errors are back-propagated down the network such that the composition matrix is updated from the supervised data. Several possible neural architectures are designed and experimentally tested in both English and Arabic data sets. As a comparative system, we offer a learning-to-rank algorithm based on an SVM classifier which has access to a wide range of features. The performance of this system is compared to the compositional models.
by Yonatan Belinkov.
S.M. in Computer Science and Engineering
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19

Motiwala, Murtaza. "An architecture for network path selection". Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/43576.

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Abstract (sommario):
Traditional routing protocols select paths based on static link weights and converge to new paths only when there is an outright reachability failure (such as a link or router failure). This design allows routing scale to hundreds of thousands of nodes, but it comes at the cost of functionality: routing provides only simple, single path connectivity. Networked applications in the wide-area, enterprise, and data center can all benefit from network protocols that allow traffic to be sent over multiple routes en route to a destination. This ability, also called multipath routing, has other significant benefits over single-path routing, such as more efficiently using network resources and recovering more quickly from network disruptions. This dissertation explores the design of an architecture for path selection in the network and proposes a "narrow waist" interface for networks to expose choice in routing traffic to end systems. Because most networks are also business entities, and are sensitive to the cost of routing traffic in their network, this dissertation also develops a framework for exposing paths based on their cost. For this purpose, this dissertation develops a cost model for routing traffic in a network. In particular, this dissertation presents the following contributions: * Design of path bits, a "narrow waist" for multipath routing. Our work ties a large number of multipath routing proposals by creating an interface (path bits) for decoupling the multipath routing protocols implemented by the network and end systems (or other network elements) making a choice for path selection. Path bits permit simple, scalable, and efficient implementations of multipath routing protocols in the network that still provide enough expressiveness for end systems to select alternate paths. We demonstrate that our interface is flexible and leads to efficient network implementations by building prototype implementations on different hardware and software platforms. * Design of path splicing, a multipath routing scheme. We develop, path splicing, a multipath routing technique, which uses random perturbations from the shortest path to create exponentially large number of paths with only a linear increase in state in a network. We also develop a simple interface to enable end systems to make path selection decisions. We present various deployment paths for implementing path splicing in both intradomain and interdomain routing on the Internet. * Design of low cost path-selection framework for a network. Network operators and end systems can have conflicting goals, where the network operators are concerned with saving cost and reducing traffic uncertainty; and end systems favor better performing paths. Exposing choice of routing in the network can thus, create a tension between the network operators and the end systems. We propose a path-selection framework where end systems make path selection decisions based on path performance and networks expose paths to end systems based on their cost to the network. This thesis presents a cost model for routing traffic in a network to enable network operators to reason about "what-if " scenarios and routing traffic on their network.
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McDonald, Kevin. "Modelling multi-layered network and security architectures using mathematical logic". Thesis, University of Aberdeen, 2014. http://digitool.abdn.ac.uk:80/webclient/DeliveryManager?pid=214154.

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Abstract (sommario):
Complex systems, be they natural or synthetic, are ubiquitous. In particular, complex networks of devices and services underpin most of society's operations. By their very nature, such systems are di cult to conceptualize and reason about e ectively. One seemingly natural notion, which helps to manage complexity and which is commonly found in discussions of complex systems, is that of layering: the system is considered to consist of a collection of interconnected layers that have distinct, identi able roles in the overall operations of the system. Noting that graphs are a key formalism in the description of complex systems, this thesis establishes a notion of a layered graph. A logical characterization of this notion of layering using a non-associative, non-commutative substructural, sepa- rating logic is provided. In addition, soundness and completeness results for a class of algebraic models that includes layered graphs are provided, which give a math- ematically substantial semantics to this very weak logic. Examples in information processing and security are used to show the applicability of the logic. The examples given use an informal notion of action. The thesis also presents a discussion of a number of possible languages that could be used to provide a dynamic extension of the logic. The key components of each language are identi ed and the semantics that would be required in the case of a full, theoretical, development are presented. Examples, mainly in access control, are used to illustrate situations where each extension could be applied. The logic is then used to describe a uniform logical framework for reasoning compositionally about access control policy models. The approach takes account of the underlying system architecture, and so provides a way to identify and reason about how vulnerabilities may arise (and be removed) as a result of the architecture of the system. The logic is then used to describe a uniform logical framework for reasoning compositionally about access control policy models. The approach takes account of the underlying system architecture, and so provides a way to identify and reason about how vulnerabilities may arise (and be removed) as a result of the architecture of the system. Using frame rules, it is also considered how local properties of access control policies are maintained as the system architecture evolves.
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Wang, Kongxun. "Performance optimization with integrated consideration of routing, flow control, and congestion control in packet-switched networks". Diss., Georgia Institute of Technology, 1991. http://hdl.handle.net/1853/8305.

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Al-Amoudi, Ahmed. "Evaluation of virtual routing appliances as routers in a virtual environment /". Online version of thesis, 2008. http://hdl.handle.net/1850/7544.

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23

Venkateshwaran, Anjali. "An experimental investigation of dynamically reconfigurable computer network architectures through simulation". Thesis, Virginia Tech, 1988. http://hdl.handle.net/10919/43066.

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Abstract (sommario):
The research described in this thesis is divided conveniently into three components: (1) the credibility assessment of a simulation model for the investigation of dynamically reconfigurable computer network architectures, (2) a comparative study of the standardized time series method of simulation output analysis, and (3) an experimental comparison of the effects of dynamic reconfigurability on message transmission delays and network throughput. The credibility assessment relies almost completely on verification procedures applied to both communicative and program representations of the model. In the absence of an extant system, validation consists of extensive, program traces to assure that model behavior matches expectations and reflects no inconsistencies. Application of a standardized time series technique produces the advantages reported by other researchers with regard to sampling efficiency (information derived per sample unit) when dynamic reconfigurability is precluded. The inherent non-stationarity induced by reconfiguration reveals the sensitivity of standardized time series and the consequent adjustment to preserve coverage. A compromise between coverage and sampling efficiency prompts the choice of the batch means method for experimental comparison. Experimental comparison shows that under high traffic variability reconfigurability
Master of Science
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Chakravorty, Sham. "An optimization analysis of frame architecture in selected protocols". Master's thesis, This resource online, 1993. http://scholar.lib.vt.edu/theses/available/etd-04272010-020044/.

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Tsietsi, Mosiuoa. "Prototyping a peer-to-peer session initiation protocol user agent /". [S.l. : s.n.], 2008. http://eprints.ru.ac.za/1115/.

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Zhao, Wenrui. "Routing and Network Design in Delay Tolerant Networks". Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/14085.

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Abstract (sommario):
Delay tolerant networks (DTNs) are a class of emerging networks that exhibit significantly different characteristics from today's Internet, such as intermittent connectivity, large delay, and high loss rates. DTNs have important applications in disaster relief, military, rural Internet access, environmental sensing and surveillance, interplanetary communication, underwater sensing, and vehicular communication. While not the common case for networking, DTNs represent some of the most critical cases, where the ability to communicate can make a huge difference for human lives. Supporting effective communication in DTNs, however, is challenging. First, with intermittent connectivity, DTNs are often extremely limited in capacity. Second, given resource limitations and uncertainty in DTNs, it is critical to deliver data efficiently and robustly. The situation is especially acute for multicast which sends data to multiple destinations. This thesis seeks to address these two issues. To enhance network capacity in DTNs, we propose a message ferrying scheme that exploits the use of special mobile nodes (called message ferries) and controlled device mobility to deliver data. Message ferries are utilized to transport data via mobility between sources and destinations. We develop a foundation for the control of the mobility of message ferries, and nodes if possible, to cooperatively deliver data under a variety of conditions. We also study another approach which deploys new nodes called throwboxes to enhance capacity. Throwboxes are small and inexpensive wireless devices. By relaying data between mobile nodes, throwboxes are able to create data transfer opportunities that otherwise would not exist. We systematically investigate the issues of deployment and routing, and develop algorithms for various deployment and routing approaches. Based on extensive evaluation, we obtain several findings to guide the design and operation of throwbox-augmented DTNs. To address the issue of efficient and robust data delivery, we focus on DTN multicasting. Given the unique characteristics of DTNs, traditional solutions such as IP multicast can not be simply ported to DTNs. We identify the limitations of IP multicast semantics in DTNs and define new semantic models for DTN multicast. Based on these semantic models, we develop and evaluate several multicast routing algorithms with different routing strategies.
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Franovic, Tin. "Cortex inspired network architectures for spatio-temporal information processing". Thesis, KTH, Skolan för datavetenskap och kommunikation (CSC), 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-142453.

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Abstract (sommario):
The abundance of high-dimensional datasets provides scientists with a strong foundation in their research. With high-performance computing platforms becoming increasingly available and more powerful, large-scale data processing represents an important step toward modeling and understanding the underlying processes behind such data. In this thesis, we propose a general cortex-inspired information processing network architecture capable of capturing spatio-temporal correlations in data and forming distributed representations as cortical activation patterns. The proposed architecture has a modular and multi-layered organization which is efficiently parallelized to allow large-scale computations. The network allows unsupervised processing of multivariate stochastic time series, irregardless of the data source, producing a sparse de-correlated representation of the input features expanded by time delays. The features extracted by the architecture are then used for supervised learning with Bayesian confidence propagation neural networks and evaluated on speech classification and recognition tasks. Due to their rich temporal dynamics, we exploited auditory signals for speech recognition as an use case for performance evaluation. In terms of classification performance, the proposed architecture outperforms modern machine-learning methods such as support vector machines and obtains results comparable to other stateof-the-art speech recognition methods. The potential of the proposed scalable cortex-inspired approach to capture meaningful multivariate temporal correlations and provide insight into the model-free high- dimensional data decomposition basis is expected to be of particular use in the analysis of large brain signal datasets such as EEG or MEG.
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28

Mummaneni, Avanthi. "Analysis of the enzymatic network". Diss., Columbia, Mo. : University of Missouri-Columbia, 2005. http://hdl.handle.net/10355/4285.

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Abstract (sommario):
Thesis (M.S.)--University of Missouri-Columbia, 2005.
The entire dissertation/thesis text is included in the research.pdf file; the official abstract appears in the short.pdf file (which also appears in the research.pdf); a non-technical general description, or public abstract, appears in the public.pdf file. Title from title screen of research.pdf file viewed on (January 22, 2007) Includes bibliographical references.
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29

Weinstein, Lee. "Scale free networks and their power law distribution". Diss., Connect to the thesis, 2005. http://hdl.handle.net/10066/3880.

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30

Baker, Thomas Edward. "Implementation limits for artificial neural networks". Full text open access at:, 1990. http://content.ohsu.edu/u?/etd,268.

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31

May, Norman L. "Fault simulation of a wafer-scale neural network". Full text open access at:, 1988. http://content.ohsu.edu/u?/etd,159.

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32

Mastichiadis, Theodoros N. "Local Area Network architectures using spread spectrum with mesh topologies". Thesis, City University London, 1992. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.332585.

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33

Le, Tung Thanh. "Optimizing Network-on-Chip Designs for Heterogeneous Many-Core Architectures". Thesis, University of Louisiana at Lafayette, 2019. http://pqdtopen.proquest.com/#viewpdf?dispub=10981900.

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Abstract (sommario):

On-chip Interconnection Networks are shifting from multicore to manycore systems and are tending to be heterogeneous with the integrated modules from different vendors of various sizes and shapes. Each module has different properties such as routers, link-width. From a system designer's perspective, making layouts of metal-wired links among interconnection modules for communication will be impractical as it increases the design cost in terms of the communication complexity and power leakage on these links. We can replace all links with wireless or optical links for high-performance, reducing latency. However, it comes with a high-cost. Therefore, we formulate the optimization model to minimize the cost (communication links between subnets) and maximize their data flows in the network-on-chip.

Since the optimization model using the optimizers such as CPLEX and Gurobi to achieve the best possible solutions, the solution time to a large set of given problems is not acceptable. Hence, we present a mincostflow-based heuristic algorithm (LINCA) that minimizes the quantification of hybrid routers corresponding to the application-specific traffic for manycore systems. LINCA guarantees the performance of hybrid networks on chip. Its results are validated against the manycore system architecture. Our evaluation shows that LINCA can significantly reduce the cost of using hybrid routers (communication links) in the manycore systems. It reduces cost by 84 percent on average across a variety of applications, compared with all of hybrid routers being deployed in the network without using the optimization model. However, we observed that the solution time of LINCA is increased exponentially for large scale networks. We then proposed an efficient predictive framework for optimized reconfiguring on-chip interconnection network.

The predictive model is built based on the optimization model and learning-based algorithms. As we wish to reduce the communication complexity of the interconnection links in the entire on-chip network, our objective is to minimize those links corresponding to the application-specific traffic demands. Thereby, the overall power dissipation can be mitigated. We believe that our approach will be an essential step when scaling out.

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34

Fang, Jun-Wai 1960. "Design and performance evaluation of a proposed backbone network for PC-Networks interconnection". Thesis, The University of Arizona, 1989. http://hdl.handle.net/10150/276941.

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Abstract (sommario):
This thesis is concerned with the design of a high-speed backbone network which provides a high bandwidth interconnection for various Personal Computer Networks (PC-Networks) with an integrated service of voice and data. With the advanced technology of optical fiber as the transmission medium, several different existing topologies and protocols are discussed for the backbone network design. The token ring protocol is simulated and evaluated to find out a suitable buffer size and the length of voice and data packet for backbone network. The Network II.5 simulation tool is applied to simulate the token ring simulation model with different parameters. The Network Interface Unit (NIU) is designed from the simulation results with a cost-effective consideration.
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35

Balaji, Pavan. "High performance communication support for sockets-based applications over high-speed networks". Columbus, Ohio : Ohio State University, 2006. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1150482661.

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36

Yan, Wei. "Synchronization, buffer management, and multicast routing in multimedia networks". Diss., Georgia Institute of Technology, 1997. http://hdl.handle.net/1853/13426.

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37

Hui, Pan, e 許彬. "UNO: enabling person-centered and person-based computing". Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2004. http://hub.hku.hk/bib/B30150681.

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38

龍浩生 e Ho-sang Anthony Loong. "Improvements on system support for network protocol infrastructure development". Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 1994. http://hub.hku.hk/bib/B31211719.

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39

Loong, Ho-sang Anthony. "Improvements on system support for network protocol infrastructure development /". [Hong Kong : University of Hong Kong], 1994. http://sunzi.lib.hku.hk/hkuto/record.jsp?B13730873.

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40

Ruyter, Masood. "The measurement of enterprise architecture to add value to small and medium enterprises". Thesis, Cape Peninsula University of Technology, 2012. http://hdl.handle.net/20.500.11838/2293.

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Abstract (sommario):
Thesis (MTech (Information Technology))--Cape Peninsula University of Technology, 2012.
South Africa has a complex financial and retail service industry with high reliance on the use of IT systems to ensure effectiveness and maintainability. Decision making and improved outcomes may be done through an IT aligned enterprise architecture (EA) strategy. EA is a capability that contributes to the support and success of an organisations' IT. Organisations are currently using EA to better align IT and the business strategy which provides a comprehensive v.ew of the IT system. Thus, EA is increasing in organisations yet the measurement and value of EA is limited to organisations and enterprise architects. The discussions of the benefits and value of EA has been discussed for several years, however there are still no consensus about how the benefits and value of EA can be measured. The lack and clear understanding of the benefits and value of EA needs to consider different aspects of IT as well as the shareholders when measuring the benefits and value of EA to an organisation.
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41

Zhao, Xiaogeng. "An adaptive approach for optimized opportunistic routing over Delay Tolerant Mobile Ad hoc Networks". Thesis, Rhodes University, 2008. http://hdl.handle.net/10962/d1004822.

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This thesis presents a framework for investigating opportunistic routing in Delay Tolerant Mobile Ad hoc Networks (DTMANETs), and introduces the concept of an Opportunistic Confidence Index (OCI). The OCI enables multiple opportunistic routing protocols to be applied as an adaptive group to improve DTMANET routing reliability, performance, and efficiency. The DTMANET is a recently acknowledged networkarchitecture, which is designed to address the challenging and marginal environments created by adaptive, mobile, and unreliable network node presence. Because of its ad hoc and autonomic nature, routing in a DTMANET is a very challenging problem. The design of routing protocols in such environments, which ensure a high percentage delivery rate (reliability), achieve a reasonable delivery time (performance), and at the same time maintain an acceptable communication overhead (efficiency), is of fundamental consequence to the usefulness of DTMANETs. In recent years, a number of investigations into DTMANET routing have been conducted, resulting in the emergence of a class of routing known as opportunistic routing protocols. Current research into opportunistic routing has exposed opportunities for positive impacts on DTMANET routing. To date, most investigations have concentrated upon one or other of the quality metrics of reliability, performance, or efficiency, while some approaches have pursued a balance of these metrics through assumptions of a high level of global knowledge and/or uniform mobile device behaviours. No prior research that we are aware of has studied the connection between multiple opportunistic elements and their influences upon one another, and none has demonstrated the possibility of modelling and using multiple different opportunistic elements as an adaptive group to aid the routing process in a DTMANET. This thesis investigates OCI opportunities and their viability through the design of an extensible simulation environment, which makes use of methods and techniques such as abstract modelling, opportunistic element simplification and isolation, random attribute generation and assignment, localized knowledge sharing, automated scenario generation, intelligent weight assignment and/or opportunistic element permutation. These methods and techniques are incorporated at both data acquisition and analysis phases. Our results show a significant improvement in all three metric categories. In one of the most applicable scenarios tested, OCI yielded a 31.05% message delivery increase (reliability improvement), 22.18% message delivery time reduction (performance improvement), and 73.64% routing depth decrement (efficiency improvement). We are able to conclude that the OCI approach is feasible across a range of scenarios, and that the use of multiple opportunistic elements to aid decision-making processes in DTMANET environments has value.
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42

McFarlane, Roger D. P. "Network software architectures for real-time massively multiplayer online games". Thesis, McGill University, 2004. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=18200.

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A real-time massively multiplayer online game (MMOG) is a networked computer or video game in which tens of thousands to hundreds of thousands of consumers may interact with one another in real-time in a shared environment, even though these users may be separated by vast geographic distances. Game industry analysis highlights trends indicating that online game usage and market penetration will grow significantly over the next five to ten years. As such, game developers and entertainment companies seek to offer subscription based mass-market online games. However, the risks, costs and complexity involved in the successful development and operation of a scalable online game service are high, in part due to lack of well established and understood models for the network software architecture of such a product. This thesis explores the literature and research regarding distributed military simulation, academic networked virtual environments, and commercial online gaming in search of patterns for network software architectures which are applicable to massively multiplayer online games. It is the hope of the author to contribute to this cross pollination of ideas by providing a thorough review of the techniques and approaches for the design and implementation of large scale distributed systems having properties similar to those found in a massively multiplayer online game system. In this way, perhaps the cost, complexity, and risk involved in building a massively multiplayer online game service can be reduced.
Un jeu en ligne massivement multi joueurs en temps réel est un jeu vidéo ou d'ordinateur géré en réseau dans lequel des dizaines à des centaines de milliers de consommateurs peuvent interagir entre eux en temps réel dans un environnement partagé, et ce même s’ils sont répartis dans des régions géographiques très distantes. Les analyses de l’industrie du jeu démontrent que l'utilisation et la pénétration de marché du jeu en ligne se développeront de manière significative au cours des cinq à dix prochaines années. Ceci explique que les développeurs de jeu et les compagnies de divertissement cherchent à offrir à un marché grand public des jeux en ligne basés sur un abonnement. Cependant, les risques, les coûts et la complexité impliqués dans le développement et l'opération d’un service de jeu en ligne sont élevés, dû en partie au manque de modèles bien établis et compris pour l'architecture de logiciels de réseau de tels produits. Cette thèse explore la littérature et la recherche concernant la simulation militaire distribuée, les environnements académiques virtuels gérés en réseau, et le jeu en ligne commercial à la recherche de modèles pour les architectures de logiciels de réseau qui sont applicables aux jeux en ligne massivement multi joueurs. C'est l'espoir de l'auteur de contribuer à cette pollinisation d’idées en fournissant un examen complet des techniques et des approches utilisés dans la conception et l'implémentation de systèmes répartis à grande échelle ayant des propriétés semblables à celles que l’on retrouve dans les systèmes de jeu en ligne massivement multi joueurs. De cette façon, peut-être, le coût, la complexité et le risque impliqués dans la réalisation d’un service de jeu en ligne massivement multi joueur pourront être réduits. fr
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43

Li, Dawei. "On the Design and Analysis of Cloud Data Center Network Architectures". Diss., Temple University Libraries, 2016. http://cdm16002.contentdm.oclc.org/cdm/ref/collection/p245801coll10/id/413608.

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Abstract (sommario):
Computer and Information Science
Ph.D.
Cloud computing has become pervasive in the IT world, as well as in our daily lives. The underlying infrastructures for cloud computing are the cloud data centers. The Data Center Network (DCN) defines what networking devices are used and how different devices are interconnected in a cloud data center; thus, it has great impacts on the total cost, performances, and power consumption of the entire data center. Conventional DCNs use tree-based architectures, where a limited number of high-end switches and high-bandwidth links are used at the core and aggregation levels to provide required bandwidth capacity. A conventional DCN often suffers from high expenses and low fault-tolerance, because high-end switches are expensive and a failure of such a high-end switch will result in disastrous consequences in the network. To avoid the problems and drawbacks in conventional DCNs, recent works adopt an important design principle: using Commodity-Off-The-Shelf (COTS) cheap switches to scale out data centers to large sizes, instead of using high-end switches to scale up data centers. Based on this scale-out principle, a large number of novel DCN architectures have been proposed. These DCN architectures are classified into two categories: switch-centric and server-centric DCN architectures. In both switch-centric and server-centric architectures, COTS switches are used to scale out the network to a large size. In switch-centric DCNs, routing intelligence is placed on switches; each server usually uses only one port of the Network Interface Card (NIC) to connect to the switches. In server-centric DCNs, switches are only used as dummy cross-bars; servers in the network serve as both computation nodes and packet forwarding nodes that connect switches and other servers, and routing intelligence is placed on servers, where multiple NIC ports may be used. This dissertation considers two fundamental problems in designing DCN architectures using the scale-out principle. The first problem considers how to maximize the total number of dual-port servers in a server-centric DCN given a network diameter constraint. Motivated by the Moore Bound, which provides the upper bound on the number of nodes in a traditional graph given a node degree and diameter, we give an upper bound on the maximum number of dual-port servers in a DCN, given a network diameter constraint and a switch port number. Then, we propose three novel DCN architectures, SWCube, SWKautz, and SWdBruijn, whose numbers of servers are close to the upper bound, and are larger than existing DCN architectures in most cases. SWCube is based on the generalized hypercube. SWCube accommodates a comparable number of servers to that of DPillar, which is the largest existing one prior to our work. SWKautz and SWdBruijn are based on the Kautz graph and the de Bruijn graph, respectively. They always accommodate more servers than DPillar. We investigate various properties of SWCube, SWKautz, and SWdBruijn; we also compare them with various existing DCN architectures and demonstrate their advantages over existing architectures. The second problem focuses on the tradeoffs between network performances and power consumption in designing DCN architectures. We have two motivations for our work. The first one is that most existing works take extreme designs in terms of improving network performances and reducing the power consumption. Some DCNs use too many networking devices to improve the performances; their power consumption is very high. Other DCNs use two few networking devices, and their performances are very poor. We are interested in exploring the quantitative tradeoffs between network performances and power consumption in designing DCN architectures. The second motivation is that there do not exist important unified performance and power consumption metrics for general DCNs. Thus, we propose two important unified performance and power consumption metrics. Then, we propose three novel DCN architectures that achieve important tradeoff points in the design spectrum: FCell, FSquare, and FRectangle. Besides, we find that in all these three new architectures, routing intelligence can be placed on both servers and switches; thus they enjoy the advantages of both switch-centric and server-centric architectures, and can be regarded as a new category of DCN architectures, the dual-centric DCN architectures. We also investigate various other properties for our proposed architectures and verify that they are excellent candidates for practical cloud data centers.
Temple University--Theses
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44

Pattabiraman, Aishwariya. "Heterogeneous Cache Architecture in Network-on-Chips". University of Cincinnati / OhioLINK, 2011. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1321371508.

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45

Tsietsi, Mosiuoa Jeremia. "Prototyping a peer-to-peer session initiation protocol user agent". Thesis, Rhodes University, 2008. http://hdl.handle.net/10962/d1006603.

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Abstract (sommario):
The Session Initiation Protocol (SIP) has in recent years become a popular protocol for the exchange of text, voice and video over IP networks. This thesis proposes the use of a class of structured peer to peer protocols - commonly known as Distributed Hash Tables (DHTs) - to provide a SIP overlay with services such as end-point location management and message relay, in the absence of traditional, centralised resources such as SIP proxies and registrars. A peer-to-peer layer named OverCord, which allows the interaction with any specific DHT protocol via the use of appropriate plug-ins, was designed, implemented and tested. This layer was then incorporated into a SIP user agent distributed by NIST (National Institute of Standards and Technology, USA). The modified user agent is capable of reliably establishing text, audio and video communication with similarly modified agents (peers) as well as conventional, centralized SIP overlays.
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46

Krehling, Daniel E. "Implementing remote image capture/control in a wireless Sensor network utilizing the IEEE 802.15.4 standard". Thesis, Monterey, California : Naval Postgraduate School, 2009. http://edocs.nps.edu/npspubs/scholarly/theses/2009/Sep/09Sep%5FKrehling.pdf.

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Abstract (sommario):
Thesis (M.S. in Computer Science)--Naval Postgraduate School, September 2009.
Thesis Advisor(s): Gibson, John ; Singh, Gurminder. "September 2009." Description based on title screen as viewed on 5 November 2009. Author(s) subject terms: IEEE 802.15.4, wireless sensor network, remote imaging, wireless. Includes bibliographical references (p. 79-81). Also available in print.
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47

謝紹康 e Siu-hong Savio Tse. "The performance of interval routing in general networks". Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 1997. http://hub.hku.hk/bib/B31236200.

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48

Tse, Siu-hong Savio. "The performance of interval routing in general networks /". Hong Kong : University of Hong Kong, 1997. http://sunzi.lib.hku.hk/hkuto/record.jsp?B1863574X.

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49

Bahr, Casey S. "Anne : another neural network emulator /". Full text open access at:, 1988. http://content.ohsu.edu/u?/etd,173.

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50

Kumar, Mohan J. "Architecture, Performance and Applications of a Hierarchial Network of Hypercubes". Thesis, Indian Institute of Science, 1992. https://etd.iisc.ac.in/handle/2005/3925.

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Abstract (sommario):
This thesis, presents a multiprocessor topology, the hierarchical network of hyper-cubes, which has a low diameter, low degree of connectivity and yet exhibits hypercube like versatile characteristics. The hierarchical network of hyper-cubes consists of k-cubes interconnected in two or more hierarchical levels. The network has a hierarchical, expansive, recursive structure with a constant pre-defined building block. The basic building block of the hierarchical network of hyper-cubes comprises of a k-cube of processor elements and a network controller. The hierarchical network of hyper-cubes retains the positive features of the k-cube at different levels of hierarchy and has been found to perform better than the binary hypercube in executing a variety of application problems. The ASCEND/DESCEND class of algorithms can be executed in O(log2 N) parallel steps (N is the number of data elements) on a hierarchical network of hypercubes with N processor elements. A description of the topology of the hierarchical network of hypercubes is presented and its architectural potential in terms of fault-tolerant message routing, executing a class of highly parallel algorithms, and in simulating artificial neural networks is analyzed. Further, the proposed topology is found to be very efficient in executing multinode broadcast and total exchange algorithms. We subsequently, propose an improvisation of the network to counter faults, and explore implementation of artificial neural networks to demonstrate efficient implementation of application problems on the network. The fault-tolerant capabilities of the hierarchical network of hypercubes with two network controllers per k-cube of processor elements are comparable to those of the hypercube and the folded hypercube. We also discuss various issues related to the suitability of multiprocessor architectures for simulating neural networks. Performance analysis of ring, hypercube, mesh and hierarchical network of hypercubes for simulating artificial neural networks is presented. Our studies reveal that the performance of the hierarchical network of hypercubes is better than those of ring, mesh, hypernet and hypercube topologies in implementing artificial neural networks. Design and implementation aspects of hierarchical network of hypercubes based on two schemes, viz., dual-ported RAM communication, and transputers are also presented. Results of simulation studies for robotic applications using neural network paradigms on the transputer-based hierarchical network of hypercubes reveal that the proposed network can produce fast response times of the order of hundred microseconds.
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