Indice
Letteratura scientifica selezionata sul tema "Architecture parallelisante"
Cita una fonte nei formati APA, MLA, Chicago, Harvard e in molti altri stili
Consulta la lista di attuali articoli, libri, tesi, atti di convegni e altre fonti scientifiche attinenti al tema "Architecture parallelisante".
Accanto a ogni fonte nell'elenco di riferimenti c'è un pulsante "Aggiungi alla bibliografia". Premilo e genereremo automaticamente la citazione bibliografica dell'opera scelta nello stile citazionale di cui hai bisogno: APA, MLA, Harvard, Chicago, Vancouver ecc.
Puoi anche scaricare il testo completo della pubblicazione scientifica nel formato .pdf e leggere online l'abstract (il sommario) dell'opera se è presente nei metadati.
Articoli di riviste sul tema "Architecture parallelisante"
Szénási, Sándor. "Solving the inverse heat conduction problem using NVLink capable Power architecture". PeerJ Computer Science 3 (20 novembre 2017): e138. http://dx.doi.org/10.7717/peerj-cs.138.
Testo completoTaygan, Ugur, e Adnan Ozsoy. "Performance analysis and GPU parallelisation of ECO object tracking algorithm". New Trends and Issues Proceedings on Advances in Pure and Applied Sciences, n. 12 (30 aprile 2020): 109–18. http://dx.doi.org/10.18844/gjpaas.v0i12.4991.
Testo completoRice, J. E., e K. B. Kent. "Case studies in determining the optimal field programmable gate array design for computing highly parallelisable problems". IET Computers & Digital Techniques 3, n. 3 (2009): 247. http://dx.doi.org/10.1049/iet-cdt.2008.0042.
Testo completoDyubele, Sithembiso, e Duncan Anthony Coulter. "A Hybrid Agent-Oriented Stochastic Diffusion Search and Beam Search Architecture". International Conference on Intelligent and Innovative Computing Applications 2024 (30 novembre 2024): 214–24. https://doi.org/10.59200/iconic.2024.023.
Testo completoHaveraaen, Magne. "Machine and Collection Abstractions for User-Implemented Data-Parallel Programming". Scientific Programming 8, n. 4 (2000): 231–46. http://dx.doi.org/10.1155/2000/485607.
Testo completoPeakman, Aiden, Thomas Bennett, Kerr Fitzgerald, Robert Gregg e Glyn Rossiter. "NEXUS FRAMEWORK FOR WHOLE-CORE FUEL PERFORMANCE: CURRENT APPLICATIONS AND FUTURE TRENDS". EPJ Web of Conferences 247 (2021): 12001. http://dx.doi.org/10.1051/epjconf/202124712001.
Testo completoJiang, Xinyu, Chenfei Ma e Kianoush Nazarpour. "Posture-invariant myoelectric control with self-calibrating random forests". Frontiers in Neurorobotics 18 (4 dicembre 2024). https://doi.org/10.3389/fnbot.2024.1462023.
Testo completoTang, Duowei, Peter Kuppens, Luc Geurts e Toon van Waterschoot. "End-to-end speech emotion recognition using a novel context-stacking dilated convolution neural network". EURASIP Journal on Audio, Speech, and Music Processing 2021, n. 1 (12 maggio 2021). http://dx.doi.org/10.1186/s13636-021-00208-5.
Testo completoTesi sul tema "Architecture parallelisante"
Louetsi, Kenelm. "Un environnement de développement d'applications sur un processeur à beaucoup de cœurs parallélisant". Electronic Thesis or Diss., Perpignan, 2024. http://www.theses.fr/2024PERP0024.
Testo completoDigital objects of the future (domestic robots, autonomous vehicles, automatic spacecraft, ...) will need both computing power and safety. The Little Big Processor (LBP) is suitable for this challenge: it has an innovative approach to parallelism which offers the advantages of computing power while guaranteeing a certain determinism of execution. This execution determinism brings a level of operational safety essential in most devices interacting with the world and humans. In the present thesis we created a development environment for LBP, with a compiler, a loader and a debugger. These tools are classic but in this case, they will have to be adapted to the implementation of parallelized OpenMP applications for LBP. Following the creation of the development environment, we defined a deterministic parallel model for embedded bare-metal. This model has been evaluated on a embedded bare-metal platform, and this allowed us to confirm that it is possible to have a deterministic parallel execution which keeps the performance speedups from parallelism