Littérature scientifique sur le sujet « Threshold circuits, quantum many-valued gates »

The spatial wavefunction-switched field-effect transistor (SWSFET) is one of the promising quantum well devices that transfers electrons from one quantum well channel to the other channel based on the applied gate voltage. This eliminates the use of more transistors as we have coupled channels in the same device operating at different threshold voltages. This feature can be exploited in many digital integrated circuits thus reducing the count of transistors which translates to less die area. The simulations of basic sequential circuits like SR latch, D latch and flip flop are presented here using SWSFET based logic gates. The circuit model of a SWSFET was developed using Berkeley short channel IGFET model (BSIM 3).

Quantum computational supremacy arguments, which describe a way for a quantum computer to perform a task that cannot also be done by a classical computer, typically require some sort of computational assumption related to the limitations of classical computation. One common assumption is that the polynomial hierarchy (PH) does not collapse, a stronger version of the statement that P≠NP, which leads to the conclusion that any classical simulation of certain families of quantum circuits requires time scaling worse than any polynomial in the size of the circuits. However, the asymptotic nature of this conclusion prevents us from calculating exactly how many qubits these quantum circuits must have for their classical simulation to be intractable on modern classical supercomputers. We refine these quantum computational supremacy arguments and perform such a calculation by imposing fine-grained versions of the non-collapse conjecture. Our first two conjectures poly3-NSETH(a) and per-int-NSETH(b) take specific classical counting problems related to the number of zeros of a degree-3 polynomial in n variables over F2 or the permanent of an n×n integer-valued matrix, and assert that any non-deterministic algorithm that solves them requires 2cn time steps, where c∈{a,b}. A third conjecture poly3-ave-SBSETH(a′) asserts a similar statement about average-case algorithms living in the exponential-time version of the complexity class SBP. We analyze evidence for these conjectures and argue that they are plausible when a=1/2, b=0.999 and a′=1/2.Imposing poly3-NSETH(1/2) and per-int-NSETH(0.999), and assuming that the runtime of a hypothetical quantum circuit simulation algorithm would scale linearly with the number of gates/constraints/optical elements, we conclude that Instantaneous Quantum Polynomial-Time (IQP) circuits with 208 qubits and 500 gates, Quantum Approximate Optimization Algorithm (QAOA) circuits with 420 qubits and 500 constraints and boson sampling circuits (i.e. linear optical networks) with 98 photons and 500 optical elements are large enough for the task of producing samples from their output distributions up to constant multiplicative error to be intractable on current technology. Imposing poly3-ave-SBSETH(1/2), we additionally rule out simulations with constant additive error for IQP and QAOA circuits of the same size. Without the assumption of linearly increasing simulation time, we can make analogous statements for circuits with slightly fewer qubits but requiring 104 to 107 gates.

Compared to multi-valued logic (MVL) with conventional 2-state FETs with a single threshold, MVL computing architectures, based on 4-state SWS (Spatial wavefunction switched) and QDG (quantum dot gate)-FETs having multiple thresholds, results in reduced device count, higher clock (CLK) speed, and lower power consumption. We have experimentally shown multi-state characteristics in SWS-FETs as well as QDG-FETs. This paper presents a novel QDG-SWS-FET that: (1) functions as a multi-bit FET for efficient low-power logic, (2) can be configured as a quantum dot (QD) nonvolatile random access memory (NVRAM), and (3) is suitable for in-memory MVL computing architecture that are compatible with sub-7nm technology nodes. A QDG-SWS-FET with the addition of a control gate dielectric layer functions as a NVRAM cell. Furthermore, it is shown that one single SWS-QD-NVRAM cell gives the functionality of a 1-bit NAND. We have developed circuit/device models and performed quantum simulations for novel multi-layer quantum dot/quantum well FETs and NVRAMs. Our simulations have shown 4-states/2-bit output-input transfer characteristics in SWS-CMOS inverters and NAND gates using two Si/SiGe quantum well channels.

The momentum and position observables in an [Formula: see text]-mode boson Fock space [Formula: see text] have the whole real line [Formula: see text] as their spectrum. But the total number operator [Formula: see text] has a discrete spectrum [Formula: see text]. An [Formula: see text]-mode Gaussian state in [Formula: see text] is completely determined by the mean values of momentum and position observables and their covariance matrix which together constitute a family of [Formula: see text] real parameters. Starting with [Formula: see text] and its unitary conjugates by the Weyl displacement operators and operators from a representation of the symplectic group [Formula: see text] in [Formula: see text], we construct [Formula: see text] observables with spectrum [Formula: see text] but whose expectation values in a Gaussian state determine all its mean and covariance parameters. Thus measurements of discrete-valued observables enable the tomography of the underlying Gaussian state and it can be done by using five one-mode and four two-mode Gaussian symplectic gates in single and pair mode wires of [Formula: see text]. Thus the tomography protocol admits a simple description in a language similar to circuits in quantum computation theory. Such a Gaussian tomography applied to outputs of a Gaussian channel with coherent input states permit a tomography of the channel parameters. However, in our procedure the number of counting measurements exceeds the number of channel parameters slightly. Presently, it is not clear whether a more efficient method exists for reducing this tomographic complexity. As a byproduct of our approach an elementary derivation of the probability generating function of [Formula: see text] in a Gaussian state is given. In many cases the distribution turns out to be infinitely divisible and its underlying Lévy measure can be obtained. However, we are unable to derive the exact distribution in all cases. Whether this property of infinite divisibility holds in general is left as an open problem.

Abstract We investigate how the addition of quantum resources changes the statistical complexity of quantum circuits by utilizing the framework of quantum resource theories. Measures of statistical complexity that we consider include the Rademacher complexity and the Gaussian complexity, which are well-known measures in computational learning theory that quantify the richness of classes of real-valued functions. We derive bounds for the statistical complexities of quantum circuits that have limited access to certain resources and apply our results to two special cases: (1) stabilizer circuits that are supplemented with a limited number of T gates and (2) instantaneous quantum polynomial-time Clifford circuits that are supplemented with a limited number of CCZ gates. We show that the increase in the statistical complexity of a quantum circuit when an additional quantum channel is added to it is upper bounded by the free robustness of the added channel. Moreover, as noise in quantum systems is a major obstacle to implementing many quantum algorithms on large quantum circuits, we also study the effects of noise on the Rademacher complexity of quantum circuits. Finally, we derive bounds for the generalization error associated with learning from training data arising from quantum circuits.

Spin qubits in silicon-based semiconductor quantum dots have become one of the prominent candidates for realizing fault-tolerant quantum computing due to their long coherence time, good controllability, and compatibility with modern advanced integrated circuit manufacturing processes. In recent years, thanks to the remarkable progress made in silicon-based materials, structure of quantum dot and its fabrication process, and qubit manipulation technology, high-fidelity state preparation and readout, single- and two-qubit gates have been demonstrated for silicon spin qubits. The control fidelities for single- and two-qubit gates all exceed 99%—fault tolerance threshold required by the surface code known for its exceptionally high tolerance to errors. In this paper, we briefly introduce the basic concepts of silicon-based semiconductor quantum dots, discuss the state-of-art technologies used to improve the fidelities of single- and two-qubit gates, and finally highlight the research directions that need to be focused on.<br />The paper is organized as follows. Firstly, we introduce three major types of quantum dots (QD) devices fabricated on different silicon-based substrate, including Si/SiGe heterojunction and Si/SiO₂. The spin degree of electron or nuclear hosted in QD can be encoded to spin qubits. Electron spin qubit can be thermal initialized to ground state utilizing electron reservoirs and read out by spin-charge conversion mechanism energy-selective readout (Elzerman readout) with reservoirs or Pauli spin blockade (PSB) needless for a reservoir. Additionally, high fidelity single-shot readout has been demonstrated using radio-frequency gate reflectometry combined with PSB, which has unique advantages in large-scale qubit array. To coherent control the spin qubits, electron dipole renounce (ESR) or electron dipole spin resonance (EDSR) for electron and nuclear magnetic resonance (NMR) for nuclear are introduced. With help of isotope purification greatly improving the dephasing time of qubit and fast single-qubit manipulation based on EDSR, fidelity above 99.9 percent can be reached. For the two-qubit gates based on exchange interaction between electron spins, the strength of interaction <em>J</em> combined with Zeeman energy difference Δ<em>E</em>_<em>Z</em> determines the energy levels of system, which lead to the different two-qubit gates, such as controlled-Z (CZ), controlled-Rotation (CROT) and the square root of the SWAP gate ($\sqrt{\text { SWAP }}$) gates. In order to improve the fidelity of two-qubit gates, a series of key technologies are used in the experiments, not only isotope purification but also symmetry operation, careful Hamiltonian engineering and gate set tomography. Fidelity of two-qubit gates exceeding 99 percent has been demonstrated for electron spin qubits in Si/SiGe quantum dots and nuclear spin qubits in donors. These progresses have pushed the silicon-based spin qubits platform to constitute a major stepping stone towards fault-tolerant quantum computation. Finally, we discuss the next step for spin qubits, that is, how to effectively expand the number of qubits and there are still many problems to be explored and solved.

As quantum computers edge closer to viability, it becomes necessary to create logic synthesis and minimization algorithms that take into account the particular aspects of quantum computers that differentiate them from classical computers. Since quantum computers can be functionally described as reversible computers with superposition and entanglement, both advances in reversible synthesis and increased utilization of superposition and entanglement in quantum algorithms will increase the power of quantum computing. One necessary component of any practical quantum computer is the computation of irreversible functions. However, very little work has been done on algorithms that synthesize and minimize irreversible functions into a reversible form. In this thesis, we present and implement a pair of algorithms that extend the best published solution to these problems by taking advantage of Product-Sum EXOR (PSE) gates, the reversible generalization of inhibition gates, which we have introduced in previous work [1,2]. We show that these gates, combined with our novel synthesis algorithms, result in much lower quantum costs over a wide variety of functions as compared to our competitors, especially on incompletely specified functions. Furthermore, this solution has applications for milti-valued and multi-output functions.