Littérature scientifique sur le sujet « Testabilità »
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Articles de revues sur le sujet "Testabilità"
Wang, Yi Chen, et Feng Xie. « Research on Software Testability Requirement Analysis Method ». Advanced Materials Research 760-762 (septembre 2013) : 1084–88. http://dx.doi.org/10.4028/www.scientific.net/amr.760-762.1084.
Texte intégralLiu, Ye, et Yi Chen Wang. « The Study of the Requirement of Software Testability Based on Causal Analysis ». Applied Mechanics and Materials 513-517 (février 2014) : 1944–50. http://dx.doi.org/10.4028/www.scientific.net/amm.513-517.1944.
Texte intégralStȩpniak, Czesław. « Towards a notion of testability ». Applications of Mathematics 37, no 4 (1992) : 249–55. http://dx.doi.org/10.21136/am.1992.104507.
Texte intégralLv, Jian Wei, Zong Ren Xie et Yi Fan Xu. « A Weighted Optimization Allocation Based on Interval Distribution of Equipment Testability Indicators ». Applied Mechanics and Materials 741 (mars 2015) : 795–800. http://dx.doi.org/10.4028/www.scientific.net/amm.741.795.
Texte intégralKhan, Mohammad, M. A. Khanam et M. H. Khan. « Requirement Based Testability Estimation Model of Object Oriented Software ». Oriental journal of computer science and technology 10, no 04 (17 octobre 2017) : 793–801. http://dx.doi.org/10.13005/ojcst/10.04.14.
Texte intégralSober, Elliott. « Testability ». Proceedings and Addresses of the American Philosophical Association 73, no 2 (novembre 1999) : 47. http://dx.doi.org/10.2307/3131087.
Texte intégralWang, Chao, Jing Qiu, Guan-jun Liu et Yong Zhang. « Testability demonstration with component level data from virtual and physical tests ». Proceedings of the Institution of Mechanical Engineers, Part C : Journal of Mechanical Engineering Science 229, no 2 (8 mai 2014) : 265–72. http://dx.doi.org/10.1177/0954406214532909.
Texte intégralCupertino, César Medeiros, et Paulo Roberto Barbosa Lustosa. « Ohlson Model Testability : Empirical Tests Findings ». Brazilian Business Review 1, no 2 (30 juin 2004) : 141–55. http://dx.doi.org/10.15728/bbr.2004.1.2.5.
Texte intégralDi, Peng, Xuan Wang, Tong Chen et Bin Hu. « Multisensor Data Fusion in Testability Evaluation of Equipment ». Mathematical Problems in Engineering 2020 (30 novembre 2020) : 1–16. http://dx.doi.org/10.1155/2020/7821070.
Texte intégralWang, Xiu Fang, Bin Chen, Jin Ye Peng et Wei Qi. « Research on Modeling and Analysis of Testability for Complex Electronic System ». Applied Mechanics and Materials 701-702 (décembre 2014) : 236–40. http://dx.doi.org/10.4028/www.scientific.net/amm.701-702.236.
Texte intégralThèses sur le sujet "Testabilità"
Zhou, Lixin. « Testability Design and Testability Analysis of a Cube Calculus Machine ». PDXScholar, 1995. https://pdxscholar.library.pdx.edu/open_access_etds/4911.
Texte intégralRabhi, Issam. « Testabilité des services Web ». Phd thesis, Université Blaise Pascal - Clermont-Ferrand II, 2012. http://tel.archives-ouvertes.fr/tel-00738936.
Texte intégralKarel, Amit. « Comparative Study of FinFET and FDSOI Nanometric Technologies Based on Manufacturing Defect Testability ». Thesis, Montpellier, 2017. http://www.theses.fr/2017MONTS084/document.
Texte intégralFully Depleted Silicon on Insulator (FDSOI) and Fin Field Effect Transistor (FinFET) are new innovations in silicon process technologies that are likely alternatives to traditional planar Bulk transistors due to their respective promising ways of tackling the scalability issues with better short channel characteristics. Both these technologies are aiming in particular at regaining a better electrostatic control by the gate over the channel of the transistor. FDSOI is a planar MOS technology and as a result it is much more in continuity with planar Bulk as compared to the vertical FinFET transistors. The competition between these two technologies is fierce and many studies have been reported in the literature to compare these technologies in terms of speed performance, power consumption, cost, etc. However, these studies have not yet focused on their testability properties while the impact of defects on circuits implemented in FDSOI and FinFET technologies might be significantly different from the impact of similar defects in planar MOS circuit.The work of this thesis is focused on implementing similar design in each technology and comparing the electrical behavior of the circuit with the same defect. The defects that are considered for our investigation are inter-gate resistive bridging, resistive short to ground terminal (GND), resistive short to power supply (VDD) and resistive open defects. Defect detectability is evaluated in the context of either logic or delay based test. HSPICE and Cadence SPECTRE simulations are performed varying the value of the defect resistance and the concept of critical resistance is used to compare the defect detectability range in different technologies. The optimal body-biasing, supply voltage and temperature settings to achieve the maximum defect coverage are determined for these defect types. An analytical analysis is proposed for short defects based on the ON-resistance of P and N networks, which permits to evaluate the value of the critical resistance without performing fault simulations. Testability properties are also established under the presence of process variations based on Monte-Carlo simulations for both Regular-VT devices (FDSOI-RVT and Bulk-LR) and Low-VT devices (FDSOI-LVT and Bulk-LL) available for 28nm Bulk and FDSOI technologies
Lindström, Birgitta. « Methods for Increasing Software Testability ». Thesis, University of Skövde, Department of Computer Science, 2000. http://urn.kb.se/resolve?urn=urn:nbn:se:his:diva-494.
Texte intégralWe present a survey over current methods for improving software testability. It is a well-known fact that the cost for testing of software takes 50\% or more of the development costs. Hence, methods to improve testability, i.e. reduce the effort required for testing, have a potential to decrease the development costs. The test effort needed to reach a level of sufficient confidence for the system is dependent on the number of possible test cases, i.e., the number of possible combinations of system state and event sequences. Each such combination results in an execution order. Properties of the execution environment that affect the number of possible execution orders can therefore also affect testability. Which execution orders that are possible and not are dependent of processor scheduling and concurrency control policies. Current methods for improving testability are investigated and their properties with respect to processor scheduling and concurrency control analyzed. Especially, their impact on the number of possible test cases is discussed. The survey revealed that (i) there are few methods which explicitly address testability, and (ii) methods that concern the execution environment suggest a time-triggered design. It is previously shown that the effort to test an event-triggered real-time system is inherently higher than testing a time-triggered real-time system. Due to the dynamic nature of the event-triggered system the number of possible execution orders is high. A time-triggered design is, however, not always suitable. The survey reveals an open research area for methods concerning improvement of testability in event-triggered systems. Moreover, a survey and analysis of processor scheduling and concurrency control properties and their effect on testability is presented. Methods are classified into different categories that are shown to separate software into different levels of testability. These categories can form a basis of taxonomy for testability. Such taxonomy has a potential to be used by system designers and enable them to perform informed trade-off decisions.
Shi, Cheng. « High-level design for testability ». Thesis, University of Southampton, 1993. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.336135.
Texte intégralBhattacharyya, Arnab. « Testability of linear-invariant properties ». Thesis, Massachusetts Institute of Technology, 2011. http://hdl.handle.net/1721.1/68435.
Texte intégralCataloged from PDF version of thesis.
Includes bibliographical references (p. 75-80).
Property Testing is the study of super-efficient algorithms that solve "approximate decision problems" with high probability. More precisely, given a property P, a testing algorithm for P is a randomized algorithm that makes a small number of queries into its input and distinguishes between whether the input satisfies P or whether the input is "far" from satisfying P, where "farness" of an object from P is measured by the minimum fraction of places in its representation that needs to be modified in order for it to satisfy P. Property testing and ideas arising from it have had significant impact on complexity theory, pseudorandomness, coding theory, computational learning theory, and extremal combinatorics. In the history of the area, a particularly important role has been played by linearinvariant properties, i.e., properties of Boolean functions on the hypercube which are closed under linear transformations of the domain. Examples of such properties include linearity, homogeneousness, Reed-Muller codes, and Fourier sparsity. In this thesis, we describe a framework that can lead to a unified analysis of the testability of all linear-invariant properties, drawing on techniques from additive combinatorics and from graph theory. We also show the first nontrivial lowerbound for the query complexity of a natural testable linear-invariant property.
by Arnab Bhattacharyya.
Ph.D.
Hock, Joel M. (Joel Michael) 1977. « Exposing testability in GUI objects ». Thesis, Massachusetts Institute of Technology, 2000. http://hdl.handle.net/1721.1/86608.
Texte intégralIncludes bibliographical references (leaf 28).
by Joel M. Hock.
M.Eng.and S.B.
Malla, Prakash, et Bhupendra Gurung. « Adaptation of Software Testability Concept for Test Suite Generation : A systematic review ». Thesis, Blekinge Tekniska Högskola, Sektionen för datavetenskap och kommunikation, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:bth-4322.
Texte intégralKito, Nobutaka, et Naofumi Takagi. « Level-Testability of Multi-operand Adders ». IEEE, 2008. http://hdl.handle.net/2237/12025.
Texte intégralLindström, Birgitta. « Testability of Dynamic Real-Time Systems ». Doctoral thesis, Linköpings universitet, ESLAB - Laboratoriet för inbyggda system, 2009. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-16486.
Texte intégralLivres sur le sujet "Testabilità"
Weyerer, Manfred. Testability of electronic circuits. Munich : Carl Hanser Verlag, 1992.
Trouver le texte intégralUnited States. Environmental Protection Agency. Transportation and Climate Division. OBD readiness testability issues. 2e éd. Washington, D.C.] : Transportation and Climate Division, Office of Transportation and Air Quality, U.S. Environmental Protection Agency, 2012.
Trouver le texte intégralWeyerer, Manfred. Testability of electronic circuits. Munich : C. Hanser, 1991.
Trouver le texte intégralTsui, Frank F. LSI/VLSI testability design. New York : McGraw-Hill, 1987.
Trouver le texte intégralM, Voas Jeffrey, dir. Software assessment : Reliability, safety, testability. New York : Wiley, 1995.
Trouver le texte intégralBeenker, F. P. M., R. G. Bennetts et A. P. Thijssen. Testability Concepts for Digital ICs. Boston, MA : Springer US, 1995. http://dx.doi.org/10.1007/978-1-4615-2365-9.
Texte intégralDigital circuit testing and testability. San Diego : Academic Press, 1997.
Trouver le texte intégralLogic testing and design for testability. Cambridge, Mass : MIT Press, 1985.
Trouver le texte intégralHuhn, Sebastian, et Rolf Drechsler. Design for Testability, Debug and Reliability. Cham : Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-69209-4.
Texte intégralEngineering design : Reliability, maintainability, and testability. Blue Ridge Summit, PA : TAB Professional and Reference Books, 1988.
Trouver le texte intégralChapitres de livres sur le sujet "Testabilità"
Chen, Tinghuai. « Testability Design via Testability Measures ». Dans Fault Diagnosis and Fault Tolerance, 95–118. Berlin, Heidelberg : Springer Berlin Heidelberg, 1992. http://dx.doi.org/10.1007/978-3-642-77179-8_3.
Texte intégralSayil, Selahattin. « Testability Design ». Dans Contactless VLSI Measurement and Testing Techniques, 9–15. Cham : Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-69673-7_2.
Texte intégralDaggett, Mark E. « Improving Testability ». Dans Expert JavaScript, 199–218. Berkeley, CA : Apress, 2013. http://dx.doi.org/10.1007/978-1-4302-6098-1_10.
Texte intégralTurino, Jon L. « Testability Busses ». Dans Design to Test, 225–49. Dordrecht : Springer Netherlands, 1990. http://dx.doi.org/10.1007/978-94-011-6044-5_10.
Texte intégralTurino, Jon L. « Testability Documentation ». Dans Design to Test, 283–90. Dordrecht : Springer Netherlands, 1990. http://dx.doi.org/10.1007/978-94-011-6044-5_14.
Texte intégralChakradhar, Srimat T., Vishwani D. Agrawal et Michael L. Bushneil. « Polynomial-time Testability ». Dans Neural Models and Algorithms for Digital Testing, 123–39. Boston, MA : Springer US, 1991. http://dx.doi.org/10.1007/978-1-4615-3958-2_11.
Texte intégralKurup, Pran, et Taher Abbasi. « Design for Testability ». Dans Logic Synthesis Using Synopsys®, 197–241. Boston, MA : Springer US, 1995. http://dx.doi.org/10.1007/978-1-4757-2370-0_6.
Texte intégralShapere, Dudley. « Testability and Empiricism ». Dans The Reality of the Unobservable, 153–64. Dordrecht : Springer Netherlands, 2000. http://dx.doi.org/10.1007/978-94-015-9391-5_11.
Texte intégralRülling, Wolfgang. « Design for Testability ». Dans The Electronic Design Automation Handbook, 339–81. Boston, MA : Springer US, 2003. http://dx.doi.org/10.1007/978-0-387-73543-6_15.
Texte intégralGardiner, Stewart N. « Designing for Testability ». Dans Testing Safety-Related Software, 59–82. London : Springer London, 1999. http://dx.doi.org/10.1007/978-1-4471-3277-6_3.
Texte intégralActes de conférences sur le sujet "Testabilità"
Pardo Garcia Morelli, Camila, Vânia De Oliveira Neves et Luciana Salgado. « Investigando Comunicabilidade e Testabilidade com a ferramenta Signifying APIs ». Dans Computer on the Beach. São José : Universidade do Vale do Itajaí, 2021. http://dx.doi.org/10.14210/cotb.v12.p443-450.
Texte intégralFlynn, D. W. « Modular bus design supports on-chip testability ». Dans IEE Colloquium on `Systems Design for Testability'. IEE, 1995. http://dx.doi.org/10.1049/ic:19950548.
Texte intégralGrist, D. A. « The cost of C-testability in terms of silicon area and design complexity ». Dans IEE Colloquium on `Systems Design for Testability'. IEE, 1995. http://dx.doi.org/10.1049/ic:19950549.
Texte intégralRussell, G. « Teaching of testing techniques : the why, what and how ? » Dans IEE Colloquium on `Systems Design for Testability'. IEE, 1995. http://dx.doi.org/10.1049/ic:19950550.
Texte intégralWilkins, B. R. « Stretching the boundary : mixed-signals and P1149.4 ». Dans IEE Colloquium on `Systems Design for Testability'. IEE, 1995. http://dx.doi.org/10.1049/ic:19950551.
Texte intégralRobson, M. « Digital techniques for testing analogue functions ». Dans IEE Colloquium on `Systems Design for Testability'. IEE, 1995. http://dx.doi.org/10.1049/ic:19950552.
Texte intégralMoorehead, J. D. « Testability aspects of a DSP based image processing system ». Dans IEE Colloquium on `Systems Design for Testability'. IEE, 1995. http://dx.doi.org/10.1049/ic:19950553.
Texte intégralCooper, R. « The development and application of intelligent self test concepts in reconfigurable modular avionic systems ». Dans IEE Colloquium on `Systems Design for Testability'. IEE, 1995. http://dx.doi.org/10.1049/ic:19950554.
Texte intégralO'Dare, M. J. « System design for test using a genetically based hierarchical ATPG system ». Dans IEE Colloquium on `Systems Design for Testability'. IEE, 1995. http://dx.doi.org/10.1049/ic:19950555.
Texte intégralMaunder, C. « Design for test standards - where are they taking us ? » Dans IEE Colloquium on `Systems Design for Testability'. IEE, 1995. http://dx.doi.org/10.1049/ic:19950547.
Texte intégralRapports d'organisations sur le sujet "Testabilità"
Simpson, William R., John H. Bailey, Katherine B. Barto et Eugene Esker. Prediction and Analysis of Testability Attributes : Organizational-Level Testability Prediction. Fort Belvoir, VA : Defense Technical Information Center, février 1986. http://dx.doi.org/10.21236/ada167957.
Texte intégralZhou, Lixin. Testability Design and Testability Analysis of a Cube Calculus Machine. Portland State University Library, janvier 2000. http://dx.doi.org/10.15760/etd.6787.
Texte intégralMcNamer, Michael G., et Walter W. Weber. Chip to System Testability. Fort Belvoir, VA : Defense Technical Information Center, octobre 1997. http://dx.doi.org/10.21236/ada342380.
Texte intégralDebany, Jr, et Warren H. Digital Logic Testing and Testability. Fort Belvoir, VA : Defense Technical Information Center, février 1991. http://dx.doi.org/10.21236/ada234123.
Texte intégralFlater, David, et KC Morris. Testability of product data management interfaces. Gaithersburg, MD : National Institute of Standards and Technology, 1999. http://dx.doi.org/10.6028/nist.ir.6429.
Texte intégralPress, Ronald E., Michael E. Keller et Gregory J. Maguire. Testability Design Rating System : Analytical Procedure. Volume 2. Fort Belvoir, VA : Defense Technical Information Center, février 1992. http://dx.doi.org/10.21236/ada254334.
Texte intégralSarabi, Andisheh. Logic Synthesis with High Testability for Cellular Arrays. Portland State University Library, janvier 2000. http://dx.doi.org/10.15760/etd.6638.
Texte intégralSantos, Andres, Ivan A. Canay et Azeem M. Shaikh. On the testability of identification in some nonparametric models with endogeneity. Cemmap, juillet 2012. http://dx.doi.org/10.1920/wp.cem.2012.1812.
Texte intégralElks, Carl R., Ashraf Tantawy, Rick Hite, Smitha Gauthem et Athira Jayakumar. Defining and Characterizing Methods, Tools, and Computing Resources to Support Pseudo Exhaustive Testability of Software Based I&C Devices. Office of Scientific and Technical Information (OSTI), septembre 2018. http://dx.doi.org/10.2172/1495188.
Texte intégral