Thèses sur le sujet « Real-time software-defined radio systems »

Modern society places an increasingly high demand on data transmission. Much of that data transmission takes place through communication over the frequency spectrum. The channels on the spectrum are limited resources. Researchers realize that at certain times of day some channels are overloaded, while others are not being fully utilized. A spectrum management system may be beneficial to remedy this efficiency issue. One of the proposed systems, Cognitive Radio Network (CRN), has progressed over the years thanks to studies on a wide range of subjects, including geolocation, data throughput rate, and channel handoff selection algorithm, which provide fundamental support for the spectrum management system. To move CRN technology forward, in this thesis we propose a physical, scalable testbed for some of the extant CRN methodologies. This testbed integrates IEEE standards, FCC guidelines, and other TV band regulations to emulate CRN in real time. With careful component selections, we include sufficient operational functionalities in the system, while at the same time making sure it remains affordable. We evaluate the technical feasibility of the testbed by studying several simple CRN logics. When comparing a system with a selection table implemented to those with naive selection methods, there is more than a 60 percent improvement in the overall performance.

La thèse porte sur les architectures temps réel pour la radio-logicielle 5G. Afin de répondre aux exigences de performances de la 5G, une accélération des procédés critiques combinée à des méthodes d’ordonnancement de processus temps réels sont nécessaires. Dans les systèmes embarqués 5G, l'accélération équivaut à une combinaison judicieuse d'unités matérielles supplémentaires pour les fonctions les plus coûteuses en termes de calcul avec des composants logiciels pour des procédures de contrôle complexe ainsi que l’arithmétique simples. Des solutions entièrement logicielles apparaissent également pour certaines applications, notamment dans l'écosystème dit Open Radio-Access Network (openRAN). Les contributions de cette thèse résident dans des méthodes d'accélération purement logicielles et de contrôle en temps réel d'interfaces dit « fronthaul » à faible latence. Étant donné que la 5G a des exigences de latence strictes et prend en charge le trafic de données à très haut débit, les méthodes d’ordonnancement du traitement en bande de base doivent être adaptées aux spécificités de l'interface radio. Plus précisément, nous proposons une décomposition fonctionnelle de l'interface-air 5G qui se prête à des implémentations logicielles multicœurs ciblant des serveurs haut de gamme exploitant l'accélération de données multiples à instruction unique (SIMD). De plus, nous fournissons quelques pistes pour le traitement multithread via le pipelining et l'utilisation de pools de threads. Nous mettons en évidence les méthodes et la caractérisation de leur performances qui ont été exploitées lors du développement de l'implémentation OpenAirInterface 5G
The thesis deals with 5G real-time Software Defined Radio architectures. In order to match 5G performance requirements, computational acceleration combined with real-time process scheduling methods are required. In 5G embedded systems acceleration amounts to a judicious combination additional hardware units for the most computationally costly functions with software for simpler arithmetic and complex control procedures. Fully software-based solutions are also appearing for certain applications, in particular in the so-called Open Radio-Access Network (openRAN) ecosystem. The contributions of this thesis lie in methods for purely software-based acceleration and real-time control of low-latency fronthaul interfaces. Since 5G has stringent latency requirements and support for very high-speed data traffic, methods for scheduling baseband processing need to be tailored to the specifics of the air-interface. Specifically, we propose a functional decomposition of the 5G air interface which is amenable to multi-core software implementations targeting high-end servers exploiting single-instruction multiple-data (SIMD) acceleration. Moreover, we provide some avenues for multi-threaded processing through pipelining and the use of thread pools. We highlight the methods and their performance evaluation that have been exploited during the development of the OpenAirInterface 5G implementation

Twenty-first century Field-Programmable Gate Arrays (FPGAs) are no longer used for implementing simple “glue logic” functions. They have become complex arrays of reconfigurable logic resources and memories as well as highly optimised functional blocks, capable of implementing large systems on a single chip. Moreover, Dynamic Partial Reconfiguration (DPR) capability permits to adjust some logic resources on the chip at runtime, whilst the rest are still performing active computations. During the last few years, DPR has become a hot research topic with the objective of building more reliable, efficient and powerful electronic systems. For instance, DPR can be used to mitigate spontaneously occurring bit upsets provoked by radiation, or to jiggle around the FPGA resources which progressively get damaged as the silicon ages. Moreover, DPR is the enabling technology for a new computing paradigm which combines computation in time and space. In Reconfigurable Computing (RC), a battery of computation-specific circuits (“hardware tasks”) are swapped in and out of the FPGA on demand to hold a continuous stream of input operands, computation and output results. Multitasking, adaptation and specialisation are key properties in RC, as multiple swappable tasks can run concurrently at different positions on chip, each with custom data-paths for efficient execution of specific computations. As a result, considerable computational throughput can be achieved even at low clock frequencies. However, DPR penetration in the commercial market is still testimonial, mainly due to the lack of suitable high-level design tools to exploit this technology. Indeed, currently, special skills are required to successfully develop a dynamically reconfigurable application. In light of the above, this thesis aims at bridging the gap between high-level application and low-level DPR technology. Its main objective is to develop Operating System (OS)-like support for high-level software-centric application developers in order to exploit the benefits brought about by DPR technology, without having to deal with the complex low-level hardware details. The developed solution in this thesis is named as R3TOS, which stands for Reliable Reconfigurable Real-Time Operating System. R3TOS defines a flexible infrastructure for reliably executing reconfigurable hardware-based applications under real-time constraints. In R3TOS, the hardware tasks are scheduled in order to meet their computation deadlines and allocated to non-damaged resources, keeping the system fault-free at all times. In addition, R3TOS envisages a computing framework whereby both hardware and software tasks coexist in a seamless manner, allowing the user to access the advanced computation capabilities of modern reconfigurable hardware from a software “look and feel” environment. This thesis covers all of the design and implementation aspects of R3TOS. The thesis proposes a novel EDF-based scheduling algorithm, two novel task allocation heuristics (EAC and EVC) and a novel task allocation strategy (called Snake), addressing many RC-related particularities as well as technological constraints imposed by current FPGA technology. Empirical results show that these approaches improve on the state of the art. Besides, the thesis describes a novel way to harness the internal reconfiguration mechanism of modern FPGAs to performinter-task communications and synchronisation regardless of the physical location of tasks on-chip. This paves the way for implementing more sophisticated RC solutions which were only possible in theory in the past. The thesis illustrates R3TOS through a proof-of-concept prototype with two demonstrator applications: (1) dependability oriented control of the power chain of a railway traction vehicle, and (2) datastreaming oriented Software Defined Radio (SDR).

Thesis (M.S.)--Worcester Polytechnic Institute.
Keywords: distributed beamforming; carrier synchronization; software-defined-radio; sensor networks; wireless networks; cooperative transmission; virtual antenna arrays. Includes bibliographical references (leaves 168-169).

Our research aims at contributing to the evolution of modern wireless communications and to the development of software-defined radio (SDR) and cognitive radio, in particular. It promotes a general resource management framework that facilitates the integration of computing and radio resource management. This dissertation discusses the need for computing resource management in software-defined and cognitive radios and introduces an SDR computing resource management framework with cognitive capabilities. The hard real-time computing requirements of software-defined digital signal processing chains (SDR applications), the associated radio propagation and quality of service (QoS) implications, and heterogeneous multiprocessor platforms with limited computing resources (SDR platforms) define the context of these studies. We examine heterogeneous computing techniques, multiprocessor mapping and scheduling in particular, and elaborate a flexible framework for the dynamic allocation and reallocation of computing resources for wireless communications. The framework should facilitate partial reconfigurations of SDR platforms, dynamic switches between radio access technologies (RATs), and service and QoS level adjustments as a function of the environmental conditions. It, therefore, assumes the facilities of the platform and hardware abstraction layer operating environment (P-HAL-OE). We suggest a modular framework, distinguishing between the computing system modeling and the computing resource management. Our modeling proposal is based on two computing resource management techniques, which facilitate managing the strict timing constraints of real-time systems. It is scalable and can account for many different hardware architectures and computing resource types. This work focuses on processing and interprocessor bandwidth resources and processing and data flow requirements. Our computing resource management approach consists of a general-purpose mapping algorithm and a cost function. The independence between the algorithm and the cost function facilitates implementing many different computing resource management policies. We introduce a dynamic programming based algorithm, the tw-mapping, where w controls the decision window. We present a general and parametric cost function, which guides the mapping process under the given resource constraints. An instance of it facilitates finding a mapping that meets all processing and data flow requirements of SDR applications with the available processing and bandwidth resources of SDR platforms. Several SDR reconfiguration scenarios and analyses based on simulations demonstrate the suitability and potentials of our framework for a flexible computing resource management. We extend our SDR computing resource management concepts to the cognitive radio context. The two primary objectives of cognitive radio are highly reliable communications whenever and wherever needed and the efficient use of the radio spectrum. We formulate a third objective as the efficient use of computing resources. We analyze the cognitive capabilities of our framework─the cognitive radio’s interface to SDR platforms─and indicate the potentials of our cognitive computing resource management proposal. The cognitive computing resource management needs to be coordinated with the radio resource management. We, therefore, introduce the joint resource management concept for cognitive radios. We present three cognitive cycles and discuss several interrelations between the radio, computing, and application resources, where application resources refer to the available SDR and user applications. Our approach potentiates flexibility and facilitates radio against computing resource tradeoffs. It promotes cognition at all layers of the wireless system for a cooperative or integrated resource management that may increase the performance and efficiency of wireless communications.
El objetivo de las investigaciones que se están llevando a cabo dentro del grupo de investigación es contribuir a la evolución de las radiocomunicaciones modernas y, en particular, al desarrollo de los conceptos software radio (SDR) y cognitive radio. El planteamiento general es el de extender la flexibilidad global del sistema de comunicaciones planteando la definición y desarrollo de un entorno en el que pudiesen explorarse las relaciones entre la computación y las prestaciones del sistema de comunicaciones móviles facilitando la integración de los recursos de computación con los recursos radio. Dentro de este marco, la presente tesis plantea la discusión de la necesidad de la gestión de los recursos de computación en entornos SDR y cognitive radio y define un entorno de operación que asume las características especificas del concepto SDR a la vez que incorpora capacidades cognitivas en la gestión de los recursos de computación de las plataformas que den soporte a las nuevas generaciones de sistemas móviles. Los estrictos requerimientos de procesado en tiempo real de las cadenas de procesado digital de la señal definidas por software (aplicaciones SDR), las implicaciones asociadas con la propagación radio y el concepto de calidad de servicio (QoS) y plataformas heterogéneas de múltiples procesadores con recursos de computo limitados (plataformas SDR) definen el contexto de estos estudios. Se examinan técnicas de cómputo de propósito general para definir un entorno de operación que fuese capaz de asignar de forma flexible y dinámica los recursos de cómputo necesarios para facilitar las radiocomunicaciones a los niveles de QoS deseados. Ello debería facilitar los cambios dinámicos de una tecnología de acceso radio a otra, permitiendo el ajuste del tipo de servicio o calidad de servicio en función de las preferencias de los usuarios y las condiciones del entorno. Dicho entorno de operación asume las potencialidades del platform and hardware abstraction layer operating environment (P-HAL-OE). La estructura del entorno de operación se define de forma modular y consiste en un modelado genérico y flexible de las plataformas de computación SDR y en una gestión de recursos de computación abierta y capaz de ajustarse a diferentes objetivos y políticas. En el trabajo se exponen dos técnicas de gestión que pretenden asegurar la consecución estricta de los límites temporales típicos de los sistemas en tiempo real. En cuanto al modelado, este es escalable y capaz de capturar un amplio abanico de arquitecturas hardware y recursos de computación. En el presente trabajo nos centramos en los recursos y requerimientos del procesado y transferencia de datos. Se introduce un algoritmo de mapeo genérico e independiente de la función de coste. La independencia entre el algoritmo y la función de coste facilita la implementación de diferentes políticas de gestión de recursos computacionales. El tw-mapping es un algoritmo basado en dynamic programming, donde w controla la ventana de decisión. Se presenta una función de coste genérica y parametrizable que permite guiar el proceso de gestión de los recursos. Una instancia de ella facilita encontrar una solución al proceso de asignación de recursos que cumpla todos los requerimientos de procesado y trasferencia de datos de las aplicaciones SDR con los recursos disponibles de las plataformas SDR. Diferentes escenarios y varios análisis basados en simulaciones demuestran la adecuación del entorno de trabajo definido y desarrollado, así como sus potencialidades para una gestión flexible de los recursos de cómputo. Se extienden los conceptos mencionados previamente para entornos cognitive radio. Los principales objetivos del concepto cognitive radio son la disponibilidad de comunicaciones altamente robustas en cualquier lugar y momento en que sean necesarias y el uso eficiente del espectro. Como tercer objetivo formulamos el uso eficiente de los recursos de cómputo. Analizamos las capacidades cognitivas de nuestro entorno de operación─la interfaz del sistema cognitive radio a las plataformas SDR─y resaltamos las potencialidades de nuestra propuesta de gestión cognitiva de los recursos computacionales. Dicha gestión cognitiva de los recursos computacionales plantea una integración con la gestión de los recursos radio. Para ello introducimos el concepto de gestión de recursos conjunta para entornos cognitive radio. Se presentan tres ciclos cognitivos y se discuten algunas interrelaciones entre los recursos radio, de cómputo y de aplicación, donde los recursos de aplicación se refieren a las aplicaciones SDR y de usuario disponibles. Nuestra propuesta de gestión de recursos conjunta potencia la flexibilidad y facilita los intercambios entre recursos radio y de computación

This thesis has theoretically and practically evaluated interfaces between a radio front end for GPS and a mobile platform to answer the question how should this interface be designed to minimize the computational load on the platform as well as costs. Benchmarking of serial peripheral interface and a glueless one bit interface is performed on MPC5200 and OMAP 1710 running Linux operating system.

The conclusion is two different design approaches, one based on serial peripheral interface and one on SDIO card.

Buffer sizes in the platform and the front end is the key factor for computational load and this is discussed in detail. Also other consideration for interface design is discussed such as the implications of front end being master or slave on the bus.

In digital communication systems symbol timing recovery is of fundamental importance. The accuracy in estimation of symbol timing has a direct effect on received data error rates. The primary objective of this thesis is to implement a practical Digital Phase Locked Loop capable of accurate synchronisation of symbols suffering channel corruption typical of modern mobile communications. This thesis describes an all-software implementation of a Digital Phase Locked in a real-time system. A timing error detection (TED) algorithms optimally implemented into a Digital Signal Processor. A real-time transmitter and receiver system is implemented in order to measure performance when the received signal is corrupted by both Additive White Gaussian Noise and Flat Fading. The Timing Error Detection algorithm implemented is a discrete time maximum likelihood one known as FFML1, developed at Canterbury University. FFML1 along with other components of the Digital Phase Locked loop are implemented entirely in software, using Motorola 56321 assembly language.

En la actualidad, la Internet de las Cosas (Internet of Things, IoT) es una tecnología esencial para la próxima generación de sistemas inalámbricos. La conectividad es la base de IoT, y el tipo de acceso requerido dependerá de la naturaleza de la aplicación. Uno de los principales facilitadores del entorno IoT es la comunicación machine-to-machine (M2M) y, en particular, su enorme potencial para ofrecer conectividad ubicua entre dispositivos inteligentes. Las redes celulares son la elección natural para las aplicaciones emergentes de IoT y M2M. Un desafío importante en las redes celulares es conseguir que la red sea capaz de manejar escenarios de acceso masivo en los que numerosos dispositivos utilizan comunicaciones M2M. Por otro lado, los sistemas celulares han experimentado un tremendo desarrollo en las últimas décadas: incorporan tecnología sofisticada y nuevos algoritmos para ofrecer una amplia gama de servicios. El modelado y análisis del rendimiento de estas redes multiservicio es también una tarea desafiante que podría requerir un gran esfuerzo computacional. Para abordar los desafíos anteriores, nos centramos en primer lugar en el diseño y la evaluación de las prestaciones de nuevos mecanismos de control de acceso para hacer frente a las comunicaciones masivas M2M en redes celulares. Posteriormente nos ocupamos de la evaluación de prestaciones de redes multiservicio y proponemos una nueva técnica analítica que ofrece precisión y eficiencia computacional. Nuestro principal objetivo es proporcionar soluciones para aliviar la congestión en la red de acceso radio cuando un gran número de dispositivos M2M intentan conectarse a la red. Consideramos los siguientes tipos de escenarios: (i) los dispositivos M2M se conectan directamente a las estaciones base celulares, y (ii) forman grupos y los datos se envían a concentradores de tráfico (gateways) que les proporcionan acceso a la infraestructura. En el primer escenario, dado que el número de dispositivos añadidos a la red aumenta continuamente, esta debería ser capaz de manejar el considerable incremento en las solicitudes de acceso. El 3rd Generation Partnership Project (3GPP) ha propuesto el access class barring (ACB) como una solución práctica para el control de congestión en la red de acceso radio y la red troncal. El ajuste correcto de los parámetros de ACB de acuerdo con la intensidad del tráfico es crítico, pero cómo hacerlo de forma dinámica y autónoma es un problema complejo cuya solución no está recogida en las especificaciones del 3GPP. Esta tesis doctoral contribuye al análisis del rendimiento y al diseño de nuevos algoritmos que implementen efectivamente este mecanismo, y así superar los desafíos introducidos por las comunicaciones masivas M2M. En el segundo escenario, dado que la heterogeneidad de los dispositivos IoT y las arquitecturas celulares basadas en hardware imponen desafíos aún mayores para permitir una comunicación flexible y eficiente en los sistemas inalámbricos 5G, esta tesis doctoral también contribuye al diseño de software-defined gateways (SD-GWs) en una nueva arquitectura propuesta para redes inalámbricas definidas por software que se denomina SoftAir. Esto permite manejar tanto un gran número de dispositivos como el volumen de datos que estarán vertiendo en la red. Otra contribución de esta tesis doctoral es la propuesta de una técnica novedosa para el análisis de prestaciones de redes multiservicio de alta capacidad que se basa en un nuevo enfoque del modelizado analítico de sistemas que operan a diferentes escalas temporales. Este enfoque utiliza el análisis del transitorio de una serie de subcadenas absorbentes y lo denominamos absorbing Markov chain approximation (AMCA). Nuestros resultados muestran que para un coste computacional dado, AMCA calcula los parámetros de prestaciones habituales de un sistema con mayor precisión, en comparación con los resultados obtenidos por otr
Nowadays, Internet of Things (IoT) is an essential technology for the upcoming generation of wireless systems. Connectivity is the foundation for IoT, and the type of access required will depend on the nature of the application. One of the leading facilitators of the IoT environment is machine-to-machine (M2M) communication, and particularly, its tremendous potential to offer ubiquitous connectivity among intelligent devices. Cellular networks are the natural choice for emerging IoT and M2M applications. A major challenge in cellular networks is to make the network capable of handling massive access scenarios in which myriad devices deploy M2M communications. On the other hand, cellular systems have seen a tremendous development in recent decades; they incorporate sophisticated technology and algorithms to offer a broad range of services. The modeling and performance analysis of these large multi-service networks is also a challenging task that might require high computational effort. To address the above challenges, we first concentrate on the design and performance evaluation of novel access control schemes to deal with massive M2M communications. Then, we focus on the performance evaluation of large multi-service networks and propose a novel analytical technique that features accuracy and computational efficiency. Our main objective is to provide solutions to ease the congestion in the radio access or core network when massive M2M devices try to connect to the network. We consider the following two types of scenarios: (i) massive M2M devices connect directly to cellular base stations, and (ii) they form clusters and the data is forwarded to gateways that provide them with access to the infrastructure. In the first scenario, as the number of devices added to the network is constantly increasing, the network should handle the considerable increment in access requests. Access class barring (ACB) is proposed by the 3rd Generation Partnership Project (3GPP) as a practical congestion control solution in the radio access and core network. The proper tuning of the ACB parameters according to the traffic intensity is critical, but how to do so dynamically and autonomously is a challenging task that has not been specified. Thus, this dissertation contributes to the performance analysis and optimal design of novel algorithms to implement effectively this barring scheme and overcome the challenges introduced by massive M2M communications. In the second scenario, since the heterogeneity of IoT devices and the hardware-based cellular architectures impose even greater challenges to enable flexible and efficient communication in 5G wireless systems, this dissertation also contributes to the design of software-defined gateways (SD-GWs) in a new architecture proposed for wireless software-defined networks called SoftAir. The deployment of these SD-GWs represents an alternative solution aiming at handling both a vast number of devices and the volume of data they will be pouring into the network. Another contribution of this dissertation is to propose a novel technique for the performance analysis of large multi-service networks. The underlying complexity of the network, particularly concerning its size and the ample range of configuration options, makes the solution of the analytical models computationally costly. However, a typical characteristic of these networks is that they support multiple types of traffic flows operating at different time-scales. This time-scale separation can be exploited to reduce considerably the computational cost associated to determine the key performance indicators. Thus, we propose a novel analytical modeling approach based on the transient regime analysis, that we name absorbing Markov chain approximation (AMCA). For a given computational cost, AMCA finds common performance indicators with greater accuracy, when compared to the results obtained by other approximate methods proposed in the literature.
En l'actualitat, la Internet de les Coses (Internet of Things, IoT) és una tecnologia essencial per a la propera generació de sistemes sense fil. La connectivitat és la base d'IoT, i el tipus d'accés requerit dependrà de la naturalesa de l'aplicació. Un dels principals facilitadors de l'entorn IoT és la comunicació machine-to-machine (M2M) i, en particular, el seu enorme potencial per oferir connectivitat ubiqua entre dispositius intel · ligents. Les xarxes mòbils són l'elecció natural per a les aplicacions emergents de IoT i M2M. Un desafiament important en les xarxes mòbils que actualment está rebent molta atenció és aconseguir que la xarxa siga capaç de gestionar escenaris d'accés massiu en què una gran quantitat de dispositius utilitzen comunicacions M2M. D'altra banda, els sistemes mòbils han experimentat un gran desenvolupament en les últimes dècades: incorporen tecnologia sofisticada i nous algoritmes per oferir una àmplia gamma de serveis. El modelatge i análisi del rendiment d'aquestes xarxes multiservei és també un desafiament important que podria requerir un gran esforç computacional. Per abordar els desafiaments anteriors, en aquesta tesi doctoral ens centrem en primer lloc en el disseny i l'avaluació de les prestacions de nous mecanismes de control d'accés per fer front a les comunicacions massives M2M en xarxes cel · lulars. Posteriorment ens ocupem de l'avaluació de prestacions de xarxes multiservei i proposem una nova tècnica analítica que ofereix precisió i eficiència computacional. El nostre principal objectiu és proporcionar solucions per a alleujar la congestió a la xarxa d'accés ràdio quan un gran nombre de dispositius M2M intenten connectar-se a la xarxa. Considerem els dos tipus d'escenaris següents: (i) els dispositius M2M es connecten directament a les estacions base cel · lulars, i (ii) formen grups i les dades s'envien a concentradors de trànsit (gateways) que els proporcionen accés a la infraestructura. En el primer escenari, atès que el nombre de dispositius afegits a la xarxa augmenta contínuament, aquesta hauria de ser capaç de gestionar el considerable increment en les sol · licituds d'accés. El 3rd Generation Partnership Project (3GPP) ha proposat l'access class barring (ACB) com una solució pràctica per al control de congestió a la xarxa d'accès ràdio i la xarxa troncal. L'ajust correcte dels paràmetres d'ACB d'acord amb la intensitat del trànsit és crític, però com fer-ho de forma dinàmica i autònoma és un problema complex, la solució del qual no està recollida en les especificacions del 3GPP. Aquesta tesi doctoral contribueix a l'anàlisi del rendiment i al disseny de nous algoritmes que implementen efectivament aquest mecanisme, i així superar els desafiaments introduïts per les comunicacions massives M2M en les xarxes mòbils actuals i futures. En el segon escenari, atès que l'heterogeneïtat dels dispositius IoT i les arquitectures cel · lulars basades en hardware imposen desafiaments encara més grans per permetre una comunicació flexible i eficient en els sistemes sense fil 5G, aquesta tesi doctoral també contribueix al disseny de software-defined gateways (SD-GWS) en una nova arquitectura proposada per a xarxes sense fils definides per programari que s'anomena SoftAir. Això permet gestionar tant un gran nombre de dispositius com el volum de dades que estaran abocant a la xarxa. Una altra contribució d'aquesta tesi doctoral és la proposta d'una tècnica innovadora per a l'anàlisi de prestacions de xarxes multiservei d'alta capacitat que es basa en un nou enfocament del modelitzat analític de sistemes que operen a diferents escales temporals. Aquest enfocament utilitza l'anàlisi del transitori d'una sèrie de subcadenes absorbents i l'anomenem absorbing Markov chain Approximation (AMCA). Els nostres resultats mostren que per a un cost computacional donat, AMCA calcula els paràmetres de prestacions habituals d
Tello Oquendo, LP. (2018). Design and Performance Analysis of Access Control Mechanisms for Massive Machine-to-Machine Communications in Wireless Cellular Networks [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/107946
TESIS

L’utilisation de matrice de portes logiques reconfigurables (FPGA) est une des seules solutionspour traiter des flux de plusieurs 100 MÉchantillons/seconde en temps-réel. Toutefois, ce typede composant présente une grande difficulté de mise en oeuvre : au delà d’un type langage spécifique,c’est tout un environnement matériel et une certaine expérience qui sont requis pourobtenir les traitements les plus efficaces. Afin de contourner cette difficulté, de nombreux travauxont été réalisés dans le but de proposer des solutions qui, partant d’un code écrit dans unlangage de haut-niveau, vont produire un code dans un langage dédié aux FPGAs. Nos travaux,suivant l’approche d’assemblage de blocs et en suivant la méthode du skeleton, ont visé à mettreen place un logiciel, nommé CoGen, permettant, à partir de codes déjà développés et validés,de construire des chaînes de traitements en tenant compte des caractéristiques du FPGA cible,du débit entrant et sortant de chaque bloc pour garantir l’obtention d’une solution la plus adaptéepossible aux besoins et contraintes. Les implémentations des blocs de traitements sont soitgénérés automatiquement soit manuellement. Les entrées-sorties de chaque bloc doivent respecterune norme pour être exploitable dans l’outil. Le développeur doit fournir une descriptionconcernant les ressources nécessaires et les limitations du débit de données pouvant être traitées.CoGen fournit à l’utilisateur moins expérimenté une méthode d’assemblage de ces blocsgarantissant le synchronisme et cohérence des flux de données ainsi que la capacité à synthétiserle code sur les ressources matérielles accessibles. Cette méthodologie de travail est appliquéeà des traitements sur des flux vidéos (seuillage, détection de contours et analyse des modespropres d’un diapason) et sur des flux radio-fréquences (interrogation d’un capteur sans-fils parméthode RADAR, réception d’un flux modulé en fréquence, et finalement implémentation deblocs de bases pour déporter le maximum de traitements en numérique)
Using Field Programmable Gate Arrays (FPGA) is one of the very few solution for real time processingdata flows of several hundreds of Msamples/second. However, using such componentsis technically challenging beyond the need to become familiar with a new kind of dedicateddescription language and ways of describing algorithms, understanding the hardware behaviouris mandatory for implementing efficient processing solutions. In order to circumvent these difficulties,past researches have focused on providing solutions which, starting from a description ofan algorithm in a high-abstraction level language, generetes a description appropriate for FPGAconfiguration. Our contribution, following the strategy of block assembly based on the skeletonmethod, aimed at providing a software environment called CoGen for assembling various implementationsof readily available and validated processing blocks. The resulting processing chainis optimized by including FPGA hardware characteristics, and input and output bandwidths ofeach block in order to provide solution fitting best the requirements and constraints. Each processingblock implementation is either generated automatically or manually, but must complywith some constraints in order to be usable by our tool. In addition, each block developer mustprovide a standardized description of the block including required resources and data processingbandwidth limitations. CoGen then provides to the less experienced user the means to assemblethese blocks ensuring synchronism and consistency of data flow as well as the ability to synthesizethe processing chain in the available hardware resources. This working method has beenapplied to video data flow processing (threshold, contour detection and tuning fork eigenmodesanalysis) and on radiofrequency data flow (wireless interrogation of sensors through a RADARsystem, software processing of a frequency modulated stream, software defined radio)

International Telemetering Conference Proceedings / October 27-30, 1997 / Riviera Hotel and Convention Center, Las Vegas, Nevada
Flight Safety concerns increase proportionally with increasing missile performance. These concerns are greatest in the near launch arena where a missile has the greatest potential energy. Systems such as radar, GPS tracking systems, and optics are normally of limited use in this arena for a number of reasons. A system was required that would provide useful tracking data in the first few seconds of a missile launch. This system has met that requirement providing nominal path deviation data from the launcher out to as much as 120 seconds. The tracking system described herein uses the principle of radio interferometry to derive phase difference measurements between carefully spaced antennas. These measurements are transmitted to the Operational Display Facility and converted to a usable angular deviation plot for use by Flight Safety Personnel. This paper provides an elementary radio interferometer system background and discusses this particular system setup and use. Some detail is provided on the premission simulation and setup of the system as well as the real-time display setup and output of the final data product.

With the explosive development of wireless communication systems the specifications of the supporting hardware platforms have become more and more demanding. According to the long term goals of the industry, future communications systems should integrate a wide variety of standards. This leads to the idea of software defined radio, implemented on fully reconfigurable hardware.Among other reconfigurable hardware blocks, suitable for the software radio concept, an outstanding importance belongs to the reconfigurable filters that are responsible for the selectivity of the system. The problematic of filtering is strictly connected to the architecture chosen for a multi-mode receiver realization. According to the chosen architecture, the filters can exhibit low pass or band pass frequency responses.The idea of reconfigurable frequency parameters has been introduced since the beginning of modern filtering applications due to the required precision of the frequency response. However, the reconfiguration of the parameters was usually done in a limited range around ideal values. The purpose of the presented research is to transform the classical filter structures with simple self-correction into fully reconfigurable filters over a wide range of frequencies. The ideal variation of the frequency parameters is continuous and consequently difficult to implement in real circuits. Therefore, it is usually sufficient to use a discrete programming template with reasonably small steps.There are several methods to implement variable frequency parameters. The most often used programming templates employ resistor and capacitor arrays, switched according to a given code. The low pass filter implementation proposed in this work uses a special switching template, optimized for a quasi-linear frequency variation over logarithmic axes. The template also includes the possibility to compensate errors caused by component tolerances and temperature. Another important topic concerns the implementation of programmable band pass filters, suitable for IF sampling receivers. The discussion is centered on the feasibility and the flexibility of different band pass filter architectures. Due to the high frequency requirements, the emphasis lays on filters that employ transconductance amplifiers and capacitors
Die rasch fortschreitende Entwicklung drahtloser Kommunikationssysteme führt zu immer anspruchsvolleren Spezifikationen der diese Systeme unterstützenden Hardwareplattformen. Zukünftige Kommunikationssysteme sollen übereinstimmend mit den längerfristigen Zielen der Industrie verschiedene Standards integrieren. Dies führt zu der Idee von vollständig rekonfigurierbarer Hardware, welche mittels Software gesteuert wird.Inmitten anderer rekonfigurierbarer Hardwareblöcke, die für das Software Radio Konzept geeignet sind, besitzen die steuerbaren Filter, welche wesentlichen Einfluss auf die Selektivität des Systems haben, eine enorme Bedeutung. Die Filterproblematik ist eng mit der gewählten Architektur der standardübergreifenden Empfängerrealisierung verknüpft. Die Filter können entsprechend der ausgesuchten Architektur Tiefpass- oder Bandpasscharakter annehmen.Die Idee rekonfigurierbarer Frequenzparameter wurde bereits mit Beginn moderner Filteranwendungen auf Grund geforderter Frequenzganggenauigkeit umgesetzt. Jedoch wurde die Parameterrekonfiguration üblicherweise nur in einem begrenzten Bereich um die Idealwerte herum vorgenommen. Das Ziel der vorgestellten Forschungsarbeit ist es, diese klassischen Filterstrukturen mit einfacher Selbstkorrektur in über große Frequenzbereiche voll rekonfigurierbare Filter zu transformieren. Idealerweise werden die Frequenzparameter kontinuierlich variiert weswegen sich die Implementierung in reellen Schaltkreisen als schwierig erweist. Deshalb ist es üblicherweise ausreichend, ein diskretes Steuerschema mit kleinen Schrittweiten zu verwenden.Es gibt verschiedene Methoden, variable Frequenzparameter zu implementieren. Die meisten Schemata verwenden Widerstands- und Kondensatorfelder, die entsprechend eines Kodes geschaltet werden. Die in dieser Arbeit vorgestellte Implementierung eines Tiefpassfilters nutzt ein spezielles Umschaltschema, welches für die quasi-lineare Frequenzvariation bei Darstellung über logarithmischen Axen optimiert wurde. Es beinhaltet weiterhin die Möglichkeit, Fehler zu kompensieren, die durch Bauelementtoleranzen und Temperaturschwankungen hervorgerufen werden.Ein weiteres interessantes Thema betrifft die Implementierung steuerbarer Bandpassfilter, die für Empfänger mit Zwischenfrequenzabtastung geeignet sind. Die Betrachtung beschränkt sich hierbei auf die Durchführbarkeit und Flexibilität verschiedener Bandpassfilterarchitekturen. Auf Grund hoher Frequenzanforderungen liegt der Schwerpunkt auf Filtern, die auf Transkonduktanzverstärkern und Kondensatoren basieren

5G-and-beyond and Internet of Things (IoT) technologies are pushing a shift from the classic cloud-centric view of the network to a new edge-centric vision. In such a perspective, the computation, communication and storage resources are moved closer to the user, to the benefit of network responsiveness/latency, and of an improved context-awareness, that is, the ability to tailor the network services to the live user's experience. However, these improvements do not come for free: edge networks are highly constrained, and do not match the resource abundance of their cloud counterparts. In such a perspective, the proper management of the few available resources is of crucial importance to improve the network performance in terms of responsiveness, throughput, and power consumption. However, networks in the so-called Age of Big Data result from the dynamic interactions of massive amounts of heterogeneous devices. As a consequence, traditional model-based Resource Allocation algorithms fail to cope with this dynamic and complex networks, and are being replaced by more flexible AI-based techniques as a result. In such a way, it is possible to design intelligent resource allocation frameworks, able to quickly adapt to the everchanging dynamics of the network edge, and to best exploit the few available resources. Hence, Artificial Intelligence (AI), and, more specifically Machine Learning (ML) techniques, can clearly play a fundamental role in boosting and supporting resource allocation techniques at the edge. But can AI/ML benefit from optimal Resource Allocation? Recently, the evolution towards Distributed and Federated Learning approaches, i.e. where the learning process takes place in parallel at several devices, has brought important advantages in terms of reduction of the computational load of the ML algorithms, in the amount of information transmitted by the network nodes, and in terms of privacy. However, the scarceness of energy, processing, and, possibly, communication resources at the edge, especially in the IoT case, calls for proper resource management frameworks. In such a view, the available resources should be assigned to reduce the learning time, while also keeping an eye on the energy consumption of the network nodes. According to this perspective, a two-fold paradigm can emerge at the network edge, where AI can boost the performance of Resource Allocation, and, vice versa, optimal Resource Allocation techniques can speed up the learning process of AI algorithms. Part I of this work of thesis explores the first topic, i.e. the usage of AI to support Resource Allocation at the edge, with a specific focus on two use-cases, namely UAV-assisted cellular networks, and vehicular networks. Part II deals instead with the topic of Resource Allocation for AI, and, specifically, with the case of the integration between Federated Learning techniques and the LoRa LPWAN protocol. The designed integration framework has been validated on both simulation environments, and, most importantly, on the Colosseum platform, the biggest channel emulator in the world.

Emerging concepts such as Smart Production, Industrial Internet of Things, and Industry 4.0 bring a radically new set of requirements to the way industrial systems are engineered. In what concerns the communication infrastructure, support to dynamic environments, interoperability and heterogeneity, combined with a significant increase in the number of devices, are just a few of the challenges that must be faced. Software-defined networking (SDN) is a disruptive networking paradigm that emerged on campus networks but soon captured considerable interest from industry and academia, and is considered a leap forward in open traffic management. It exhibits two particular features that are very well suited to manage a network with real-time requirements: (i) a centralized resource control, completely decoupled from the data plane, and (ii), a fine granular resource control, down to validating each single frame received in each port of a switch. However, due to its roots, the SDN traffic model favors the average network throughput with best-effort policies, eventually imposing bandwidth constraints or setting fixed priorities. This model is not compatible with industrial scenarios, which typically have strict requirements in terms of predictability, timeliness and fault tolerance. This dissertation supports the thesis that is possible to support the flexibility, timeliness, and heterogeneity requirements of emerging industrial applications by enhancing SDN technologies with the means to enact resource reservations on networks comprising switching platforms with component-based real-time services. In particular, this work: (i) enhances a real-time switching platform with SDN services, (ii) develops extensions to OpenFlow, a seminal SDN protocol, so an OpenFlow controller may be able to configure both SDN and real-time services, and (iii) extends an OpenFlow controller with scheduling analysis so it may perform the admission control of new traffic flows while maintaining the timeliness behavior of the whole network. A prototype of the proposed real-time SDN framework is used to perform several experiments that validate the desired properties and consequently, the thesis.
Conceitos emergentes como Produção Inteligente, Internet Industrial das Coisas e Indústria 4.0 trazem um conjunto radicalmente novo de requisitos para o modo como os sistemas industriais são projetados. No que diz respeito à infra-estrutura de comunicação, o suporte a ambientes dinâmicos, interoperabilidade e heterogeneidade, combinado com um aumento significativo no número de dispositivos, são apenas alguns dos desafios que devem ser enfrentados. Redes definidas por software (SDN) é um paradigma de rede disruptivo que surgiu nas redes de campus, mas logo conquistou um interesse considerável da indústria e da academia, e é considerado um salto na gestão de tráfego aberto. Ele exibe dois recursos específicos que são muito adequados para gerir uma rede com requisitos em tempo real: (i) um controlo de recursos centralizado, completamente desacoplado do plano de dados, e (ii), um controlo granular de recursos, trama a trama. No entanto, devido às suas raízes, o modelo de tráfego SDN favorece o rendimento médio da rede com políticas de melhor esforço, eventualmente impondo restrições de largura de banda ou definindo prioridades fixas. Este modelo não é compatível com cenários industriais, que normalmente têm requisitos rigorosos em termos de previsibilidade, pontualidade e tolerância a falhas. Esta dissertação suporta a tese de que é possível suportar a flexibilidade, a pontualidade e os requisitos de heterogeneidade de aplicações industriais emergentes, aprimorando as tecnologias SDN com os meios para aprovar reservas de recursos em redes que incluem plataformas de comutação com serviços em tempo real baseados em componentes. Em particular, este trabalho: (i) aprimora uma plataforma de comutação em tempo real com serviços SDN, (ii) desenvolve extensões para o OpenFlow, um protocolo seminal SDN, para que um controlador OpenFlow possa configurar serviços SDN e em tempo real, e (iii) estende um controlador OpenFlow com análise de escalonamento para que possa executar o controle de admissão de novos fluxos de tráfego enquanto mantém o comportamento de prontidão de toda a rede. Um protótipo da estrutura SDN em tempo real proposto é usado para executar vários experimentos que validam as propriedades desejadas e, consequentemente, a tese.
Programa Doutoral em Telecomunicações

Three novel approaches that are based on a recent communication technique called time compression overlap-add (TC-OLA), are introduced into pulse compression (PC) radar systems to improve the radar waveform shaping and enhance radar performance. The first approach lays down a powerful framework for combining the TC-OLA technique into traditional PC radar system. The new TC-OLA-based radar obtained is compared with other radars, namely traditional linear frequency modulation (LFM), and wideband LFM which has the same processing gain under different background situations. The results show the superiority of the proposed radar over the others. The second approach combines a random phase noise signal with a selected radar signal to build a new radar system, SSLFM radar, that enjoys the low-probability of intercept property, and, therefore, has higher immunity against noise jamming techniques compared with other radar systems. The properly recovery of the transmitted signal, however, requires a synchronization system at the receiver side. In this dissertation, we propose three synchronization systems each having different pros and cons. The last approach takes the radar waveform design methodology in a different direction and proposes a novel framework to combine any number of radar signal and transmit them simultaneously. Instead of trying to achieve universality through waveform shaping optimization, we do so via pluralism. As a proof of concept, all the proposed radars have been implemented and tested on software-defined radar (SDR). The theoretical and the experimental results showed the superiority of all proposed radar systems. Since TC-OLA is fundamental to this work, we add a chapter to propose a new technique called downsample upsample shift add (DUSA) to address the limitations of the existing implementation of TC-OLA.
Graduate

abstract: Within the near future, a vast demand for autonomous vehicular techniques can be forecast on both aviation and ground platforms, including autonomous driving, automatic landing, air traffic management. These techniques usually rely on the positioning system and the communication system independently, where it potentially causes spectrum congestion. Inspired by the spectrum sharing technique, Communications and High-Precision Positioning (CHP2) system is invented to provide a high precision position service (precision ~1cm) while performing the communication task simultaneously under the same spectrum. CHP2 system is implemented on the consumer-off-the-shelf (COTS) software-defined radio (SDR) platform with customized hardware. Taking the advantages of the SDR platform, the completed baseband processing chain, time-of-arrival estimation (ToA), time-of-flight estimation (ToF) are mathematically modeled and then implemented onto the system-on-chip (SoC) system. Due to the compact size and cost economy, the CHP2 system can be installed on different aerial or ground platforms enabling a high-mobile and reconfigurable network. In this dissertation report, the implementation procedure of the CHP2 system is discussed in detail. It mainly focuses on the system construction on the Xilinx Ultrascale+ SoC platform. The CHP2 waveform design, ToA solution, and timing exchanging algorithms are also introduced. Finally, several in-lab tests and over-the-air demonstrations are conducted. The demonstration shows the best ranging performance achieves the ~1 cm standard deviation and 10Hz refreshing rate of estimation by using a 10MHz narrow-band signal over 915MHz (US ISM) or 783MHz (EU Licensed) carrier frequency.
Dissertation/Thesis
Doctoral Dissertation Electrical Engineering 2020