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Littérature scientifique sur le sujet « Metal-semiconductor field effect transistor (MESFET) »

Auteur : Grafiati

Publié le 9 mars 2023

Mis à jour le 10 mars 2023

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Articles de revues sur le sujet "Metal-semiconductor field effect transistor (MESFET)"

Zhu, Shunwei, Hujun Jia, Xingyu Wang, Yuan Liang, Yibo Tong, Tao Li et Yintang Yang. « Improved MRD 4H-SiC MESFET with High Power Added Efficiency ». Micromachines 10, n^o 7 (17 juillet 2019) : 479. http://dx.doi.org/10.3390/mi10070479.

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An improved multi-recessed double-recessed p-buffer layer 4H–SiC metal semiconductor field effect transistor (IMRD 4H-SiC MESFET) with high power added efficiency is proposed and studied by co-simulation of advanced design system (ADS) and technology computer aided design (TCAD) Sentaurus software in this paper. Based on multi-recessed double-recessed p-buffer layer 4H–SiC metal semiconductor field effect transistor (MRD 4H-SiC MESFET), the recessed area of MRD MESFET on both sides of the gate is optimized, the direct current (DC), radio frequency (RF) parameters and efficiency of the device is balanced, and the IMRD MESFET with a best power-added efficiency (PAE) is finally obtained. The results show that the PAE of the IMRD MESFET is 68.33%, which is 28.66% higher than the MRD MESFET, and DC and RF performance have not dropped significantly. Compared with the MRD MESFET, the IMRD MESFET has a broader prospect in the field of microwave radio frequency.

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Jia, Hujun, Mei Hu et Shunwei Zhu. « An Improved UU-MESFET with High Power Added Efficiency ». Micromachines 9, n^o 11 (5 novembre 2018) : 573. http://dx.doi.org/10.3390/mi9110573.

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An improved ultrahigh upper gate 4H-SiC metal semiconductor field effect transistor (IUU-MESFET) is proposed in this paper. The structure is obtained by modifying the ultrahigh upper gate height h of the ultrahigh upper gate 4H-SiC metal semiconductor field effect transistor (UU-MESFET) structure, and the h is 0.1 μm and 0.2 μm for the IUU-MESFET and UU-MESFET, respectively. Compared with the UU-MESFET, the IUU-MESFET structure has a greater threshold voltage and trans-conductance, and smaller breakdown voltage and saturation drain current, and when the ultrahigh upper gate height h is 0.1 μm, the relationship between these parameters is balanced, so as to solve the contradictory relationship that these parameters cannot be improved simultaneously. Therefore, the power added efficiency (PAE) of the IUU-MESFET structure is increased from 60.16% to 70.99% compared with the UU-MESFET, and advanced by 18%.

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FJELDLY, TOR A., et MICHAEL S. SHUR. « SIMULATION AND MODELING OF COMPOUND SEMICONDUCTOR DEVICES ». International Journal of High Speed Electronics and Systems 06, n^o 01 (mars 1995) : 237–84. http://dx.doi.org/10.1142/s0129156495000079.

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We review the simulation and modeling techniques used for popular compound semiconductor devices such as the Heterostructure Field Effect Transistor (HFET), the Metal Semiconductor Field Effect Transistor (MESFET), and the Heterostructure Bipolar Transistor (HBT). Starting with the basic transport theory and the numerical simulation techniques based on this theory, we proceed to give examples of Monte Carlo simulations and of 2D balance equation simulations for investigating fundamental device properties and for exploring new design concepts. Next, we present analytical HFET and MESFET models suitable for circuit simulations. These models are based on the so-called universal FET modeling concept, and accurately reproduce FET I-V and C-V characteristics. Finally, we review basic simulation and modeling issues for HBTs.

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Hasan, Md Sakib, Samira Shamsir, Mst Shamim Ara Shawkat, Frances Garcia et Syed K. Islam. « Multivariate Regression Polynomial : A Versatile and Efficient Method for DC Modeling of Different Transistors (MOSFET, MESFET, HBT, HEMT and G4FET) ». International Journal of High Speed Electronics and Systems 27, n^o 03n04 (septembre 2018) : 1840016. http://dx.doi.org/10.1142/s0129156418400165.

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This work presents multivariate regression polynomial as a versatile and efficient method for DC modeling of modern transistors with very different underlying physics including MOSFET (metal-oxide-semiconductor field-effect transistor), MESFET (metal–semiconductor field-effect transistor), HBT (heterojunction bipolar transistor), HEMT (High-electron-mobility transistor) and a novel silicon-on-insulator four-gate transistors (G4FET). A set of available data from analytic solution, TCAD simulation, and experimental measurements for different operating conditions is used to empirically determine the parameters of this model and a different set of test data is used to verify its predictive accuracy. The developed model expresses the drain current as a single multivariate regression polynomial with its validity spanning across different possible operating regions as long as the chosen independent variables lie within the range of training data set. The continuity of the resulting polynomial and its first and second order derivatives make it particularly suitable for implementation in a circuit simulator. The model also provides a method for further simplification based on prior knowledge of the underlying physical mechanism and shows excellent predictive capability for different kinds of devices. This can be very useful for modeling deep-submicron emerging devices for which any closed-form analytical solution is not yet available.

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Estakhrian Haghighi, Amir Reza, et Mojtaba Mohamadi. « The Silicon Plates in Buried Oxide for Enhancement of the Breakdown Voltage in SOI MESFET ». Applied Mechanics and Materials 538 (avril 2014) : 58–61. http://dx.doi.org/10.4028/www.scientific.net/amm.538.58.

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This paper introduces a novel SOI MESFET which enhancement breakdown voltage (VBR) by modifying electric field distribution. To achieve high enhancement of the VBR utilized three Silicon plates in buried oxide of the silicon on insulator metal semiconductor field effect transistor (SOI MESFET). This change in the SOI MESFET structure leads to controlled electric field distribution , increase VBR and Output Resistance (RO). The numerical simulation results show that the VBR of the Silicon Plates SOI MESFET (SP-SOI MESFET) structure improves by 50% compared with that of the conventional SOI MESFET (C-SOI MESFET) structure. As a result, the SP-SOI MESFET structure has superior electrical performances in comparison with the conventional structure.

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Lau, W. M., Ji Lijiu, K. Lowe, W. Tang et L. Young. « Hysteresis in GaAs metal-semiconductor field-effect transistors I–V characteristics ». Canadian Journal of Physics 63, n^o 6 (1 juin 1985) : 748–52. http://dx.doi.org/10.1139/p85-119.

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The hysteresis loops observed in the drain current vs. voltage characteristics of metal-semiconductor field-effect transistors (MESFET's) fabricated on semi-insulating GaAs by ion implantation were investigated as a function of the sweep frequency and of the temperature. A model was developed to correlate the extent of the looping to the characteristics of the deep-level traps in the channel. Experimental results were compared with the channel deep-level transient spectroscopic results on the same MESFET.

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Sitch, J. « Comparison of field-effect transistor logic families for a GaAs depletion-mode metal semiconductor field-effect transistor ». Canadian Journal of Physics 65, n^o 8 (1 août 1987) : 882–84. http://dx.doi.org/10.1139/p87-137.

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Normally-on or depletion-mode field-effect transistors (MESFET) form the basis of the most mature and robust GaAs active-circuit technology. Because of the negative threshold voltage, depletion-mode metal semiconductor field-effect transistors (D-MEFSET) need level shifters to enable the output of one transistor to switch the input of the next. Buffered FET logic (BFL) is the most popular approach leading to gates that are fast and have good output-drive capability, but they occupy a lot of space and consume a lot of power. Capacitor – FET logic (CFL) has about one quarter of the power dissipation of BFL and occupies a similar area of GaAs. CFL is as fast as BFL, but the output-drive capability is inferior.The aim of the work described here is to develop a family of CFL gates that are at least as fast as BFL under all loading conditions while maintaining the power advantage of CFL. Bootstrapping the load increases the speed, but the output drive remains unsatisfactory. A super-buffered arrangement results in the lowest power and good output drive but with a slight reduction in speed compared to BFL. A combination of super buffering and load bootstrapping results in a design that meets all requirements. For example, a CFL gate with 12 mW dissipation gives a delay of 49 ps for a fan-out of unity and a loading factor of 13 ps per fan-out. This is compared with the BFL values of 60 ps with 12 ps per fan-out and 40 mW for a gate with comparable area and input capacitance.The super CFL gates have been used in the design of a 2.4 Gb∙s−1 4: 1 multiplexer, which has been successfully fabricated using a standard depletion-mode foundry process. The total power is approximately two thirds of that which would have been dissipated by a BFL realization.

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Jia, Hujun, Yuan Liang, Tao Li, Yibo Tong, Shunwei Zhu, Xingyu Wang, Tonghui Zeng et Yintang Yang. « Improved DRUS 4H-SiC MESFET with High Power Added Efficiency ». Micromachines 11, n^o 1 (27 décembre 2019) : 35. http://dx.doi.org/10.3390/mi11010035.

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A 4H-SiC metal semiconductor field effect transistor (MESFET) with layered doping and undoped space regions (LDUS-MESFET) is proposed and simulated by ADS and ISE-TCAD software in this paper. The structure (LDUS-MESFET) introduced layered doping under the lower gate of the channel, while optimizing the thickness of the undoped region. Compared with the double-recessed 4H-SiC MESFET with partly undoped space region (DRUS-MESFET), the power added efficiency of the LDUS-MESFET is increased by 85.8%, and the saturation current is increased by 27.4%. Although the breakdown voltage of the device has decreased, the decrease is within an acceptable range. Meanwhile, the LDUS-MESFET has a smaller gate-source capacitance and a large transconductance. Therefore, the LDUS-MESFET can better balance DC and AC characteristics and improve power added efficiency (PAE).

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Yoshida, Seikoh, et Joe Suzuki. « High-Temperature Reliability of GaN Electronic Devices ». MRS Internet Journal of Nitride Semiconductor Research 5, S1 (2000) : 369–75. http://dx.doi.org/10.1557/s109257830000452x.

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High-quality GaN was grown using gas-source molecular-beam epitaxy (GSMBE). The mobility of undoped GaN was 350 cm2/Vsec and the carrier concentration was 6×1016 cm−3 at room temperature. A GaN metal semiconductor field-effect transistor (MESFET) and an n-p-n GaN bipolar junction transistor (BJT) were fabricated for high-temperature operation. The high-temperature reliability of the GaN MESFET was also investigated. That is, the lifetime of the FET at 673 K was examined by continuous current injection at 673 K. We confirmed that the FET performance did not change at 673 K for over 1010 h. The aging performance of the BJT at 573 K was examined during continuous current injection at 573 K for over 850 h. The BJT performance did not change at 573 K. The current gain was about 10. No degradation of the metal-semiconductor interface was observed by secondary ion-mass spectrometry (SIMS) and transmission electron microscopy (TEM). It was also confirmed by using Si-ion implantation that the contact resistivity of the GaN surface and electrode materials could be lowered to 7×10−6 ohmcm2.

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Zhang, Xian Jun, et Na You. « Dependence of the Breakdown Voltage of 4H-SiC MESFET’s on the Field Plate and Step-Channel ». Applied Mechanics and Materials 668-669 (octobre 2014) : 803–7. http://dx.doi.org/10.4028/www.scientific.net/amm.668-669.803.

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The breakdown mechanism of the 4H-SiC metal-semiconductor field effect transistor (4H-SiC MESFET) at a large drain bias is explored and the dependence of breakdown voltage on the field-plate and the step-channel is investigated by simulation. The results revealed that the breakdown occurs at the corner of the gate near to the drain. The channel step and the field-plate length have sensitive effect on the breakdown voltage. The breakdown characteristics are improved since the electric field peak is lowered at breakdown point in the step-channel and field-plate structures. The largest breakdown voltage can be achieved by optimizing the field-plate length.

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Thèses sur le sujet "Metal-semiconductor field effect transistor (MESFET)"

Frenzel, Heiko. « ZnO-based metal-semiconductor field-effect transistors ». Doctoral thesis, Universitätsbibliothek Leipzig, 2010. http://nbn-resolving.de/urn:nbn:de:bsz:15-qucosa-61957.

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Die vorliegende Arbeit befasst sich mit der Entwicklung, Herstellung und Untersuchung von ZnO-basierten Feldeffekttransistoren (FET). Dabei werden im ersten Teil Eigenschaften von ein- und mehrschichtigen Isolatoren mit hohen Dielektrizitätskonstanten betrachtet, die mittels gepulster Laserabscheidung (PLD) dargestellt wurden. Die elektrischen und kapazitiven Eigenschaften dieser Isolatoren innerhalb von Metall-Isolator-Metall (MIM) bzw. Metall-Isolator-Halbleiter (MIS) Übergängen wurden untersucht. Letzterer wurde schließlich als Gate-Struktur in Metall-Isolator-Halbleiter-FET (MISFET) mit unten (backgate) bzw. oben liegendem Gate (topgate) genutzt. Der zweite Teil konzentriert sich auf Metal-Halbleiter-FET (MESFET), die einen Schottky-Kontakt alsGate nutzen. Dieser wurde mittels reaktiver Kathodenzerstäubung (Sputtern) von Ag, Pt, Pd oder Au unter Einflußvon Sauerstoff hergestellt. ZnO-MESFET stellen eine vielversprechende Alternative zu den bisher in der Oxid-basierten Elektronik verwendeten MISFET dar. Durch die Variation des verwendeten Gate-Metalls, Dotierung, Dicke und Struktur des Kanals und Kontakstruktur, wurde ein Herstellungsstandard gefunden, der zu weiteren Untersuchungen herangezogen wurde. So wurde die Degradation der MESFET unter Belastung durch dauerhaft angelegte Spannung, Einfluss von Licht und erhöhten Temperaturen sowie lange Lagerung getestet. Weiterhin wurden ZnO-MESFET auf industriell genutztem Glasssubstrat hergestellt und untersucht, um die Möglichkeit einer großflächigen Anwendung in Anzeigeelementen aufzuzeigen. Einfache integrierte Schaltungen, wie Inverter und ein NOR-Gatter, wurden realisiert. Dazu wurden Inverter mit sogenannten Pegelschiebern verwendet, welche die Ausgangsspannung des Inverters so verschieben, dass eine logische Aneinanderreihungvon Invertern möglich wird. Schließlich wurden volltransparente MESFET und Inverter, basierend auf neuartigen transparenten gleichrichtenden Kontakten demonstriert.

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Turner, Gary Chandler. « Zinc Oxide MESFET Transistors ». Thesis, University of Canterbury. Electrical and Computer Engineering, 2009. http://hdl.handle.net/10092/3439.

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Zinc oxide is a familiar ingredient in common household items including sunscreen and medicines. It is, however, also a semiconductor material. As such, it is possible to use zinc oxide (ZnO) to make semiconductor devices such as diodes and transistors. Being transparent to visible light in its crystalline form means that it has the potential to be the starting material for so-called 'transparent electronics', where the entire device is transparent. Transparent transistors have the potential to improve the performance of the electronics currently used in LCD display screens. Most common semiconductor devices require the material to be selectively doped with specific impurities that can make the material into one of two electronically distinct types – p- or n-type. Unfortunately, making reliable p-type ZnO has been elusive to date, despite considerable efforts worldwide. This lack of p-type material has hindered development of transistors based on this material. One alternative is a Schottky junction, which can be used as the active element in a type of transistor known as a metal-semiconductor field effect transistor, MESFET. Schottky junctions are traditionally made from noble metal layers deposited onto semiconductors. Recent work at the Canterbury University has shown that partially oxidised metals may in fact be a better choice, at least to zinc oxide. This thesis describes the development of a fabrication process for metal-semiconductor field effect transistors using a silver oxide gate on epitaxially grown zinc oxide single crystals. Devices were successfully produced and electrically characterised. The measurements show that the technology has significant potential.

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Abbott, Derek. « GaAs MESFET Photodetectors for imaging arrays / ». Title page, contents and abstract only, 1995. http://web4.library.adelaide.edu.au/theses/09PH/09pha1312.pdf.

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BRAGA, DANIELE. « Charge transport properties of organic semiconductors : application to fiels effect transistors ». Doctoral thesis, Università degli Studi di Milano-Bicocca, 2009. http://hdl.handle.net/10281/8009.

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In order to go deeper in the knowledge of the fundamentals of Organic Field Effect Transistors (OFETs), we have characterized different typologies of OFETs using rubrene single crystals. The latter are highly ordered organic semiconductors with which high mobility transistors can be fabricated. First we have obtained a detailed picture about the properties of a rubrene single crystal, by analyzing the current-voltage (I-V) characteristics of symmetric diodes with the Space Charge Limited Current (SCLC) theory. A low density of defects and a low density of intrinsic thermally generated carriers have been found to characterize this material. On this basis, we have analyzed metal-semiconductor-field-effect-transistors (MESFETs). These non-conventional devices have been proved to be efficient organic FETs, in which the process of charge carrier injection from the ohmic source contact is controlled by the voltage applied to a non-ohmic gate electrode. Finally, metal-insulator-semiconductor field effect transistors (MISFETs) have been considered. The (I-V) trend below the threshold voltage is not exponential, as predicted by the inorganic theory; instead, it is linear with the gate voltage and it follows a pseudo-exponential behaviour only in a narrow transition region. An alternative semi-analytical description has been provided here by taking into account the effect of a localized trap level on the distribution of free charges. The presence of this discrete trap level was highlighted by the previously conducted SCLC analysis.

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Utard, Christian. « Les oscillateurs microondes faible bruit de fond a base de mesfet gaas, tegfet gaalas et transistor bipolaire silicium : modelisation, caracterisation et comparaison ». Toulouse 3, 1988. http://www.theses.fr/1988TOU30078.

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On presente une methode simplifiee de modelisation fort signal des mesfet et tegfet et transistors bipolaires. Ces trois types de transistors sont utilises dans un montage oscillateur dont les caracteristiques ont ete determines de trois facons differentes, analytique par simulation electrique temporelle et par mesures experimentales. On presente enfin une etude en bruit bf et bruit mf des transistors et des oscillateurs afin de determiner le composant le plus performant. Nous proposons trois facons de determiner le coefficient de conversion bruit bf - bruit mf, par des mesures directes; indirectes et par simulation temporelle

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Ahmed, Muhammad Mansoor. « Optimisation of submicron low-noise GaAs MESFETs ». Thesis, University of Cambridge, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.242966.

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Takshi, Arash. « Organic metal-semiconductor field-effect transistor (OMESFET) ». Thesis, University of British Columbia, 2007. http://hdl.handle.net/2429/31531.

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Organic electronics offers the possibility of producing ultra-low-cost and large-area electronics using printing methods. Two challenges limiting the utility of printed electronic circuits are the high operating voltage and the relatively poor performance of printed transistors. It is shown that voltages can be reduced by replacing the capacitive gate used in Organic Field-Effect Transistors (OFETs) with a Schottky contact, creating a thin-film Organic Metal-Semiconductor Field-Effect Transistor (OMESFET). This geometry solves the voltage issue, and promises to be useful in situations where low voltage operation is important, but good performance is not essential. In cases where high voltage is acceptable or required, it is shown that OFET performance can be greatly improved by employing a Schottky contact as a second gate. The relatively thick insulating layer between the gate and the semiconductor in OFETs makes it necessary to employ a large change of gate voltage (~40 V) to control the drain current. In order to reduce the voltage to less than 5 V a very thin (<10 nm) insulating layer and/or high-k dielectric materials can be used, but these solutions are not compatible with current printing technology. Simulations and implementations of OMESFET devices demonstrate low voltage operation (<5 V) and improved sub-threshold swing compared to the OFET. However, these benefits are achieved at the expense of mobility. In order to achieve good performance in an OFET, including threshold voltage, current ratio and output resistance, the semiconductor thickness has to be less than 50 nm, whereas the thickness of a printed semiconductor is typically larger than 200 nm. The addition of a top Schottky contact on the OFET creates a depletion region thereby reducing the effective thickness of the semiconductor, and resulting in enhanced transistor performance. Simulations and experimental results show improvements in the threshold voltage, the current ratio, and the output resistance of a dual gate transistor, when compared to those in an OFET of the same thickness. The transistors introduced in this work demonstrate means of improving the performance of thick-film OFETs and of achieving substantially lower operation voltage in organic transistors.
Applied Science, Faculty of
Electrical and Computer Engineering, Department of
Graduate

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Mogniotte, Jean-François. « Conception d'un circuit intégré en SiC appliqué aux convertisseur de moyenne puissance ». Thesis, Lyon, INSA, 2014. http://www.theses.fr/2014ISAL0004/document.

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L’émergence d’interrupteurs de puissance en SiC permet d’envisager des convertisseurs de puissance capables de fonctionner au sein des environnements sévères tels que la haute tension (> 10 kV ) et la haute température (> 300 °C). Aucune solution de commande spécifique à ces environnements n’existe pour le moment. Le développement de fonctions élémentaires en SiC (comparateur, oscillateur) est une étape préliminaire à la réalisation d’un premier démonstrateur. Plusieurs laboratoires ont développé des fonctions basées sur des transistors bipolaires, MOSFETs ou JFETs. Cependant les recherches ont principalement portées sur la conception de fonctions logiques et non sur l’intégration de drivers de puissance. Le laboratoire AMPERE (INSA de Lyon) et le Centre National de Microélectronique de Barcelone (Espagne) ont conçu un MESFET latéral double grille en SiC. Ce composant élémentaire sera à la base des différentes fonctions intégrées envisagées. L’objectif de ces recherches est la réalisation d’un convertisseur élévateur de tension "boost" monolithique et de sa commande en SiC. La démarche scientifique a consisté à définir dans un premier temps un modèle de simulation SPICE du MESFET SiC à partir de caractérisations électriques statique et dynamique. En se basant sur ce modèle, des circuits analogiques tels que des amplificateurs, oscillateurs, paires différentielles, trigger de Schmitt ont été conçus pour élaborer le circuit de commande (driver). La conception de ces fonctions s’avère complexe puisqu’il n’existe pas de MESFETs de type P et une polarisation négative de -15 V est nécessaire au blocage des MESFETs SiC. Une structure constituée d’un pont redresseur, d’un boost régulé avec sa commande basée sur ces différentes fonctions a été réalisée et simulée sous SPICE. L’ensemble de cette structure a été fabriqué au CNM de Barcelone sur un même substrat SiC semi-isolant. L’intégration des éléments passifs n’a pas été envisagée de façon monolithique (mais pourrait être considérée pour les inductances et capacités dans la mesure où les valeurs des composants intégrés sont compatibles avec les processus de réalisation). Le convertisseur a été dimensionné pour délivrer une de puissance de 2.2 W pour une surface de 0.27 cm2, soit 8.14 W/cm2. Les caractérisations électriques des différents composants latéraux (résistances, diodes, transistors) valident la conception, le dimensionnement et le procédé de fabrication de ces structures élémentaires, mais aussi de la majorité des fonctions analogiques. Les résultats obtenus permettent d’envisager la réalisation d’un driver monolithique de composants Grand Gap. La perspective des travaux porte désormais sur la réalisation complète du démonstrateur et sur l’étude de son comportement en environnement sévère notamment en haute température (> 300 °C). Des analyses des mécanismes de dégradation et de fiabilité des convertisseurs intégrés devront alors être envisagées
The new SiC power switches is able to consider power converters, which could operate in harsh environments as in High Voltage (> 10kV) and High Temperature (> 300 °C). Currently, they are no specific solutions for controlling these devices in harsh environments. The development of elementary functions in SiC is a preliminary step toward the realization of a first demonstrator for these fields of applications. AMPERE laboratory (France) and the National Center of Microelectronic of Barcelona (Spain) have elaborated an elementary electrical compound, which is a lateral dual gate MESFET in Silicon Carbide (SiC). The purpose of this research is to conceive a monolithic power converter and its driver in SiC. The scientific approach has consisted of defining in a first time a SPICE model of the elementary MESFET from electric characterizations (fitting). Analog functions as : comparator, ring oscillator, Schmitt’s trigger . . . have been designed thanks to this SPICE’s model. A device based on a bridge rectifier, a regulated "boost" and its driver has been established and simulated with the SPICE Simulator. The converter has been sized for supplying 2.2 W for an area of 0.27 cm2. This device has been fabricated at CNM of Barcelona on semi-insulating SiC substrate. The electrical characterizations of the lateral compounds (resistors, diodes, MESFETs) checked the design, the "sizing" and the manufacturing process of these elementary devices and analog functions. The experimental results is able to considerer a monolithic driver in Wide Band Gap. The prospects of this research is now to realize a fully integrated power converter in SiC and study its behavior in harsh environments (especially in high temperature > 300 °C). Analysis of degradation mechanisms and reliability of the power converters would be so considerer in the future

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Xia, Zhanbo. « Materials and Device Engineering for High Performance β-Ga2O3-based Electronics ». The Ohio State University, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=osu1587688595358557.

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Shi, Xuejie. « Compact modeling of double-gate metal-oxide-semiconductor field-effect transistor / ». View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202006%20SHI.

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Livres sur le sujet "Metal-semiconductor field effect transistor (MESFET)"

1954-, Golio John Michael, dir. Microwave MESFETs and HEMTs. Boston : Artech House, 1991.

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Microwave field-effect transistors : Theory, design, and applications. 3^e éd. Atlanta : Noble, 1995.

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Microwave field-effect transistors : Theory, design, and applications. 2^e éd. Letchworth, Herts., England : Research Studies Press, 1986.

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Fundamentals of III-V devices : HBTs, MESFETs, and HFETs/HEMTs. New York : Wiley, 1999.

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Tsividis, Yannis. Operation and modeling of the MOS transistor. 3^e éd. New York : Oxford University Press, 2010.

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Tsividis, Yannis. Operation and modeling of the MOS transistor. 3^e éd. New York : Oxford University Press, 2011.

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Tsividis, Yannis. Operation and modeling of the MOS transistor. 3^e éd. New York : Oxford University Press, 2010.

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Amara, Amara, et Rozeau Olivier, dir. Planar double-gate transistor : From technology to circuit. [Dordrecht?] : Springer, 2009.

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Amara, Amara, et Rozeau Olivier, dir. Planar double-gate transistor : From technology to circuit. [Dordrecht?] : Springer, 2009.

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C, Sansen Willy M., et Maes H. E, dir. Matching properties of deep sub-micron MOS transistors. New York : Springer, 2005.

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Chapitres de livres sur le sujet "Metal-semiconductor field effect transistor (MESFET)"

Amiri, Iraj Sadegh, Hossein Mohammadi et Mahdiar Hosseinghadiry. « Future Works on Silicon-on-Insulator Metal–Semiconductor Field Effect Transistors (SOI MESFETs) ». Dans Device Physics, Modeling, Technology, and Analysis for Silicon MESFET, 113–15. Cham : Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-030-04513-5_7.

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Amiri, Iraj Sadegh, Hossein Mohammadi et Mahdiar Hosseinghadiry. « General Overview of the Basic Structure and Operation of a Typical Silicon on Insulator Metal–Semiconductor Field Effect Transistor (SOI-MESFET) ». Dans Device Physics, Modeling, Technology, and Analysis for Silicon MESFET, 11–41. Cham : Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-030-04513-5_2.

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Egawa, Takashi, et Masayoshi Umeno. « GaN Metal-Semiconductor Field-Effect Transistor ». Dans III-V Nitride Semiconductors, 369–98. Boca Raton : CRC Press, 2022. http://dx.doi.org/10.1201/9780367813628-8.

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Evstigneev, Mykhaylo. « Metal–Oxide–Semiconductor Field Effect Transistor (MOSFET) ». Dans Introduction to Semiconductor Physics and Devices, 233–55. Cham : Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-08458-4_10.

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Tsang, Paul J. « Structures and Fabrication of Metal-Oxide-Silicon Field-Effect Transistor ». Dans Handbook of Advanced Semiconductor Technology and Computer Systems, 92–147. Dordrecht : Springer Netherlands, 1988. http://dx.doi.org/10.1007/978-94-011-7056-7_4.

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Bharti, Deepshikha, et Aminul Islam. « Operational Characteristics of Vertically Diffused Metal Oxide Semiconductor Field Effect Transistor ». Dans Nanoscale Devices, 91–108. Boca Raton : Taylor & Francis, a CRC title, part of the Taylor & Francis imprint, a member of the Taylor & Francis Group, the academic division of T&F Informa, plc, 2019. : CRC Press, 2018. http://dx.doi.org/10.1201/9781315163116-5.

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Bharti, Deepshikha, et Aminul Islam. « U-Shaped Gate Trench Metal Oxide Semiconductor Field Effect Transistor : Structures and Characteristics ». Dans Nanoscale Devices, 69–90. Boca Raton : Taylor & Francis, a CRC title, part of the Taylor & Francis imprint, a member of the Taylor & Francis Group, the academic division of T&F Informa, plc, 2019. : CRC Press, 2018. http://dx.doi.org/10.1201/9781315163116-4.

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Sridevi, R., et J. Charles Pravin. « Two-Dimensional Transition Metal Dichalcogenide (TMD) Materials in Field-Effect Transistor (FET) Devices for Low Power Applications ». Dans Semiconductor Devices and Technologies for Future Ultra Low Power Electronics, 253–88. Boca Raton : CRC Press, 2021. http://dx.doi.org/10.1201/9781003200987-11.

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« Metal-Semiconductor Field-Effect Transistor ». Dans Complete Guide to Semiconductor Devices, 200–208. Hoboken, NJ, USA : John Wiley & Sons, Inc., 2010. http://dx.doi.org/10.1002/9781118014769.ch24.

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« Metal-Oxide-Semiconductor Field-Effect Transistor ». Dans Complete Guide to Semiconductor Devices, 175–90. Hoboken, NJ, USA : John Wiley & Sons, Inc., 2010. http://dx.doi.org/10.1002/9781118014769.ch22.

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Actes de conférences sur le sujet "Metal-semiconductor field effect transistor (MESFET)"

Gautam, Rajni, Manoj Saxena, R. S. Gupta, Mridula Gupta, P. Predeep, Mrinal Thakur et M. K. Ravi Varma. « High Sensitivity Photodetector Using Si∕Ge∕GaAs Metal Semiconductor Field Effect Transistor (MESFET) ». Dans OPTICS : PHENOMENA, MATERIALS, DEVICES, AND CHARACTERIZATION : OPTICS 2011 : International Conference on Light. AIP, 2011. http://dx.doi.org/10.1063/1.3646835.

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Grot, Annette, Steven Lin et Demetri Psaltis. « Optoelectronic neurons using MSM detectors in GaAs ». Dans OSA Annual Meeting. Washington, D.C. : Optica Publishing Group, 1991. http://dx.doi.org/10.1364/oam.1991.mk4.

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We present a new GaAs integrated optoelectronic neuron for use in neural networks. We have previously demonstrated that the integration of photodetectors, thresholding transistors, and a light source on a single substrate allows one to have high neuron density with acceptable power dissipation. In this paper we report a circuit in which we used a double heterostructure LED (light emitting diode) as the light source. We use an LED rather than laser diodes because LEDs can be operated with small currents, due to the lack of a threshold current. To minimize the total mesa height and maintain high LED quantum efficiency, MSM (metal–semiconductor–metal) photodetectors were used. The thresholding transistor was a MESFET (metal–semiconductor field-effect transistor). The total mesa height is less than 3 μm. Since no two devices share an epitaxial layer, each device is individually optimized. Our circuit uses two photodetectors, one to set the threshold voltage and the other to detect the signal. With this circuit, we can also build both excitatory and inhibitory neurons. Results from our experimental studies are presented.

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Grot, Annette C., Demetri Psaltis, Krishna V. Shenoy et Clifton G. Fonstad. « GaAs optoelectronic neuron circuits fabricated through MOSIS ». Dans OSA Annual Meeting. Washington, D.C. : Optica Publishing Group, 1993. http://dx.doi.org/10.1364/oam.1993.thb.6.

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GaAs MESFET (Metal-Semiconductor-Field-Effect Transistors) circuits available through the MOSIS service have been shown to be stable with no significant change in the Schottky gate or ohmic contact properties after 3 hours at 525°C ± 10°C. This allows one to build high density complex electronic circuitry with optical inputs and optical outputs by using lowered temperature MBE regrowth for the optical sources.

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Kim, Q., et S. Kayali. « Infrared Emission Spectroscopy as a Reliability Tool ». Dans ISTFA 1999. ASM International, 1999. http://dx.doi.org/10.31399/asm.cp.istfa1999p0077.

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Abstract In this paper, we report on a non-destructive technique, based on IR emission spectroscopy, for measuring the temperature of a hot spot in the gate channel of a GaAs metal/semiconductor field effect transistor (MESFET). A submicron-size He-Ne laser provides the local excitation of the gate channel and the emitted photons are collected by a spectrophotometer. Given the state of our experimental test system, we estimate a spectral resolution of approximately 0.1 Angstroms and a spatial resolution of approximately 0.9 μm, which is up to 100 times finer spatial resolution than can be obtained using the best available passive IR systems. The temperature resolution (<0.02 K/μm in our case) is dependent upon the spectrometer used and can be further improved. This novel technique can be used to estimate device lifetimes for critical applications and measure the channel temperature of devices under actual operating conditions. Another potential use is cost-effective prescreening for determining the 'hot spot' channel temperature of devices under normal operating conditions, which can further improve device design, yield enhancement, and reliable operation. Results are shown for both a powered and unpowered MESFET, demonstrating the strength of our infrared emission spectroscopy technique as a reliability tool.

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Estephan, Elias, Marie-Belle Saab, Petre Buzatu, Roger Aulombard, Frédéric J. G. Cuisinier, Csilla Gergely et Thierry Cloitre. « Biomolecular detection using a metal semiconductor field effect transistor ». Dans SPIE Photonics Europe, sous la direction de Jürgen Popp, Wolfgang Drexler, Valery V. Tuchin et Dennis L. Matthews. SPIE, 2010. http://dx.doi.org/10.1117/12.853536.

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Prokhorov, E. F., N. B. Gorev, I. F. Kodzhespirova et E. N. Privalov. « Frequency dispersion in GaAs metal-semiconductor field-effect transistor transconductance ». Dans Telecommunication Technology" (CriMiCo 2008). IEEE, 2008. http://dx.doi.org/10.1109/crmico.2008.4676324.

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Wu, Yuelin, Cristian Herrera, Aaron Hardy, Matthias Muehle, Tom Zimmermann et Timothy A. Grotjohn. « Diamond Metal-Semiconductor Field Effect Transistor for High Temperature Applications ». Dans 2019 Device Research Conference (DRC). IEEE, 2019. http://dx.doi.org/10.1109/drc46940.2019.9046336.

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Ge, Lei, Yan Peng, Xiwei Wang, Dufu Wang, Mingsheng Xu et Xiangang Xu. « Diamond Metal-Semiconductor Field-Effect-Transistor-based Solar Blind Detector ». Dans 2021 18th China International Forum on Solid State Lighting & 2021 7th International Forum on Wide Bandgap Semiconductors (SSLChina : IFWS). IEEE, 2021. http://dx.doi.org/10.1109/sslchinaifws54608.2021.9675152.

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Hentschel, Rico, Andre Wachowiak, Andreas Groser, Andreas Jahn, Ulrich Merkel, Ada Wille, Holger Kalisch, Andrei Vescan, Stefan Schmult et Thomas Mikolajick. « Pseudo-vertical GaN-based trench gate metal oxide semiconductor field effect transistor ». Dans 2016 11th International Conference on Advanced Semiconductor Devices & Microsystems (ASDAM). IEEE, 2016. http://dx.doi.org/10.1109/asdam.2016.7805882.

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Ping-Chuan Chang et Kai-Hsuan Lee. « In situ capped GaN-based metal-insulator-semiconductor heterostructure field-effect transistor ». Dans 2013 IEEE 10th International Conference on Power Electronics and Drive Systems (PEDS 2013). IEEE, 2013. http://dx.doi.org/10.1109/peds.2013.6527159.

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