Bibliographies thématiques / HIGH GAIN LOW POWER

Littérature scientifique sur le sujet « HIGH GAIN LOW POWER »

Auteur : Grafiati
Publié le 11 septembre 2023

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Articles de revues sur le sujet "HIGH GAIN LOW POWER"

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Astolfi, Daniele, Lorenzo Marconi, Laurent Praly et Andrew R. Teel. « Low-power peaking-free high-gain observers ». Automatica 98 (décembre 2018) : 169–79. http://dx.doi.org/10.1016/j.automatica.2018.09.009.

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Jain, Archita, et Anshu Gupta. « Low Power and High Gain Operational Transconductance Amplifier ». International Journal of Computer Applications 144, no 5 (17 juin 2016) : 30–33. http://dx.doi.org/10.5120/ijca2016910278.

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Durgam, Rajesh, S. Tamil et Nikhil Raj. « Design of Low Voltage Low Power High Gain Operational Transconductance Amplifier ». U.Porto Journal of Engineering 7, no 4 (26 novembre 2021) : 103–10. http://dx.doi.org/10.24840/2183-6493_007.004_0008.

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In this paper, a high gain structure of operational transconductance amplifier is presented. For low voltage operation with improved frequency response bulk driven quasi-floating gate MOSFET is used at the input. Further for achieving high gain the modified self cascode structure is used at the output. Compared to conventional self cascode the modified self cascode structure used provides higher transconductance which helps in significant boosting of gain of the amplifier. The modification is achieved by employing quasi-floating gate transistor which helps in scaling of the threshold which as a result increases the drain-to-source voltage of linear mode transistor thus changing it to saturation. This change of mode boosts the effective transconductance of self cascode MOSFET. The proposed operational transconductance amplifier when compared to its conventional showed improvement in DC gain by 30dB and also the unity gain bandwidth increases by 6 fold. The MOS models used for amplifier design are of 0.18µm CMOS technology at supply of 0.5V.
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Wei, Binbin, et Jinguang Jiang. « A low power high gain gain-controlled LNA + mixer for GNSS receivers ». Journal of Semiconductors 34, no 11 (novembre 2013) : 115002. http://dx.doi.org/10.1088/1674-4926/34/11/115002.

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Kim, Shin-Gon, Habib Rastegar, Min Yoon, Chul-Woo Park, Kyoungyong Park, Sookyoung Joung et Jee-Youl Ryu. « High-Gain and Low-Power Power Amplifier for 24-GHz Automotive Radars ». International Journal of Smart Home 9, no 2 (28 février 2015) : 27–34. http://dx.doi.org/10.14257/ijsh.2015.9.2.03.

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Qiurong He et Milton Feng. « Low-power, high-gain, and high-linearity SiGe BiCMOS wide-band low-noise amplifier ». IEEE Journal of Solid-State Circuits 39, no 6 (juin 2004) : 956–59. http://dx.doi.org/10.1109/jssc.2004.827801.

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Farzamiyan, Amir Hossein, et Ahmad Hakimi. « Low-power CMOS distributed amplifier using new cascade gain cell for high and low gain modes ». Analog Integrated Circuits and Signal Processing 74, no 2 (30 novembre 2012) : 453–60. http://dx.doi.org/10.1007/s10470-012-9990-9.

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Huang, Shou-Chien, Cheng-Hsiu Tsai et Yue-Ming Hsin. « Low power consumption and high gain ultra-wide-band low noise amplifier ». Microwave and Optical Technology Letters 51, no 2 (23 décembre 2008) : 382–84. http://dx.doi.org/10.1002/mop.24047.

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Cui, Lin Hai, Rui Xu, Zhan Peng Jiang et Chang Chun Dong. « Design of a Low-Voltage Low-Power CMOS Operational Amplifier ». Applied Mechanics and Materials 380-384 (août 2013) : 3283–86. http://dx.doi.org/10.4028/www.scientific.net/amm.380-384.3283.

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A low voltage, low power two-stage operational amplifier (op-amp) was proposed in this paper. A folded-cascode structure is used in the input stage of the amplifier to get high gain. Current mirrors are used in the input stage to make the transconduotance constant. A simple push-pull common source amplifier is adopted as the output stage to take the advantages of its high efficiency. The experimental results show that the unity-gain bandwidth is 12.5MHz, the low-frequency open-loop voltage gain is 100dB,the phase margin is 65°, and power dissipation is 98.8μw.
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Karimi, Gholamreza, Saeed Gholami et Saeed Roshani. « A linear high-gain and low-power CMOS UWB mixer ». International Journal of Electronics Letters 1, no 4 (décembre 2013) : 159–67. http://dx.doi.org/10.1080/21681724.2013.829997.

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Thèses sur le sujet "HIGH GAIN LOW POWER"

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Li, Lisha. « High Gain Low Power Operational Amplifier Design and Compensation Techniques ». Diss., CLICK HERE for online access, 2007. http://contentdm.lib.byu.edu/ETD/image/etd1701.pdf.

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Saidev, Sriram. « Design of a Digitally Enhanced, Low Power, High Gain, High Linearity CMOS Mixer and CppSim Evaluation ». The Ohio State University, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=osu1461262622.

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Chen, Lin. « A low power, high dynamic-range, broadband variable gain amplifier for an ultra wideband receiver ». Texas A&M University, 2003. http://hdl.handle.net/1969.1/5843.

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A fully differential Complementary Metal-Oxide Semiconductor (CMOS) Variable Gain Amplifier (VGA) consisting of complementary differential pairs with source degeneration, a current gain stage with programmable current mirror, and resistor loads is designed for high frequency and low power communication applications, such as an Ultra Wideband (UWB) receiver system. The gain can be programmed from 0dB to 42dB in 2dB increments with -3dB bandwidth greater than 425MHz for the entire range of gain. The 3rd-order intercept point (IIP3) is above -13.6dBm for 1Vpp differential input and output voltages. These low distortion broadband features benefit from the large linear range of the differential pair with source degeneration and the low impedance internal nodes in the current gain stages. In addition, common-mode feedback is not required because of these low impedance nodes. Due to the power efficient complementary differential pairs in the input stage, power consumption is minimized (9.5mW) for all gain steps. The gain control scheme includes fine tuning (2dB/step) by changing the bias voltage of the proposed programmable current mirror, and coarse tuning (14dB/step) by switching on/off the source degeneration resistors in the differential pairs. A capacitive frequency compensation scheme is used to further extend the VGA bandwidth.
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Singh, Rishi Pratap. « A High-Gain, Low-Power CMOS Operational Amplifier Using Composite Cascode Stage in the Subthreshold Region ». BYU ScholarsArchive, 2011. https://scholarsarchive.byu.edu/etd/2510.

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This thesis demonstrates that the composite cascode differential stage, operating in the subthreshold region, can form the basis of a high gain (113 dB) and low-power op amp (28.1 µW). The circuit can be fabricated without adding a compensation capacitance. The advantages of this architecture include high voltage gain, low bandwidth, low harmonic distortion, low quiescent current and power, and small chip area. These advantages suggest that this design might be well-suited for biomedical applications where low power, low noise bio-signal amplifiers capable of amplifying signals in the millihertz-to-kilohertz range is required.
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Cahill, Kurtis Daniel. « Subthreshold Op Amp Design Based on the Conventional Cascode Stage ». BYU ScholarsArchive, 2013. https://scholarsarchive.byu.edu/etd/3611.

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Op amps are among the most-used components in electronic design. Their performance is important and is often measured in terms of gain, bandwidth, power consumption, and chip area. Although BJT amplifiers can achieve high gains and bandwidths, they tend to consume a lot of power. CMOS amplifiers utilizing the strong inversion region alone use less power than BJT amplifiers, but generally have lower gains and bandwidths. When CMOS SPICE models were improved to accurately simulate all regions of inversion, researchers began to test the performance of amplifiers operating in the weak and moderate inversion regions. Previous work had dealt with exploring the parameters of composite cascode stages, including inversion coefficients. This thesis extends the work to include conventional cascode stages and presents an efficient method for exploring design parameters. A high-gain (137.7 dB), low power (4.347 µW) operational amplifier based on the conventional cascode stage is presented.
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Saini, Kanika. « Linearity Enhancement of High Power GaN HEMT Amplifier Circuits ». Diss., Virginia Tech, 2019. http://hdl.handle.net/10919/94361.

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Gallium Nitride (GaN) technology is capable of very high power levels but suffers from high non-linearity. With the advent of 5G technologies, high linearity is in greater demand due to complex modulation schemes and crowded RF (Radio Frequency) spectrum. Because of the non-linearity issue, GaN power amplifiers have to be operated at back-off input power levels. Operating at back-off reduces the efficiency of the power amplifier along-with the output power. This research presents a technique to linearize GaN amplifiers. The linearity can be improved by splitting a large device into multiple smaller devices and biasing them individually. This leads to the cancellation of the IMD3 (Third-order Intermodulation Distortion) components at the output of the FETs and hence higher linearity performance. This technique has been demonstrated in Silicon technology but has not been previously implemented in GaN. This research work presents for the first time the implementation of this technique in GaN Technology. By the application of this technique, improvement in IMD3 of 4 dBc has been shown for a 0.8-1.0 GHz PA (Power Amplifier), and 9.5 dBm in OIP3 (Third-order Intercept Point) for an S-Band GaN LNA, with linearity FOM (IP3/DC power) reaching up to 20. Large-signal simulation and analysis have been done to demonstrate linearity improvement for two parallel and four parallel FETs. A simulation methodology has been discussed in detail using commercial CAD software. A power sampler element is used to compute the IMD3 currents coming out of various FETs due to various bias currents. Simulation results show by biasing one device in Class AB and others in deep Class AB, IMD3 components of parallel FETs can be made out of phase of each other, leading to cancellation and improvement in linearity. Improvement up to 20 dBc in IMD3 has been reported through large-signal simulation when four parallel FETs with optimum bias were used. This technique has also been demonstrated in simulation for an X-Band MMIC PA from 8-10 GHz in GaN technology. Improvements up to 25-30 dBc were shown using the technique of biasing one device with Class AB and other with deep class AB/class B. The proposed amplifier achieves broadband linearization over the entire frequency compared to state-of-the-art PA's. The linearization technique demonstrated is simple, straight forward, and low cost to implement. No additional circuitry is needed. This technique finds its application in high dynamic range RF amplifier circuits for communications and sensing applications.
Doctor of Philosophy
Power amplifiers (PAs) and Low Noise Amplifiers (LNAs) form the front end of the Radio Frequency (RF) transceiver systems. With the advent of complex modulation schemes, it is becoming imperative to improve their linearity. Through this dissertation, we propose a technique for improving the linearity of amplifier circuits used for communication systems. Meanwhile, Gallium Nitride (GaN) is becoming a technology of choice for high-power amplifier circuits due to its higher power handling capability and higher breakdown voltage compared with Gallium Arsenide (GaAs), Silicon Germanium (SiGe) and Complementary Metal-Oxide-Semiconductor (CMOS) technologies. A circuit design technique of using multiple parallel GaN FETs is presented. In this technique, the multiple parallel FETs have independently controllable gate voltages. Compared to a large single FET, using multiple FETs and biasing them individually helps to improve the linearity through the cancellation of nonlinear distortion components. Experimental results show the highest linearity improvement compared with the other state-of-the-art linearization schemes. The technique demonstrated is the first time implementation in GaN technology. The technique is a simple and cost-effective solution for improving the linearity of the amplifier circuits. Applications include base station amplifiers, mobile handsets, radars, satellite communication, etc.
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Säll, Erik. « Design of a Low Power, High Performance Track-and-Hold Circuit in a 0.18µm CMOS Technology ». Thesis, Linköping University, Department of Electrical Engineering, 2002. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1353.

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This master thesis describes the design of a track-and-hold (T&H) circuit with 10bit resolution, 80MS/s and 30MHz bandwidth. It is designed in a 0.18µm CMOS process with a supply voltage of 1.8 Volt. The circuit is supposed to work together with a 10bit pipelined analog to digital converter.

A switched capacitor topology is used for the T&H circuit and the amplifier is a folded cascode OTA with regulated cascode. The switches used are of transmission gate type.

The thesis presents the design decisions, design phase and the theory needed to understand the design decisions and the considerations in the design phase.

The results are based on circuit level SPICE simulations in Cadence with foundry provided BSIM3 transistor models. They show that the circuit has 10bit resolution and 7.6mW power consumption, for the worst-case frequency of 30MHz. The requirements on the dynamic performance are all fulfilled, most of them with large margins.

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Waddel, Taylor Matt. « A Design Basis for Composite Cascode Stages Operating in the Subthreshold/Weak Inversion Regions ». BYU ScholarsArchive, 2012. https://scholarsarchive.byu.edu/etd/2934.

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Composite cascode stages have been used in operational amplifier designs to achieve ultra-high gain at very low power. The flexibility and simplicity of the stage makes it an appealing choice for low power op-amp designs. Op-amp design using the composite cascode stage is often made more difficult through the lack of a design process. A design process to aid in the selection of the MOSFET dimensions is provided in this thesis. This process includes a table-based method for selection of the widths and lengths of the MOSFETs used in the composite cascode stage. Equations are also derived for the gain, bandwidth, and noise of the composite cascode stage with each of the devices operating in the various regions of inversion.
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Ciarkowski, Timothy A. « Low Impurity Content GaN Prepared via OMVPE for Use in Power Electronic Devices : Connection Between Growth Rate, Ammonia Flow, and Impurity Incorporation ». Diss., Virginia Tech, 2019. http://hdl.handle.net/10919/94551.

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GaN has the potential to revolutionize the high power electronics industry, enabling high voltage applications and better power conversion efficiency due to its intrinsic material properties and newly available high purity bulk substrates. However, unintentional impurity incorporation needs to be reduced. This reduction can be accomplished by reducing the source of contamination and exploration of extreme growth conditions which reduce the incorporation of these contaminants. Newly available bulk substrates with low threading dislocations allow for better study of material properties, as opposed to material whose properties are dominated by structural and chemical defects. In addition, very thick films can be grown without cracking due to exact lattice and thermal expansion coefficient match. Through chemical and electrical measurements, this work aims to find growth conditions which reduces contamination without a severe impact on growth rate, which is an important factor from an industry standpoint. The proposed thicknesses of these devices are on the order of one hundred microns and requires tight control of the intentional dopants.
Doctor of Philosophy
GaN is a compound semiconductor which has the potential to revolutionize the high power electronics industry, enabling new applications and energy savings due to its inherent material properties. However, material quality and purity requires improvement. This improvement can be accomplished by reducing contamination and growing under extreme conditions. Newly available bulk substrates with low defects allow for better study of material properties. In addition, very thick films can be grown without cracking on these substrates due to exact lattice and thermal expansion coefficient match. Through chemical and electrical measurements, this work aims to find optimal growth conditions for high purity GaN without a severe impact on growth rate, which is an important factor from an industry standpoint. The proposed thicknesses of these devices are on the order of one hundred microns and requires tight control of impurities.
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Hasegawa, Naoki. « Integral Study of GaN Amplifiers and Antenna Technique for High Power Microwave Transmission ». Kyoto University, 2018. http://hdl.handle.net/2433/232041.

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Livres sur le sujet "HIGH GAIN LOW POWER"

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Ahuja, Sumit, Avinash Lakshminarayana et Sandeep Kumar Shukla. Low Power Design with High-Level Power Estimation and Power-Aware Synthesis. New York, NY : Springer New York, 2012. http://dx.doi.org/10.1007/978-1-4614-0872-7.

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Avinash, Lakshminarayana, et Shukla Sandeep K, dir. Low power design with high-level power estimation and power-aware synthesis. New York : Springer, 2012.

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service), SpringerLink (Online, dir. High-efficient low-cost photovoltaics : Recent developments. Berlin : Springer, 2009.

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Zjajo, Amir, et José Pineda de Gyvez. Low-Power High-Resolution Analog to Digital Converters. Dordrecht : Springer Netherlands, 2011. http://dx.doi.org/10.1007/978-90-481-9725-5.

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Yoo, Hoi-Jun. Low-power NoC for high-performance SoC design. Boca Raton, Fl : Taylor & Francis, 2008.

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Yoo, Hoi-Jun. Low-power NoC for high-performace SoC design. Boca Raton, Fl : Taylor & Francis, 2008.

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Yoo, Hoi-Jun. Low-Power NoC for High-Performance SoC Design. London : Taylor and Francis, 2008.

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Wilhelm, Schmid. High on low : Harnessing the power of unhappiness. New York : Upper West Side Philosophers, Inc., 2014.

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Kiameh, Philip. Power generation handbook : Fundamentals of low-emission, high-efficiency power plant operation. 2e éd. New York : McGraw-Hill, 2012.

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Meinerzhagen, Pascal, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg et Alexander Fish. Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip. Cham : Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-60402-2.

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Chapitres de livres sur le sujet "HIGH GAIN LOW POWER"

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Astolfi, Daniele, et Lorenzo Marconi. « Low-Power High-Gain Observers ». Dans Encyclopedia of Systems and Control, 1–8. London : Springer London, 2019. http://dx.doi.org/10.1007/978-1-4471-5102-9_100070-1.

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Astolfi, Daniele, et Lorenzo Marconi. « Low-Power High-Gain Observers ». Dans Encyclopedia of Systems and Control, 1158–65. Cham : Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-44184-5_100070.

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Verma, Vivek, et Chetan D. Parikh. « A Low-Power Wideband High Dynamic Range Single-Stage Variable Gain Amplifier ». Dans Communications in Computer and Information Science, 19–25. Berlin, Heidelberg : Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-42024-5_3.

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Lee, Hyung Seok, Martin Domeij, C. M. Zetterling et Mikael Östling. « 4H-SiC Power BJTs with High Current Gain and Low On-Resistance ». Dans Materials Science Forum, 767–70. Stafa : Trans Tech Publications Ltd., 2007. http://dx.doi.org/10.4028/0-87849-442-1.767.

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Omari, Fouad, Boutaina Benhmimou, Niamat Hussain, Rachid Ahl Laamara, Sandeep Kumar Arora, Josep M. Guerrero et Mohamed El Bakkali. « UM5 of Rabat to Deep Space : Ultra-Wide Band and High Gain Only-Metal Fabry–Perot Antenna for Interplanetary CubeSats in IoT Infrastructure ». Dans Low Power Architectures for IoT Applications, 153–64. Singapore : Springer Nature Singapore, 2023. http://dx.doi.org/10.1007/978-981-99-0639-0_8.

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Arul Murugan, C., B. Banuselvasaraswathy et K. Gayathree. « High-Voltage Gain CMOS Charge Pump at Subthreshold Operation Regime for Low Power Applications ». Dans Lecture Notes in Networks and Systems, 417–26. Singapore : Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-13-3765-9_44.

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Singh, Karandeep, Vishal Mehta et Mandeep Singh. « Physical Design of Two Stage Ultra Low Power, High Gain Cmos OP-AMP for Portable Device Applications ». Dans Communications in Computer and Information Science, 730–39. Berlin, Heidelberg : Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-36321-4_68.

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Bansal, Gaurav, et Abhay Chaturvedi. « A 3.432 GHz Low-Power High-Gain Down-Conversion Gilbert Cell Mixer in 0.18 μm CMOS Technology for UWB Application ». Dans Intelligent Communication and Computational Technologies, 247–55. Singapore : Springer Singapore, 2017. http://dx.doi.org/10.1007/978-981-10-5523-2_23.

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Subramanyam, Avvaru, et R. V. S. Satyanarayana. « Improved Conversion Gain with High SFDR and Highly Linear RF Mixer Using Inductive Gate Biasing Technique for Low Power WAS and Radio LAN Applications ». Dans Lecture Notes in Electrical Engineering, 37–49. Singapore : Springer Nature Singapore, 2023. http://dx.doi.org/10.1007/978-981-19-8865-3_4.

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Jensen, C. « Pulsed Dye Laser Gain Analysis and Amplifier Design ». Dans High-Power Dye Lasers, 45–91. Berlin, Heidelberg : Springer Berlin Heidelberg, 1991. http://dx.doi.org/10.1007/978-3-540-47385-5_3.

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Actes de conférences sur le sujet "HIGH GAIN LOW POWER"

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Chauhan, Samiksha Singh, Akash Bahetra, Layak Singh Yadav et Aman Singh Chandan. « Ultra Low Power High Gain High Speed OTA ». Dans 2019 IEEE Conference on Information and Communication Technology (CICT). IEEE, 2019. http://dx.doi.org/10.1109/cict48419.2019.9066189.

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Shen, Jia'en, Yi Zhang et Yan Zhou. « A High-Gain Low-Power Low-Noise CMOS Transconductance Amplifier ». Dans 2023 IEEE 5th International Conference on Power, Intelligent Computing and Systems (ICPICS). IEEE, 2023. http://dx.doi.org/10.1109/icpics58376.2023.10235427.

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Kackar, Tripti, Shruti Suman et P. K. Ghosh. « Design of high gain low power operational amplifier ». Dans 2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT). IEEE, 2016. http://dx.doi.org/10.1109/iceeot.2016.7755310.

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Kumar, Ravi Ranjan, Supriya Sharma, Kulbhushan Sharma et Avinash Sharma. « Design of Low-Power High-Gain Transimpedance Amplifier ». Dans 2023 5th International Conference on Smart Systems and Inventive Technology (ICSSIT). IEEE, 2023. http://dx.doi.org/10.1109/icssit55814.2023.10060885.

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Verma, P. K., et Priyanka Jain. « A low power high gain low noise amplifier for wireless applications ». Dans 2015 Communication, Control and Intelligent Systems (CCIS). IEEE, 2015. http://dx.doi.org/10.1109/ccintels.2015.7437941.

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Hadipour, Kambiz, et Andreas Stelzer. « A low power high gain-bandwidth E-band LNA ». Dans 2016 11th European Microwave Integrated Circuits Conference (EuMIC). IEEE, 2016. http://dx.doi.org/10.1109/eumic.2016.7777492.

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Ahmed, Javeria, Matthieu Fruchard, Estelle Courtial et Youssoufi Toure. « Low-power High Gain Observers for Wake Flow Rebuild ». Dans 2020 59th IEEE Conference on Decision and Control (CDC). IEEE, 2020. http://dx.doi.org/10.1109/cdc42340.2020.9304507.

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Sarbishaei, H., T. Kahookar Toosi, E. Zhian Tabasy et R. Lotfi. « A high-gain high-speed low-power class AB operational amplifier ». Dans 48th Midwest Symposium on Circuits and Systems, 2005. IEEE, 2005. http://dx.doi.org/10.1109/mwscas.2005.1594091.

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Ma, Bob Yintat, Jonathan B. Hacker, Joshua Bergman, Peter Chen, Gerard Sullivan, Gabor Nagy et B. Brar. « Ultra-Low-Power Wideband High Gain InAs/AlSb HEMT Low-Noise Amplifiers ». Dans 2006 IEEE MTT-S International Microwave Symposium Digest. IEEE, 2006. http://dx.doi.org/10.1109/mwsym.2006.249931.

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Tzuk, Yitshak, Yaakov Glick, Michael M. Tilleman et Alon Kaufman. « Compact ultrahigh-gain multipass Nd:YAG amplifier with a low passive reflection phase-conjugate mirror ». Dans Optoelectronics and High-Power Lasers & Applications, sous la direction de Metin S. Mangir. SPIE, 1998. http://dx.doi.org/10.1117/12.308345.

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Rapports d'organisations sur le sujet "HIGH GAIN LOW POWER"

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Colson, W. Theory for high gain, high power free electron lasers. Office of Scientific and Technical Information (OSTI), janvier 1989. http://dx.doi.org/10.2172/5477588.

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2

Mazumder, Sudip K. Optically-gated Non-latched High Gain Power Device. Fort Belvoir, VA : Defense Technical Information Center, novembre 2008. http://dx.doi.org/10.21236/ada493165.

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3

Colson, W. Theoretical simulations of the synchrotron instability in high gain, high power free electron lasers. Office of Scientific and Technical Information (OSTI), janvier 1985. http://dx.doi.org/10.2172/6812860.

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4

Jewell, Jack L. Low-Resistance, High-Power-Efficiency, Vertical Cavity Microlasers. Fort Belvoir, VA : Defense Technical Information Center, septembre 1993. http://dx.doi.org/10.21236/ada291493.

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5

Yu, Chung. High Gain, Low Noise and Broadband Raman and Brillouin Fiber Optic Amplifiers, Channel Selectors and Switches. Fort Belvoir, VA : Defense Technical Information Center, septembre 1994. http://dx.doi.org/10.21236/ada301545.

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6

Poelker, M., et J. Hansknecht. A high power gain switched diode laser oscillator and amplifier for the CEBAF polarized electron injector. Office of Scientific and Technical Information (OSTI), décembre 1996. http://dx.doi.org/10.2172/563274.

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7

Fallahi, Mahmoud. Compact, High-Power, Low-Cost 295 nm DUV Laser by Harmonic Conversion of High Power VECSELs. Fort Belvoir, VA : Defense Technical Information Center, mai 2011. http://dx.doi.org/10.21236/ada546743.

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8

Lawrence, William R. Nanomechanical Devices for High Speed and Low-Power Electronics. Fort Belvoir, VA : Defense Technical Information Center, juin 2001. http://dx.doi.org/10.21236/ada394851.

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9

Parhi, Keshab K. High-Speed and Low-Power VLSI Error Control Coders. Fort Belvoir, VA : Defense Technical Information Center, septembre 2004. http://dx.doi.org/10.21236/ada426960.

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10

Battaglia, Vincent. Low-Cost High-Power Anodes for Electric Vehicle Batteries. Office of Scientific and Technical Information (OSTI), avril 2020. http://dx.doi.org/10.2172/1608347.

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