Littérature scientifique sur le sujet « Hardware Security Primitives »
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Articles de revues sur le sujet "Hardware Security Primitives"
Labrado, Carson, et Himanshu Thapliyal. « Hardware Security Primitives for Vehicles ». IEEE Consumer Electronics Magazine 8, no 6 (1 novembre 2019) : 99–103. http://dx.doi.org/10.1109/mce.2019.2941392.
Texte intégralHuffmire, Ted, Timothy Levin, Thuy Nguyen, Cynthia Irvine, Brett Brotherton, Gang Wang, Timothy Sherwood et Ryan Kastner. « Security Primitives for Reconfigurable Hardware-Based Systems ». ACM Transactions on Reconfigurable Technology and Systems 3, no 2 (mai 2010) : 1–35. http://dx.doi.org/10.1145/1754386.1754391.
Texte intégralGordon, Holden, Jack Edmonds, Soroor Ghandali, Wei Yan, Nima Karimian et Fatemeh Tehranipoor. « Flash-Based Security Primitives : Evolution, Challenges and Future Directions ». Cryptography 5, no 1 (4 février 2021) : 7. http://dx.doi.org/10.3390/cryptography5010007.
Texte intégralZhang, Zhiming, et Qiaoyan Yu. « Towards Energy-Efficient and Secure Computing Systems ». Journal of Low Power Electronics and Applications 8, no 4 (27 novembre 2018) : 48. http://dx.doi.org/10.3390/jlpea8040048.
Texte intégralBi, Yu, Kaveh Shamsi, Jiann-Shiun Yuan, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Xunzhao Yin, X. Sharon Hu, Michael Niemier et Yier Jin. « Emerging Technology-Based Design of Primitives for Hardware Security ». ACM Journal on Emerging Technologies in Computing Systems 13, no 1 (6 décembre 2016) : 1–19. http://dx.doi.org/10.1145/2816818.
Texte intégralDubrova, Elena. « Energy-efficient cryptographic primitives ». Facta universitatis - series : Electronics and Energetics 31, no 2 (2018) : 157–67. http://dx.doi.org/10.2298/fuee1802157d.
Texte intégralVenkataraman, Anusha, Eberechukwu Amadi et Chris Papadopoulos. « Molecular-Scale Hardware Encryption Using Tunable Self-Assembled Nanoelectronic Networks ». Micro 2, no 3 (21 juin 2022) : 361–68. http://dx.doi.org/10.3390/micro2030024.
Texte intégralTsantikidou, Kyriaki, et Nicolas Sklavos. « Hardware Limitations of Lightweight Cryptographic Designs for IoT in Healthcare ». Cryptography 6, no 3 (1 septembre 2022) : 45. http://dx.doi.org/10.3390/cryptography6030045.
Texte intégralTomecek, Jozef. « Hardware optimizations of stream cipher rabbit ». Tatra Mountains Mathematical Publications 50, no 1 (1 décembre 2011) : 87–101. http://dx.doi.org/10.2478/v10127-011-0039-8.
Texte intégralPreetisudha Meher, Lukram Dhanachandra Singh,. « Advancing Hardware Security : A Review and Novel Design of Configurable Arbiter PUF with DCM-Induced Metastability for Enhanced Resource Efficiency and Unpredictability ». Tuijin Jishu/Journal of Propulsion Technology 45, no 01 (16 février 2024) : 3804–16. http://dx.doi.org/10.52783/tjjpt.v45.i01.4934.
Texte intégralThèses sur le sujet "Hardware Security Primitives"
Basak, Abhishek. « INFRASTRUCTURE AND PRIMITIVES FOR HARDWARE SECURITY IN INTEGRATED CIRCUITS ». Case Western Reserve University School of Graduate Studies / OhioLINK, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=case1458787036.
Texte intégralMa, Yao. « Quantum Hardware Security and Near-term Applications ». Electronic Thesis or Diss., Sorbonne université, 2023. https://accesdistant.sorbonne-universite.fr/login?url=https://theses-intra.sorbonne-universite.fr/2023SORUS500.pdf.
Texte intégralHardware security primitives are hardware-based fundamental components and mechanisms used to enhance the security of modern computing systems in general. These primitives provide building blocks for implementing security features and safeguarding against threats to ensure integrity, confidentiality, and availability of information and resources. With the high-speed development of quantum computation and information processing, a huge potential is shown in constructing hardware security primitives with quantum mechanical systems. Meanwhile, addressing potential vulnerabilities from the hardware perspective is becoming increasingly important to ensure the security properties of quantum applications. The thesis focuses on practical hardware security primitives in quantum analogue, which refer to designing and implementing hardware-based security features with quantum mechanical systems against various threats and attacks. Our research follows two questions: How can quantum mechanical systems enhance the security of existing hardware security primitives? And how can hardware security primitives protect quantum computing systems? We give the answers by studying two different types of hardware security primitives with quantum mechanical systems from constructions to applications: Physical Unclonable Function (PUF) and Trusted Execution Environments (TEE). We first propose classical-quantum hybrid constructions of PUFs called HPUF and HLPUF. When PUFs exploit physical properties unique to each individual hardware device to generate device-specific keys or identifiers, our constructions incorporate quantum information processing technologies and implement quantum-secure authentication and secure communication protocols with reusable quantum keys. Secondly, inspired by TEEs that achieve isolation properties by hardware mechanism, we propose the QEnclave construction with quantum mechanical systems. The idea is to provide an isolated and secure execution environment within a larger quantum computing system by utilising secure enclaves/processors to protect sensitive operations from unauthorized access or tampering with minimal trust assumptions. It results in an operationally simple enough QEnclave construction with performing rotations on single qubits. We show that QEnclave enables delegated blind quantum computation on the cloud server with a remote classical user under the security definitions
Sabt, Mohamed. « Outsmarting smartphones : trust based on provable security and hardware primitives in smartphones architectures ». Thesis, Compiègne, 2016. http://www.theses.fr/2016COMP2320.
Texte intégralThe landscape of mobile devices has been changed with the introduction of smartphones. Sincetheir advent, smartphones have become almost vital in the modern world. This has spurred many service providers to propose access to their services via mobile applications. Despite such big success, the use of smartphones for sensitive applications has not become widely popular. The reason behind this is that users, being increasingly aware about security, do not trust their smartphones to protect sensitive applications from attackers. The goal of this thesis is to strengthen users trust in their devices. We cover this trust problem with two complementary approaches: provable security and hardware primitives. In the first part, our goal is to demonstrate the limits of the existing technologies in smartphones architectures. To this end, we analyze two widely deployed systems in which careful design was applied in order to enforce their security guarantee: the Android KeyStore, which is the component shielding users cryptographic keys in Android smartphones, and the family of Secure Channel Protocols (SCPs) defined by the GlobalPlatform consortium. Our study relies on the paradigm of provable security. Despite being perceived as rather theoretical and abstract, we show that this tool can be handily used for real-world systems to find security vulnerabilities. This shows the important role that can play provable security for trust by being able to formally prove the absence of security flaws or to identify them if they exist. The second part focuses on complex systems that cannot cost-effectively be formally verified. We begin by investigating the dual-execution-environment approach. Then, we consider the case when this approach is built upon some particular hardware primitives, namely the ARM TrustZone, to construct the so-called Trusted Execution Environment (TEE). Finally, we explore two solutions addressing some of the TEE limitations. First, we propose a new TEE architecture that protects its sensitive data even when the secure kernel gets compromised. This relieves service providers of fully trusting the TEE issuer. Second, we provide a solution in which TEE is used not only for execution protection, but also to guarantee more elaborated security properties (i.e. self-protection and self-healing) to a complex software system like an OS kernel
Ouattara, Frédéric. « Primitives de sécurité à base de mémoires magnétiques ». Thesis, Montpellier, 2020. http://www.theses.fr/2020MONTS072.
Texte intégralMagnetic memories (MRAM) are one of the emerging non-volatile memory technologies that have experienced rapid development over the past decade. One of the advantages of this technology lies in the varied fields of application in which it can be used. In addition to its primary function of storing information, MRAM is nowadays used in applications such as sensors, RF receivers and hardware security. In this thesis, we are interested in the use of MRAMs in the design of elementary hardware security primitives. Initially, an exploration in the design of TRNG (True Random Number Generator) based on STT-MRAM (Spin Transfert Torque MRAM) type memories was carried out with the aim of producing a demonstrator and proving its effectiveness for secure applications. Random extraction methods in STT and TAS (Thermally Assisted Switching) memories are presented. We have thus evaluated these magnetic memories within the framework of TRNGs but also for the generation of PUFs (Physically Unclonable Functions) on physical devices
Wild, Alexander [Verfasser], Tim [Gutachter] Güneysu et Amir [Gutachter] Moradi. « Structure-aware design of security primitives on reconfigurable hardware / Alexander Wild ; Gutachter : Tim Güneysu, Amir Moradi ; Fakultät für Elektrotechnik und Informationstechnik ». Bochum : Ruhr-Universität Bochum, 2018. http://d-nb.info/1152077902/34.
Texte intégralJuliato, Marcio. « Fault Tolerant Cryptographic Primitives for Space Applications ». Thesis, 2011. http://hdl.handle.net/10012/5876.
Texte intégralLivres sur le sujet "Hardware Security Primitives"
Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha et Farimah Farahmandi. Hardware Security Primitives. Cham : Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-19185-5.
Texte intégralPundir, Nitin, Nidish Vashishta, Mark Tehranipoor et Farimah Farahmandi. Hardware Security Primitives. Springer International Publishing AG, 2022.
Trouver le texte intégralChapitres de livres sur le sujet "Hardware Security Primitives"
Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha et Farimah Farahmandi. « Analog Security ». Dans Hardware Security Primitives, 245–60. Cham : Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_14.
Texte intégralTehranipoor, Mark, Nitin Pundir, Nidish Vashistha et Farimah Farahmandi. « Intrinsic Racetrack PUF ». Dans Hardware Security Primitives, 1–16. Cham : Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_1.
Texte intégralTehranipoor, Mark, Nitin Pundir, Nidish Vashistha et Farimah Farahmandi. « Fault Injection Resistant Cryptographic Hardware ». Dans Hardware Security Primitives, 333–46. Cham : Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_19.
Texte intégralTehranipoor, Mark, Nitin Pundir, Nidish Vashistha et Farimah Farahmandi. « Hybrid Extrinsic Radio Frequency PUF ». Dans Hardware Security Primitives, 81–95. Cham : Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_6.
Texte intégralTehranipoor, Mark, Nitin Pundir, Nidish Vashistha et Farimah Farahmandi. « Tamper Detection ». Dans Hardware Security Primitives, 261–79. Cham : Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_15.
Texte intégralTehranipoor, Mark, Nitin Pundir, Nidish Vashistha et Farimah Farahmandi. « Side-Channel Protection in Cryptographic Hardware ». Dans Hardware Security Primitives, 319–32. Cham : Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_18.
Texte intégralTehranipoor, Mark, Nitin Pundir, Nidish Vashistha et Farimah Farahmandi. « Direct Intrinsic Characterization PUF ». Dans Hardware Security Primitives, 33–47. Cham : Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_3.
Texte intégralTehranipoor, Mark, Nitin Pundir, Nidish Vashistha et Farimah Farahmandi. « Lightweight Cryptography ». Dans Hardware Security Primitives, 213–27. Cham : Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_12.
Texte intégralTehranipoor, Mark, Nitin Pundir, Nidish Vashistha et Farimah Farahmandi. « Package-Level Counterfeit Detection and Avoidance ». Dans Hardware Security Primitives, 301–17. Cham : Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_17.
Texte intégralTehranipoor, Mark, Nitin Pundir, Nidish Vashistha et Farimah Farahmandi. « Virtual Proof of Reality ». Dans Hardware Security Primitives, 229–43. Cham : Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_13.
Texte intégralActes de conférences sur le sujet "Hardware Security Primitives"
Du, Nan, Mahdi Kiani, Xianyue Zhao, Danilo Burger, Oliver G. Schmidt, Ramona Ecke, Stefan E. Schulz, Heidemarie Schmidt et Ilia Polian. « Electroforming-free Memristors for Hardware Security Primitives ». Dans 2019 IEEE 4th International Verification and Security Workshop (IVSW). IEEE, 2019. http://dx.doi.org/10.1109/ivsw.2019.8854394.
Texte intégralRose, Garrett S., Mesbah Uddin et Md Badruddoja Majumder. « A Designer's Rationale for Nanoelectronic Hardware Security Primitives ». Dans 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE, 2016. http://dx.doi.org/10.1109/isvlsi.2016.114.
Texte intégralSingh, Simranjeet, Furqan Zahoor, Gokul Rajendran, Sachin Patkar, Anupam Chattopadhyay et Farhad Merchant. « Hardware Security Primitives Using Passive RRAM Crossbar Array ». Dans ASPDAC '23 : 28th Asia and South Pacific Design Automation Conference. New York, NY, USA : ACM, 2023. http://dx.doi.org/10.1145/3566097.3568348.
Texte intégralPugazhenthi, Anugayathiri, Nima Karimian et Fatemeh Tehranipoor. « DLA-PUF : deep learning attacks on hardware security primitives ». Dans Autonomous Systems : Sensors, Processing and Security for Vehicles & Infrastructure 2019, sous la direction de Michael C. Dudzik et Jennifer C. Ricklin. SPIE, 2019. http://dx.doi.org/10.1117/12.2519257.
Texte intégralXu, Xiaolin, Vikram Suresh, Raghavan Kumar et Wayne Burleson. « Post-Silicon Validation and Calibration of Hardware Security Primitives ». Dans 2014 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE, 2014. http://dx.doi.org/10.1109/isvlsi.2014.80.
Texte intégralAnandakumar, N. Nalla, Somitra Kumar Sanadhya et Mohammad S. Hashmi. « Design, Implementation and Analysis of Efficient Hardware-Based Security Primitives ». Dans 2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC). IEEE, 2020. http://dx.doi.org/10.1109/vlsi-soc46417.2020.9344097.
Texte intégralAramoon, Omid, Gang Qu et Aijiao Cui. « Building Hardware Security Primitives Using Scan-based Design-for-Testability ». Dans 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 2022. http://dx.doi.org/10.1109/mwscas54063.2022.9859460.
Texte intégralRajesh, E., et Udit Sapra. « Design, build, and analyse hardware-based security primitives that work well ». Dans 2022 International Interdisciplinary Humanitarian Conference for Sustainability (IIHC). IEEE, 2022. http://dx.doi.org/10.1109/iihc55949.2022.10060075.
Texte intégralThapliyal, Himanshu, et S. Dinesh Kumar. « Energy-recovery based hardware security primitives for low-power embedded devices ». Dans 2018 IEEE International Conference on Consumer Electronics (ICCE). IEEE, 2018. http://dx.doi.org/10.1109/icce.2018.8326326.
Texte intégralShrivastava, Ayush, Pai-Yu Chen, Yu Cao, Shimeng Yu et Chaitali Chakrabarti. « Design of a reliable RRAM-based PUF for compact hardware security primitives ». Dans 2016 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2016. http://dx.doi.org/10.1109/iscas.2016.7539050.
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