Littérature scientifique sur le sujet « Digital-Based analog processing »
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Articles de revues sur le sujet "Digital-Based analog processing"
Sharma, Sushma, Hitesh Kumar et Charul Thareja. « Digital Signal Processing Over Analog Signal Processing ». Journal of Advance Research in Electrical & ; Electronics Engineering (ISSN : 2208-2395) 1, no 2 (28 février 2014) : 01–02. http://dx.doi.org/10.53555/nneee.v1i2.255.
Texte intégralNasrulloh, Mohammad Dicky. « Designing a Digital Filter Based Crossover Audio System Using STM32L4 ». Jurnal Jartel : Jurnal Jaringan Telekomunikasi 9, no 4 (25 décembre 2019) : 13–18. http://dx.doi.org/10.33795/jartel.v9i4.141.
Texte intégralReshetnikova, I. V., S. V. Sokolov, A. A. Manin, M. V. Polyakova et O. I. Sokolova. « Optical digital-to-analog converter for N-digit logic-based processing circuits ». Journal of Physics : Conference Series 2131, no 2 (1 décembre 2021) : 022129. http://dx.doi.org/10.1088/1742-6596/2131/2/022129.
Texte intégralCai, J., et G. W. Taylor. « An optoelectronic thyristor-based analog-to-digital converter for parallel processing ». Applied Physics Letters 73, no 16 (19 octobre 1998) : 2372–74. http://dx.doi.org/10.1063/1.122464.
Texte intégralMaruta, Akihiro, et Sho-ichiro Oda. « Optical Signal Processing Based on All-Optical Analog-to-Digital Conversion ». Optics and Photonics News 19, no 4 (1 avril 2008) : 30. http://dx.doi.org/10.1364/opn.19.4.000030.
Texte intégralSemenov, V. K. « Digital to analog conversion based on processing of the SFQ pulses ». IEEE Transactions on Applied Superconductivity 3, no 1 (mars 1993) : 2637–40. http://dx.doi.org/10.1109/77.233969.
Texte intégralN. Ezema, Chukwuedozie, Chukwuebuka B. Umezinwa et Ernest O. Nonum. « Microcontroller-Based Optical Displacement Weighing Scale ». International Journal of Advance Research and Innovation 4, no 3 (2016) : 27–33. http://dx.doi.org/10.51976/ijari.431606.
Texte intégralRajabalipanah, Hamid, Ali Abdolali, Shahid Iqbal, Lei Zhang et Tie Jun Cui. « Analog signal processing through space-time digital metasurfaces ». Nanophotonics 10, no 6 (29 mars 2021) : 1753–64. http://dx.doi.org/10.1515/nanoph-2021-0006.
Texte intégralWu, Ling Fan, Li Jun Yun, Jun Sheng Shi, Kun Wang et Zhi Hui Deng. « Design and Implementation of the HD Video Signal Converter Based on FPGA ». Advanced Engineering Forum 6-7 (septembre 2012) : 571–75. http://dx.doi.org/10.4028/www.scientific.net/aef.6-7.571.
Texte intégralWang, Li, Wenli Chen, Kai Chen, Renjun He et Wenjian Zhou. « The Research on the Signal Generation Method and Digital Pre-Processing Based on Time-Interleaved Digital-to-Analog Converter for Analog-to-Digital Converter Testing ». Applied Sciences 12, no 3 (7 février 2022) : 1704. http://dx.doi.org/10.3390/app12031704.
Texte intégralThèses sur le sujet "Digital-Based analog processing"
Bair, Shyh-Shyong. « A high speed microprocessor-based data acquisition system ». Ohio : Ohio University, 1985. http://www.ohiolink.edu/etd/view.cgi?ohiou1183748292.
Texte intégralSong, Tae Joong. « A fully integrated SRAM-based CMOS arbitrary waveform generator for analog signal processing ». Diss., Georgia Institute of Technology, 2010. http://hdl.handle.net/1853/34760.
Texte intégralGoldberg, Jason M. « Signal processing for high resolution pulse width modulation based digital-to-analogue conversion ». Thesis, King's College London (University of London), 1992. https://kclpure.kcl.ac.uk/portal/en/theses/signal-processing-for-high-resolution-pulse-width-modulation-based-digitaltoanalogue-conversion(0eb09aa0-1c54-48c3-844f-25aaa98908bf).html.
Texte intégralChen, Liang-Jen, et 陳亮仁. « Amplifier-Based Analog-to-Digital Converters Using Time-Domain Signal Processing ». Thesis, 2015. http://ndltd.ncl.edu.tw/handle/65238306735329556773.
Texte intégral國立臺灣大學
電子工程學研究所
104
The amplifier-based analog-to-digital converter (ADCs), such as pipelined, cyclic, and two-step architecture, are a suitable candidate for sampling rates from a few mega samples per second (MSPS) up to 100MSPS or even above, and resolutions range from 8 bits to 16 bits. However, as CMOS technology continues to shrink, the decreased supply voltage would limit the swing of the ADC, and the reduced intrinsic gain of the transistors would make the conventional operational amplifier difficult to realize. Although the early proposed open-loop architectures with the analog/digital calibration can be implemented in an advanced CMOS process, the amplifier non-linearity issue would become more severe as CMOS technology continues to scale down. A sophisticated non-linear calibration would be required and complicates the design. In addition, as the voltage swing decreases, the resolution of the conventional voltage-domain ADCs are also limited as well. To solve the issue described above, a time-domain ADC (TADC) architecture is proposed in this thesis. Since the power consumption of the digital circuit decreases, and the resolution of a time-domain signal is improved with the technology scaling, the TADC becomes a candidate for the power efficient architecture in the advanced process. Also, since the time-domain signal range would not be limited by the decreased supply voltage, the non-linearity issue in the TADC architecture could be relieved. Two prototype ICs were designed during this research. In chapter 2, the first design is a 12-bit 3.4MS/s two-step cyclic TADC implemented in a 0.18um CMOS process. The proposed TADC uses a voltage-to-time converter (VTC) with a 12dB gain amplifier and the proposed time amplifier (TA) as residue amplifiers to achieve 12-bit resolution without high gain amplifiers. In addition, non-linear calibration, and the process variation tracking blocks are also not required. The noise analysis for each TADC building block is also presented in this chapter. To verify the noise analysis further, another TADC is fabricated with different devices sizes, in order to compare the measured signal-to-noise ratio (SNR) and signal-to-noise and distortion ratio (SNDR). In chapter 3, the second design is a 10-bit 40MS/s two-step TADC implemented in a 0.18um CMOS process. The second design is realized to improve the sampling rate of the first design, and also to eliminate the use of the amplifiers. Same as the first design, non-linear calibration, and the process variation tracking blocks are also not required. Since the TADC can operate without the non-linear calibration, the hardware complexity of the digital background calibration adopted in this work can be greatly reduced. Therefore, the calibration time of the TADC requires only 622 clock cycles, which is over 10 times less than prior voltage-domain digitally-calibrated ADCs.
Tomé, Pedro Mirassol. « Characterization, modeling and compensation of long-term memory effects in GAN HEMT based radiofrequency power amplifiers ». Doctoral thesis, 2020. http://hdl.handle.net/10773/30994.
Texte intégralOs transístores de alta mobilidade eletrónica de nitreto de gálio (GaN HEMTs) são considerados a tecnologia mais atrativa para a transmissão de sinais de radiofrequência de alta potência para comunicações móveis celulares e aplicações de radar. No entanto, apesar das suas notáveis capacidades de transmissão de potência, a utilização de amplificadores de potência (PAs) baseados em GaN HEMTs é frequentemente desconsiderada em favor de tecnologias alternativas baseadas em transístores de silício. Uma das principais razões disto acontecer é a existência pervasiva na tecnologia GaN HEMT de efeitos de memória lenta causados por fenómenos térmicos e de captura eletrónica. Apesar destes efeitos poderem ser compensados através de algoritmos sofisticados de predistorção digital, estes algoritmos não são adequados para transmissores modernos de células pequenas e interfaces massivas de múltipla entrada e múltipla saída devido à sua complexidade de implementação e extração de modelo, assim como a elevada potência necessária para a sua execução em tempo real. De forma a promover a utilização de PAs de alta densidade de potência e elevada eficiência baseados em GaN HEMTs em aplicações de comunicação e radar de nova geração, nesta tese propomos novos métodos de caracterização, modelação, e compensação de efeitos de memória lenta em PAs baseados em GaN HEMTs. Mais especificamente, nesta tese propomos um método de caracterização do comportamento dinâmico de autopolarização de PAs baseados em GaN HEMTs; vários modelos comportamentais de fenómenos de captura eletrónica e a sua implementação como circuitos eletrónicos analógicos para a previsão em tempo real da variação dinâmica da tensão de limiar de condução de GaN HEMTs; um método de compensação da instabilidade entre pulsos de PAs baseados em GaN HEMTs para aplicações de radar; e um esquema híbrido analógico/digital de linearização de PAs baseados em GaN HEMTs para comunicações de nova geração.
Programa Doutoral em Telecomunicações
Satyanarayana, J. V. « Efficient Design of Embedded Data Acquisition Systems Based on Smart Sampling ». Thesis, 2014. http://etd.iisc.ernet.in/2005/3518.
Texte intégralLivres sur le sujet "Digital-Based analog processing"
Lamarche, Paul-Hugo. Field-programmable analog array implemented using delta-sigma based digital signal processing. Ottawa : National Library of Canada, 2003.
Trouver le texte intégralSociety, IEEE Computer, dir. Tutorial DSP-based testing of analog and mixed-signal circuits. Washington, D.C : IEEE Computer Society Press, 1987.
Trouver le texte intégralRe-use based methodologies and tools in the design of analog and mixed-signal integrated circuits. Dordrecht : Springer, 2005.
Trouver le texte intégralChapitres de livres sur le sujet "Digital-Based analog processing"
Kehtarnavaz, Nasser, Shane Parris et Abhishek Sehgal. « Analog-to-Digital Signal Conversion ». Dans Smartphone-Based Real-Time Digital Signal Processing, 47–67. Cham : Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-031-02537-2_4.
Texte intégralKehtarnavaz, Nasser, Abhishek Sehgal, Shane Parris et Arian Azarang. « Analog-to-Digital Signal Conversion ». Dans Smartphone-Based Real-Time Digital Signal Processing, 55–84. Cham : Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-031-02543-3_4.
Texte intégralKehtarnavaz, Nasser, Abhishek Sehgal et Shane Parris. « Analog-to-Digital Signal Conversion ». Dans Smartphone-Based Real-Time Digital Signal Processing, 51–79. Cham : Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-031-02540-2_4.
Texte intégralKilani, Dima, Baker Mohammad, Mohammad Alhawari, Hani Saleh et Mohammed Ismail. « Ratioed Logic Comparator-Based Digital LDO Regulator ». Dans Analog Circuits and Signal Processing, 73–95. Cham : Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-37884-4_5.
Texte intégralMarkulic, Nereo, Kuba Raczkowski, Jan Craninckx et Piet Wambacq. « A Digital-to-Time-Converter-Based Subsampling PLL for Fractional Synthesis ». Dans Analog Circuits and Signal Processing, 23–56. Cham : Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-10958-5_2.
Texte intégralNishio, Kimihiro, et Taiki Yasuda. « Analog-Digital Circuit for Motion Detection Based on Vertebrate Retina and Its Application to Mobile Robot ». Dans Neural Information Processing, 506–13. Berlin, Heidelberg : Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-24965-5_57.
Texte intégralLagerlund, Terrence D. « Digital Signal Processing ». Dans Clinical Neurophysiology, 222–35. Oxford University Press, 2016. http://dx.doi.org/10.1093/med/9780190259631.003.0015.
Texte intégralMilic, Ljiljana. « Sampling Rate Converison by a Fractional Factor ». Dans Multirate Filtering for Digital Signal Processing, 171–205. IGI Global, 2009. http://dx.doi.org/10.4018/978-1-60566-178-0.ch006.
Texte intégralSheybani, Ehsan. « Real-Time Digital Signal Processing-Based Algorithm for Universal Software Radio Peripheral to Detect GPS Signal ». Dans Strategic Innovations and Interdisciplinary Perspectives in Telecommunications and Networking, 241–54. IGI Global, 2019. http://dx.doi.org/10.4018/978-1-5225-8188-8.ch013.
Texte intégralTeimoory, Mehri, Amirali Amirsoleimani, Arash Ahmadi et Majid Ahmadi. « Development of Compute-in-Memory Memristive Crossbar Architecture with Composite Memory Cells ». Dans Memristor - An Emerging Device for Post-Moore’s Computing and Applications. IntechOpen, 2021. http://dx.doi.org/10.5772/intechopen.99634.
Texte intégralActes de conférences sur le sujet "Digital-Based analog processing"
Shah, S. « A 200 MHz CMOS analogue-ROM based direct digital frequency synthesiser ». Dans IEE Seminar Analog Signal Processing. IEE, 2000. http://dx.doi.org/10.1049/ic:20000480.
Texte intégralMeng, Jiawei, Mario Miscuglio, Jonathan George, Aydin Babakhani et Volker J. Sorger. « PIC-based Binary-Weighting Parallel Digital-to-Analog Converter ». Dans Signal Processing in Photonic Communications. Washington, D.C. : OSA, 2021. http://dx.doi.org/10.1364/sppcom.2021.sptu4d.5.
Texte intégralFok, Mable P., Yue Tian, David Rosenbluth, Yanhua Deng et Paul R. Prucnal. « Optical hybrid analog-digital signal processing based on spike processing in neurons ». Dans SPIE Optical Engineering + Applications, sous la direction de Khan M. Iftekharuddin et Abdul Ahad Sami Awwal. SPIE, 2011. http://dx.doi.org/10.1117/12.895347.
Texte intégralNeuhaus, Peter, Nir Shlezinger, Meik Dorpinghaus, Yonina C. Eldar et Gerhard Fettweis. « Task-Based Analog-to-Digital Converters for Bandlimited Systems ». Dans 2021 29th European Signal Processing Conference (EUSIPCO). IEEE, 2021. http://dx.doi.org/10.23919/eusipco54536.2021.9616271.
Texte intégralNguyen, Nam-Trung. « Thermal Control for Droplet-Based Microfluidics ». Dans 2008 Second International Conference on Integration and Commercialization of Micro and Nanosystems. ASMEDC, 2008. http://dx.doi.org/10.1115/micronano2008-70277.
Texte intégralSanchez, Giovanny, Thomas Jacob Koickal, T. A. Athul Sripad, Luiz Carlos Gouveia, Alister Hamilton et Jordi Madrenas. « Spike-based analog-digital neuromorphic information processing system for sensor applications ». Dans 2013 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2013. http://dx.doi.org/10.1109/iscas.2013.6572173.
Texte intégralLiu, Xin, Yanming Xue et Huaxin Sun. « Analog Domain Self-Interference Cancellation Method Based on Digital Aided Processing ». Dans 2020 IEEE 9th Joint International Information Technology and Artificial Intelligence Conference (ITAIC). IEEE, 2020. http://dx.doi.org/10.1109/itaic49862.2020.9339032.
Texte intégralMaruta, Akihiro, et Sho-ichiro Oda. « optical Signial Processing based on All-Optical Analog-to-Digital Conversion ». Dans OFC/NFOEC 2007 - 2007 Conference on Optical Fiber Communication and the National Fiber Optic Engineers Conference. IEEE, 2007. http://dx.doi.org/10.1109/ofc.2007.4348683.
Texte intégralLi, Y., Y. Zhang et G. Eichmann. « An acousto-optic modulator-based analog-to-digital converter ». Dans OSA Annual Meeting. Washington, D.C. : Optica Publishing Group, 1990. http://dx.doi.org/10.1364/oam.1990.tuuu9.
Texte intégralShlezinger, Nir, Ruud J. G. van Sloun, Iris A. M. Huijben, Georgee Tsintsadze et Yonina C. Eldar. « Learning Task-Based Analog-to-Digital Conversion for MIMO Receivers ». Dans ICASSP 2020 - 2020 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP). IEEE, 2020. http://dx.doi.org/10.1109/icassp40776.2020.9053855.
Texte intégral