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Littérature scientifique sur le sujet « Difetti estesi »
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Articles de revues sur le sujet "Difetti estesi"
Valentini, V., A. Cassoni, V. Terenzi, M. Della Monaca, M. T. Fadda, O. Rajabtork Zadeh, I. Raponi, A. Anelli et G. Iannetti. « Our experience in the surgical management of craniofacial fibrous dysplasia : what has changed in the last 10 years ? » Acta Otorhinolaryngologica Italica 37, no 5 (octobre 2017) : 436–43. http://dx.doi.org/10.14639/0392-100x-1081.
Texte intégralDIACONU, Camelia C. « Obstructive sleep apnea syndrome : is it different in women ? » Romanian Journal of Medical Practice 11, no 3 (30 septembre 2016) : 243–46. http://dx.doi.org/10.37897/rjmp.2016.3.4.
Texte intégralvan der Hart, Onno. « Amnesia dissociativa e trauma : una prospettiva secondo la teoria della dissociazione strutturale ». RIVISTA SPERIMENTALE DI FRENIATRIA, no 2 (juillet 2012) : 121–35. http://dx.doi.org/10.3280/rsf2012-002007.
Texte intégralBattaglia, P., M. Turri-Zanoni, F. De Bernardi, P. Dehgani Mobaraki, A. Karligkiotis, F. Leone et P. Castelnuovo. « Septal flip flap per la ricostruzione del basicranio anteriore dopo resezione di tumori nasosinusali : risultati preliminari ». Acta Otorhinolaryngologica Italica 36, no 3 (mai 2016) : 194–98. http://dx.doi.org/10.14639/0392-100x-748.
Texte intégralThèses sur le sujet "Difetti estesi"
BARBISAN, LUCA. « Extended defects in heteroepitaxial structures on silicon by Molecular Dynamics simulations : applications to SiGe and cubic SiC ». Doctoral thesis, Università degli Studi di Milano-Bicocca, 2022. http://hdl.handle.net/10281/366130.
Texte intégralSilicon has dominated semiconductor history for almost half a century. Even if the first transistor was made using germanium and other semiconductors show better electronic properties in terms of higher mobility, higher saturation velocity, and larger energy gap. It is the material used to build almost the 97% of all semiconductor-based electronic de- vices. The reason is straightforward; it is the most economical technology to make inte- grated circuits. It has been possible to fabricate integrated circuits with constantly increasing number of transistors on a single chip. The first that analyzed this trend was Gordon Moore in 1965, and he suggested that the trend was due to a constant exercise in cost reduction. The manufacturing cost for a square millimeter of Si remained constant at about 1$ for many decades, while the number of transistors and other elements has grown exponentially with time. The number of transistors for units of area that can be placed on a semiconductor wafer depends on the capacity of the wafer to dissipate such thermal energy. Materials with elevated thermal conducibility and melting temperature, like silicon, are the ideal ones. The low leakage currents that can be achieved with Si oxide and Si nitrate (its native composite with air) and the elevated thermal conducibility allowed a transistor density higher than with other semiconduc- tors. Even if Si still dominates the main branch of semiconductor technology, there are areas where the low mobility, the low saturation velocity, and the indirect bandgap per- mitted other semiconductors to develop. Being the raw material cost much higher than Si one, some techniques have been developed to reduce such costs. A way to maintain the thermal advantage of a silicon substrate and reduce the raw material cost of semi- conductors that are not Si consists of using a thin semiconductor film grown on top of a thick Si substrate (hetero-epitaxy). Hetero-epitaxy guarantees lower costs maintaining a thermally efficient substrate, but on the other side implies that the semiconductor has to be grown on a substrate with a different lattice parameter. Today’s more diffused epitaxial technologies are the epi-grow of group III-V and II-VI alloys (especially for radio frequency amplification and laser technologies) and the epitaxy of group IV semiconductors like the SiC and SiGe alloys and the pure Ge. Group IV semiconductors have the non-negligible advantage of having cheaper fabrication costs than the formers. They, of course, guarantee better performances in terms of electronic properties than Si. The main obstacle in realizing such devices stems from the fact that the lattice mismatch induces the formation of detrimental defects during epitaxial growth. Such defects hinder the possibility of an industrial, extensive appli- cation of group IV semiconductors other than Si. Typically, the generated defects are grain boundaries, misfit dislocations, stacking faults, and other extended defects. A strong academic interest exists in the comprehension of defects in epitaxial systems. In particular, two systems present at the same time exciting application perspectives and hard theoretical modeling challenges: silicon germanium and cubic silicon carbide. They indeed are attractive semiconductors that can be easily integrated into the actual silicon-based architecture. Their epitaxy on Si has been studied for years, but defect densities are still too high in those systems. In this Thesis, we will deal with the problem of modeling extended defects evolution via molecular dynamics simulations. We will tackle some of the open problems about defect evolution in both the materials under consideration. Our results provided enough information to shed light on the specific problems of the formation and evolution of multiple stacking faults in cubic SiC and the formation of ordered arrays of Lomer dislocation in Ge grown on Si.