Littérature scientifique sur le sujet « Circuit non-linearity »

Non-linear distortion of signals is a serious problem in computing-in-memory SRAM (CIM-SRAM) circuits in current mode. This problem greatly limits the performance of calculations and directly affects the computing power of the CIM-SRAM. In this study, the causes of non-linearity and inconsistency were investigated. Based on detailed analyses, we proposed a high-precision, fully dynamic range IV (HFIV) conversion circuit. The HFIV circuit was added to each bit line (BL) for voltage clamping and proportionally mirroring the read current. We applied the structure to numerous prior studies and evaluated them using the 55 nm complementary metal-oxide semiconductor process. The results showed the proposed HFIV circuit could increase the CIM-SRAM’s calculation linearity to 99.92% (8~32 SRAM bit-cells) and 99.8% (32~64 SRAM bit-cells) with a 1.2 V supply.

In this brief, we propose a 60 GS/s high-linearity two-stage 8 × 8 time-interleaved track-and-hold circuit where it is possible to tune the static non-linearities of the second-stage buffer by applying a proper bias voltage. This allows us to maximize the static linearity of the buffer or introduce effects that counterbalance the non-linearities of other blocks of the analog front-end. To validate the proposed circuit, a prototype in TSMC 5 nm technology is designed and a linearity calibration loop is proposed for a Pulse Amplitude Modulation SerDes receiver. For the analog buffer, circuit-level simulations are performed in Cadence Virtuoso, while the calibration loop is simulated in MATLAB. The optimal bias voltage value can be found by modeling the track-and-hold linearity using a Taylor series and implementing the linearity calibration loop in MATLAB. By applying this result to the circuit-level simulation, we obtain a total harmonic distortion of over 50 dB, which matches with the maximum value achievable across the complete bias voltage control range. Lastly, the linearity of the system is also verified using a PAM-8 pseudorandom stream signal.

The tunneling magnetoresistance micro-sensors (TMR) developed by magnetic multilayer material has many advantages, such as high sensitivity, high frequency response, and good reliability. It is widely used in military and civil fields. This work presents a high-performance interface circuit for TMR sensors. Because of the nonlinearity of signal conversion between sensitive structure and interface circuit in feedback loop and forward path, large harmonic distortion occurs in output signal spectrum, which greatly leads to the reduction of SNDR (signal noise distortion rate). In this paper, we analyzed the main source of harmonic distortion in closed-loop detection circuit and establish an accurate harmonic distortion model in TMR micro-sensors system. Some factors are considered, including non-linear gain of operational amplifier unit, effective gain bandwidth, conversion speed, nonlinearity of analog transmission gate, and nonlinearity of polycrystalline capacitance in high-order sigma-delta system. We optimized the CMOS switch and first-stage integrator in the switched-capacitor circuit. The harmonic distortion parameter is optimally designed in the TMR sensors system, aiming at the mismatch of misalignment of front-end system, non-linearity of quantizer, non-linearity of capacitor, and non-linearity of analog switch. The digital output is attained by the interface circuit based on a low-noise front-end interface circuit and a third-order sigma-delta modulator. The digital interface circuit is implemented by 0.35μm CMOS (complementary metal oxide semiconductor) technology. The high-performance digital TMR sensors system is implemented by double chip integration and the active interface circuit area is about 3.2 × 2 mm. The TMR sensors system consumes 20 mW at a single 5 V supply voltage. The TMR sensors system can achieve a linearity of 0.3% at full scale range (±105 nT) and a resolution of 0.25 nT/Hz1/2(@1Hz).

A simple procedure for approximating the input-output characteristic of non-linear electronic circuits is presented. Using this procedure, closed-form analytical expressions, in terms of the ordinary Bessel functions, are obtained for the output spectra of a non-linear electronic circuit resulting from a multisinusoidal input. Using these expressions, the non-linear performance of three basic MOSFET transconductance amplifiers is considered in an attempt to determine the transistor parameters for best linearity.

For the first time, the capacitive non-linearity is considered and calibrated. Based on the traditional bootstrapped switch, a cell is added to eliminate the first-order capacitive non-linearity. The measurement shows that the sampling and holding circuit using the improved bootstrapped switch can achieve a SFDR of 86dB with respect to 76dB for the traditional one.

Carbon nanotube field emission display (CNT-FED) is one of the most significant subjects due to its unique qualities and perfect performance. But there are still some problems in FED, for example, the modulation of each pixel unit of field emission display device is discrete, and the traditional voltage pulse-width modulation driving mode cannot solve luminance non-uniformity and non-linearity of FED. So a novel driving circuit based on cathode current source is proposed. The current driving circuit can be fabricated on Si substrate in advance, and then carbon nanotube is grown at room temperature, carbon nanotube and constant current source circuits are integrated on the same Si substrate. Current source circuit and cathode emission part are integrated together, which not only can solve the FED luminance problem, but also can meet FED thin design.

The application of Quantum Computing (QC) to fluid dynamics simulation has developed into a dynamic research topic in recent years. With many flow problems of scientific and engineering interest requiring large computational resources, the potential of QC to speed-up simulations and facilitate more detailed modeling forms the main motivation for this growing research interest. Despite notable progress, many important challenges to creating quantum algorithms for fluid modeling remain. The key challenge of non-linearity of the governing equations in fluid modeling is investigated here in the context of lattice-based modeling of fluids. Quantum circuits for the D1Q3 (one-dimensional, three discrete velocities) Lattice Boltzmann model are detailed along with design trade-offs involving circuit width and depth. Then, the design is extended to a one-dimensional lattice model for the non-linear Burgers equation. To facilitate the evaluation of non-linear terms, the presented quantum circuits employ quantum computational basis encoding. The second part of this work introduces a novel, modular quantum-circuit implementation for non-linear terms in multi-dimensional lattice models. In particular, the evaluation of kinetic energy in two-dimensional models is detailed as the first step toward quantum circuits for the collision term of two- and three-dimensional Lattice Boltzmann methods. The quantum circuit analysis shows that with O(100) fault-tolerant qubits, meaningful proof-of-concept experiments could be performed in the near future.

Abstrak - rangkaian R-2R ladder digital-to-analog converter (DAC) adalah rangkaian elektronika sederhanayang dapat dibuat dengan dua nilai resistor serta banyak digunakan untuk proses konversi nilai digital keanalog secara langsung. Pemilihan nilai serta penempatan resistor pada rangkaian ini sangat berpengaruhpada linieritas sinyal hasil konversi. Penelitian ini bertujuan untuk memberikan solusi dalam merancangrangkaian R-2R ladder DAC dengan linieritas yang medekati optimal menggunakan komponen resistor yangada di pasaran. Dengan bantuan algoritma genetika, komponen resistor yang ada dapat dirangkai sedemikianrupa sehingga menghasilkan rangkaian DAC dengan nilai integral non-linearity (INL) yang mendekatioptimal. Hasil yang didapatkan dari simulasi rangkaian DAC dengan jumlah bit 6 sampai 12 menunjukkanbahwa algoritma genetika dapat digunakan untuk mengoptimalkan linieritas rangkaian R-2R ladder DACdengan INL hingga di bawah 0.5 LSB dalam waktu kurang dari 1.5 menit.Kata Kunci: algoritma genetika, R-2R ladder, digital-to-analog converter, integral non-linearityAbstract - R-2R ladder digital-to-analog converter (DAC) is a simple electronic circuit that can beimplemented with only two resistor values. It is used for converting digital values to analog voltagedirectly. The resistor selection and placement in this circuit have a significant effect on the DAClinearity. This research aims to provide solution in designing R-2R ladder DAC circuit with close-tooptimumlinearity using only resistors available on the market. With the help of genetic algorithm, theexisting resistors can be sequenced in such a way to produce a DAC circuit with close-to-optimumintegral non-linearity (INL). The results obtained from the simulation using 6 to 12 bits DAC circuitsshow that the genetic algorithm can be used to optimize the linearity of R-2R ladder DAC with INLless than 0.5 LSB in less than 1.5 minutes.Keywords: genetic algorithm, R-2R ladder, digital-to-analog converter, integral non-linearity

This work provides new designs of simple current-mode squaring and square-rooting circuits using multiple-output current controlled current conveyor transconductance amplifier (MO-CCCCTA) as an active building block. Since the proposed circuits need no other external components, they are capable of high-frequency operation and well fitted for IC fabrication. Furthermore, they are insensitive to ambient temperature and their gains can be controlled easily by adjusting the bias currents of MO-CCCCTA. Additionally, the effects of MO-CCCCTA non-idealities on the designed circuits have also been investigated and discussed. Simulation results generated through PSPICE software using TSMC 0.18 µm CMOS process parameters have been presented to justify the theoretical analysis. The static power consumption, bandwidth, and maximum linearity error in dc transfer characteristic measurement for the square-rooting circuit are found to be 0.17 mW, 445.63 MHz and 1.12 %, while for the squaring circuit they are 0.326 mW, 61.15 MHz and 2.38 %, respectively. The application of the reported circuits as a 2-input vector summation circuit has also been included to strengthen the design ideas. HIGHLIGHTS Simple structures of fully integrable current-mode squarers and square-rooters with low component count and lower power dissipation The circuits are insensitive to temperature drift and their gains can be controlled easily by adjusting the bias currents of MO-CCCCTA Bandwidth, static power dissipation, linearity error of square-rooter are 445.63 MHz, 0.17 mW & ≤ 1.12 %; and for the squarer 61.15 MHz, 0.326 mW & 2.38 %, respectively GRAPHICAL ABSTRACT

A scheme producing non-linearity frequency-modulated signal which can be updated on-line based on AD9858 is mentioned. A method to design NLFM signal using immediate data update is introduced. Circuit structure is designed. Major factor that impacting data is analyzed and its solution is presented. Experiments certify that this method can generate broadband and narrow pulse width non-linearity frequency-modulated signal, whose frequency spectrum can be updated on-line in real time.

Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2010.
Committee Chair: Cressler, John D.; Committee Member: Laskar, Joy; Committee Member: Shen, Shyh-Chiang. Part of the SMARTech Electronic Thesis and Dissertation Collection.

L'architecture conventionnelle utilisée par toutes les publications précédentes pour le récepteur de balayage de spectre est basée sur le CAN en BB, donc il a une consommation d'énergie élevée, une complexité plus élevée et souffre d'inadéquations de circuits et de non-linéarité. Dans ce travail, nous proposons d'utiliser un récepteur RF basé sur CAN delta-sigma en PB. Les CAN PB DS ajustables précédemment signalés implémentée de manière complexe. Nous présentons une implémentation efficace du CAN PB DS accordable. Un récepteur de détection de spectre, basé sur l'architecture frontale RF à faible consommation d'énergie proposée dans cette thèse, est également proposé. Le récepteur complet proposé ne souffre pas d'un déséquilibre 1/Q. Les résultats de simulation pour montrer l'impact de la non-linéarité du circuit sur les performances sont présentés. Une implémentation de circuit d'un backend numérique du système proposé est présentée. Cette implémentation comprend un mélangeur à conversion descendante efficace, un filtre de décimation, un bloc FFT et un module de détection d'énergie. L'implémentation a été validée à l'aide l'outil SignalTab. Des études, ne présentent que des résultats analytiques ou de simulation, visant à montrer l'impact du déséquilibre 1/Q sur les performances de détection du spectre ont déjà été publiées. Dans ce travail, nous présentons la première mesure matérielle du déséquilibre I/Q sur les performances de détection du spectre. Dans le domaine médical, nous présentons pour la première fois une étude de l'effet de l'exposition aux RF-EMF sur les nouveau-nés via une acquisition simultanée de signaux RF et de paramètres physiologiques
Spectrum sensing applications cover wide variety, such as efficient utilization of frequency spectrum, and in medical applications. The conventional architecture used by all the previous publications for spectrum sensing receiver is based on baseband ADC, hence it has high power consumption, higher complexity, and suffers from circuit mismatches and nonlinearity. In this work, we propose using an RF receiver based on bandpass delta-sigma ADC. It is much more convenient to have a tunable BP ΔΣ ADC to simplify the spectrum sweeping task. The previously reported tunable BP ΔΣ ADC’s are implementing tunability in a complex manner. We present an efficient implementation of tunable BP ΔΣ ADC with fixed ratio between the sampling frequency and center frequency. That fixed ratio further simplifies the implementation of the down conversion mixer and decimation filter which serve as the digital backend of the receiver. A spectrum sensing receiver, based on the power-efficient RF front end architecture proposed in this thesis, is also proposed. The proposed complete receiver does not suffer from I/Q imbalance that highly affect the spectrum sensing performance. Simulation results to show the circuit nonlinearity impact on the performance are presented. A circuit implementation of a digital backend of the proposed system is presented. This implementation comprises an efficient down conversion mixer, decimation filter, custom FFT block, and energy detection module. The implementation was validated on Altera FPGA using the on-chip logic analyzer via the SignalTab tool.Studies to show the impact of I/Q imbalance on spectrum sensing performance were previously published. Nevertheless, those publications presented only either analytical or simulation results. In this work, we present the first hardware measurement of the I/Q imbalance on spectrum sensing performance using a commercial SDR transceiver platform.In the medical field, we also present for the first time a study of the effect of RF-EMF exposure on neonates by performing a simultaneous acquisition of RF signals along with recording the physiological parameters of neonates. Using R-Studio, the stationarity of the signals to be correlated was checked, a transformation was performed on the non-stationary signals. Finally, cross correlation between the acquired RF signal (average of the whole spectrum or in a specific band) and each of the recorded physiological parameters did not show an observable impact of RF-EMF exposure on neonates

State-of-the-art SiGe BiCMOS technologies leverage the maturity of deep-submicron silicon CMOS processing with bandgap-engineered SiGe HBTs in a single platform that is suitable for a wide variety of high performance and highly-integrated applications (e.g., system-on-chip (SOC), system-in-package (SiP)). Due to their bandgap-engineered base, SiGe HBTs are also naturally suited for cryogenic electronics and have the potential to replace the costly de facto technologies of choice (e.g., Gallium-Arsenide (GaAs) and Indium-Phosphide (InP)) in many cryogenic applications such as radio astronomy. This work investigates the response of mixed-signal circuits (both RF and analog circuits) when operating in extreme environments, in particular, at cryogenic temperatures and in radiation-rich environments. The ultimate goal of this work is to attempt to fill the existing gap in knowledge on the cryogenic and radiation response (both single event transients (SETs) and total ionization dose (TID)) of specific RF and analog circuit blocks (i.e., RF switches and voltage references). The design approach for different RF switch topologies and voltage references circuits are presented. Standalone Field Effect Transistors (FET) and SiGe HBTs test structures were also characterized and the results are provided to aid in the analysis and understanding of the underlying mechanisms that impact the circuits' response. Radiation mitigation strategies to counterbalance the damaging effects are investigated. A comprehensive study on the impact of cryogenic temperatures on the RF linearity of SiGe HBTs fabricated in a new 4th-generation, 90 nm SiGe BiCMOS technology is also presented.

Gyroscopes are inertial sensors that measure the rate or angle of rotation. One of the most promising technologies for reaching a high-performance MEMS gyroscope has been development of the micro-hemispherical shell resonator. (μHSR) This thesis presents the electronic control and read-out interface that has been developed to turn the μHSR into a fully functional micro-hemispherical resonating gyroscope (μHRG) capable of measuring the rate of rotation. First, the μHSR was characterized, which both enabled the design of the interface and led to new insights into the linearity and feed-through characteristics of the μHSR. Then a detailed analysis of the rate mode interface including calculations and simulations was performed. This interface was then implemented on custom printed circuit boards for both the analog front-end and analog back-end, along with a custom on-board vacuum chamber and chassis to house the μHSR and interface electronics. Finally the performance of the rate mode gyroscope interface was characterized, showing a linear scale factor of 8.57 mv/deg/s, an angle random walk (ARW) of 34 deg/sqrt(hr) and a bias instability of 330 deg/hr.

Η πληθώρα των εφαρμογών που μπορεί να εξυπηρετήσει η τεχνολογία Υπερευρείας Ζώνης (UWB), από τα ασύρματα προσωπικά δίκτυα υψηλών ταχυτήτων, μέχρι τα ασύρματα δίκτυα αισθητήρων με δυνατότητες ακριβούς εντοπισμού θέσης, και τα ασύρματα δίκτυα ιατρικών αισθητήρων, έχει προκαλέσει έντονο ερευνητικό ενδιαφέρον γύρω από τις υλοποιήσεις UWB συστημάτων. Η ασυνήθιστα μεγάλη περιοχή συχνοτήτων που έχει ανατεθεί στο UWB, από τα 3.1-10.6 GHz, επιτρέπει την επίτευξη υψηλών ταχυτήτων με απλά σχήματα διαμόρφωσης, ωστόσο, λόγω της διαμοίρασης του φάσματος με τις υφιστάμενες τεχνολογίες ασύρματης δικτύωσης, οι UWB εκπομπές πρέπει να περιορίζονται σε ισχύ κάτω από το κατώφλι των -41.3 dBm/MHz, ικανοποιώντας πολύ αυστηρές μάσκες εκπομπής που εισάγουν έντονες προκλήσεις στη σχεδίαση των πομπών. Η υλοποίηση αναδιατάξιμων UWB πομπών σε σύγχρονες CMOS τεχνολογίες, με υψηλή φασματική ευελιξία, ταχύτητα και ποιότητα διαμόρφωσης, καθώς και με χαμηλή κατανάλωση, αποτέλεσε το αντικείμενο της συγκεκριμένης διατριβής. Υιοθετώντας την αρχιτεκτονική Multi-Band Impulse-Radio (MB-IR) σε συνδυασμό με την τεχνική Direct Sequence BPSK, η έρευνα προσανατολίστηκε προς την ανάπτυξη καινοτόμων μονάδων βασικής ζώνης, με στόχο την ενεργειακά αποδοτική αντιστροφή Γκαουσιανών μορφοποιημένων παλμών υψηλής ποιότητας φάσματος και διάρκειας μικρότερης ακόμα και από 1 nsec. Προς αυτή την κατεύθυνση, αναπτύχθηκε μια καινοτόμα γεννήτρια Γκαουσιανών παλμών με πολύ χαμηλούς πλευρικούς λοβούς στο φάσμα, τυπικά κάτω από -40 dB, ώστε να υποστηρίζονται οι αυστηρότερες μάσκες εκπομπής ή και μελλοντικές. Η σχεδίασης της προτεινόμενης γεννήτριας είχε ως κριτήριο την ευέλικτη ρύθμιση της διάρκειας των παραγόμενων παλμών, και αξιοποίησε τη χαρακτηριστική μεταφοράς τάσης ενός ωμικά φορτωμένου, ασύμμετρου CMOS αντιστροφέα. Η γεννήτρια βασίζεται κυρίως σε ψηφιακά κυκλώματα πολύ χαμηλής τάσης και, σε σύγκριση με τις υφιστάμενες υλοποιήσεις, παρουσιάζει σημαντικό προβάδισμα στον τομέα της ταχύτητας, καθώς και στο πλάτος εξόδου, η μεγάλη τιμή του οποίου χαλαρώνει σημαντικά τη σχεδίαση του RF front end. Η γεννήτρια μελετήθηκε διεξοδικά, διεξήχθη ανάλυση κλιμάκωσης, έγινε εξαγωγή σχεδιαστικών εξισώσεων και αναπτύχθηκαν εργαλεία λογισμικού για την αυτοματοποιημένη σχεδίασή της. Για περαιτέρω αύξηση της ταχύτητας των παλμικών σημάτων εφαρμόσθηκε ειδική σχεδίαση, η οποία αντιπραγματεύεται την ταχύτητα με το επίπεδο των λοβών του φάσματος. Για την αποδοτική BSPK διαμόρφωση των Γκαουσιανών παλμών αναπτύχθηκε ειδική τοπολογία “Μεταγωγής Σήματος Πυροδότησης Πλήρους Ισορροπίας με Up-Conversion”. Η τοπολογία αυτή, σε αντίθεση με τις ανταγωνιστικές τοπολογίες, αποφεύγει την αντιστροφή του παλμού με αναλογικά κυκλώματα υψηλής κατανάλωσης, αλλά και την αναλογική μεταγωγή, καθώς η διαμόρφωση λαμβάνει χώρα πριν από την παραγωγή των παλμών. Παράλληλα, επιτυγχάνονται υψηλοί ρυθμοί, καθώς και υψηλή ποιότητα διαμόρφωσης λόγω των ισορροπημένων μονοπατιών της τοπολογίας. Η γεννήτρια μαζί με το διαμορφωτή αποτελούν τις καινοτόμες παρεμβάσεις στη μονάδα Βασικής Ζώνης του προτεινόμενου πομπού. Για την ολοκλήρωση της λειτουργικότητας του πομπού, αναπτύχθηκε ένα RF front end, το οποίο αποτελείται από έναν διπλά ισορροπημένο μίκτη, έναν LO buffer, ένα μετατροπέα διαφορικού σήματος σε απλό, και έναν ενισχυτή ισχύος, ο οποίος είναι προσαρμοσμένος στα 50 Ohms, χωρίς να απαιτεί κανένα εξωτερικό στοιχείο. Το RF front end ολοκληρώθηκε μαζί με τη μονάδα βασικής ζώνης, και ο ολοκληρωμένος πομπός κατασκευάστηκε σε τεχνολογία CMOS 130 nm. Το ολοκληρωμένο προσαρτήθηκε στην RF πλακέτα συστήματος με την τεχνική Chip on Board. Για την επιτυχία του συστήματος με την πρώτη προσπάθεια έγινε συσχεδίαση σε επίπεδο IC-Package-PCB, δίνοντας ιδιαίτερη έμφαση στα ζητήματα Signal/Power Integrity. Ο πομπός παρουσίασε την υψηλότερη ταχύτητα από τις ανταγωνιστικές MB-IR UWB υλοποιήσεις, ίση με 1.5 Gbps, με αντίστοιχη ενεργειακή αποδοτικότητα 21 pJoule/bit και μέτρο διανυσματικού σφάλματος 5.5%. Ο πομπός βελτίωσε τους πλευρικούς λοβούς στο φάσμα περισσότερο από 10 dB, ενώ η διατριβή, εκμεταλλευόμενη την αναδιαταξιμότητα του πομπού, παρουσιάζει, επιπλέον, τις πρώτες μετρήσεις σε ταχύτητες εκατοντάδων Mbps για ικανοποίηση της χαμηλής ζώνης της πρόσφατα θεσμοθετημένης, και εξαιρετικά αυστηρής, ευρωπαϊκής μάσκας εκπομπής.
The multitude of applications that Ultra-Wideband (UWB) technology can serve, from high-speed Wireless Personal Area Networks, to Wireless Sensor Networks with precision Geolocation abilities, and Wireless Medical Networks, has attracted intense research interest in the implementation of UWB systems. The unusually wide range of frequencies assigned to UWB, from 3.1-10.6 GHz, allows UWB systems employing low order modulation schemes to enjoy high throughput at low power consumption. However, since UWB shares the spectrum with existing wireless networking technologies, UWB emissions must be limited to a power spectral density below the threshold of -41.3 dBm/MHz, satisfying very stringent emission masks and introducing great challenges in the design of UWB transmitters. The subject of this thesis is the design of low power, fully integrated, reconfigurable CMOS UWB transmitters, with high spectral flexibility, high speed and high modulation quality. Adopting the Multi-Band Impulse-Radio architecture, in conjunction with the Direct Sequence BPSK modulation, the research focused on the development of a baseband unit, able to precisely invert Gaussian shaped, subnanosecond pulses. The key contributions of this thesis are a CMOS Gaussian Pulse Generator and a BSPK modulation topology, which jointly constitute the proposed baseband unit. The Pulse Generator (PG) is based on non-linear shaping, so as to facilitate the configurability of the output pulse duration, and exploits the voltage transfer characteristic of a Resistive Loaded Asymmetrical CMOS Inverter, which results in spectral sidelobes typically better than -40 dB. The PG incorporates mostly-digital low voltage circuits, while the MOSFET devices that undertake the pulse shaping avoid exclusive operation in weak inversion, in contrast to previous implementations. Consequently, the proposed CMOS PG is able to support higher throughput, as well as higher output amplitude, which relaxes considerably the design of the RF front end. This thesis presents a systematic design procedure and a scaling analysis of the non-linear pulse shaper. Moreover, in order to further increase the speed, a special PRF boost technique is proposed, which trades off speed and spectral efficiency for the spectral sidelobes level. Regarding the BPSK modulator, this work introduces the “Trigger Switching Fully Balanced Up-Conversion” topology, which avoids the use of power-hungry and distortion-prone analog circuits for the accurate inversion of the subnanosecond shaped pulses, as well as avoids the application of analog waveform switching to the baseband pulses, since the baseband modulation takes place before the generation of the pulses. The digital nature of the switching lends itself to high data rates, while the balanced paths of the topology ensure high modulation quality with minimal design effort. Wafer probing measurements confirmed the high performance of the baseband unit. The functionality of the transmitter was completed by the development of an RF front end which consists of a double balanced mixer, an LO buffer, a differential to single-ended (DtoSE) converter, and a power amplifier which is ready to drive a 50 Ohms load without requiring any off-chip components. The integrated transmitter, which incorporates the proposed baseband unit and the RF front end, was fabricated in 130 nm CMOS technology. The transmitter RFIC was directly attached to the system RF PCB using the Chip-on-Board packaging option. The First-Pass success of the system was ensured by paying particular attention to Signal/Power Integrity issues and following an IC-Package-PCB co-design procedure. The transmitter was measured up to 1.5 Gbps, which, to the author’s knowledge, was the highest speed amongst the competitive Multi-Band Impulse-Radio UWB implementations in the literature. The corresponding energy efficiency was 21 pJoule/bit and the Error Vector Magnitude (EVM) 5.5%, while the proposed transmitter improved the spectral sidelobes by over 10 dB. Exploiting the reconfigurability of the transmitter, this thesis presents the first measurements at multi-Mbps speeds that completely meet the final version of the European spectrum emission mask.

Most of the electric machines had a conventional design for speed –control. Previously, the speed regulation of these motors was done via traditional or mechanical contacts, for example: inserting resistors to the armature circuit or controlling the excited circuit of DC motor, and other methods of control. These classical methods, however, lead to non-linearity in mechanical or electromechanical characteristics [ω= f(M) or ω= f(I)], which in turn lead to increased power losses as the result of the non-soft regulation of speed, as well as the great inertia of classical control methods that rely on mechanical and electromagnetic devices.

With the tremendous expansion in communication in recent years, contemporary communication techniques must improve quickly. The requirement is data-driven, driven mainly through users for content consumption and the expanding number of other mobile users who require quick access to the network for personal and professional needs, resulting in a massive growth in data traffic. However, because services and daily requirements are conducted over the internet, 5G demands pose new obstacles. As a result, device count and connections in wireless networks will grow, resulting in increasing demand for total data and the requirement to manage a large number of physical connections. In any modern wireless communication system, power amplifiers are essential components. For many years, the general problem has been to reduce the amount of energy consumed, which is DC in nature concerning the amount of radio frequency delivered. The fifth generation (5G) wireless communication system is intended to connect billions of devices at a very high data transfer rate. However, it has prompted worries about the fast-rising global energy consumption, necessitating urgent innovation in the creation of energy-efficient wireless transmitter systems. Efficiency, as well as linearity, are two important parameters of power amplifiers. It is unavoidable to make trade-offs among parameters like efficiency and linearity, and attaining both is incredibly challenging. In most cases, lowering the requirements of nonlinearity, which are linked to power efficiency, results in transmitting the signals with the highest amplitudes below the amplifier's compression level. The linearity of PAs, in addition to their efficiency, can be quite substantial. Some strategies include as Doherty power amplifier, Outphasing technique Envelope Tracking (ET), Kahn Envelope Elimination and Restoration (EER), and Linear Amplification with Non-linear Components (LINC).

“Stability of negative feedback” discusses the measures that must be taken to guarantee that a negative-feedback system is stable. Examples are given of frequency dependences using Bode and Nyquist plots. Safety margins are quantified by means of gain margins and phase margins; the desirability of a minimum-phase-lag network. A design procedure is formulated. There is discussion of Nyquist (conditional) stability, and how it may be achieved by judicious introduction of a non-linearity. A demonstration circuit shows that these measures can yield Nyquist stability with safety.

During the past decade, the installed wind power capacity in the world has been increasing more than 30%. Wind energy conversion system (WECSs) based on the doubly-fed induction generator (DFIG) dominated the wind power generations due to the outstanding advantages, including small converters rating around 30% of the generator rating, lower converter cost. Due to the non-linearity of wind system, the DFIG power control presents a big challenge especially under wind-speed variation and parameter’s sensibility. To overcome these major problems; an improved IDPC (Indirect Power Control); based on PID “Proportional-Integral-Derivative” controller, was proposed instead the conventional one (based on PI), in order to enhance the wind-system performances in terms; power error, tracking power and overshoot. Unfortunately using robustness tests (based on severe DFIG’s parameters changement); the wind-system offers non-satisfactory simulation results which were illustrated by the very bad power tracking and very big overshoot (> 50%). In this context; adaptive, robust & intelligent controllers were proposed to control direct & quadrature currents (Ird & Irq) under MPPT (Maximum Power Point Tracking) strategy to main the unity power factor (PF≈1) by keeping the reactive power at zero level. In this case, the new IDPC based on intelligent controllers offered an excellent wind-system performance especially using robustness tests, which offered a big improvement especially using Type-1 Fuzzy Logic Controller (T1-FLC), Type-2 Fuzzy Logic Control (T2-FLC; is the New class of fuzzy logic) & Neuro-Fuzzy Logic (NFC). In this sense, I think that this edited book is an important contribution to help students already in mastery of the basis of power electronic circuits and control systems theory to achieve these pedagogical goals. The proposed book describes with easy manner the modeling & control of Wind-turbine DFIG in order to control the stator powers using different topologies of robust, adaptive and intelligent controllers. The book present numerous intelligent control techniques that help in the control design of the DFIG wind-system (WT). The textbook “Improved Indirect Power Control (IDPC) of Wind Energy Conversion Systems (WECS)” proposes a collection of concepts, organized in a synergic manner such that to ease comprehension of the WT control design. The book’s contribution goes towards completing the already existing literature by offering a useful integration of control techniques, worthy to be read, understood and employed in the various WT applications. Please enjoy reading this book.

Abstract We analyzed the gain error issue and non-linearity issue of a precise Analog-to-Digital Converter (ADC) and found the root cause to be Random Telegraph Signal (RTS) noise in bipolar devices. The RTS noise produced nearly 1mV abrupt changes in a band-gap reference voltage, and affected ADC and other circuits where the reference voltage was used. We developed a new measurement method enabling us to detect RTS noise in bipolar with higher signal-to-noise ratio than traditional methods. We also developed an algorithm to extract RTS occurrence frequency and average magnitude. The RTS characterization capability has helped us invent a new bipolar structure and develop new processes to minimize RTS noise.

A digital circuit can be implemented with a global linear transformation and a point non-linearity. Several suggestions, and a few experimental demonstrations, have shown that, by using optics to implement the global transformation part, hybrid opto-electronic digital processors can be built (1,2). Though such hybrid systems are still limited by the switching time of the electro-optical or electronic point-non-linear part of the system, their overall throughput can benefit from the inherent parallelism of lightwave communication, particularily when a free-space, three dimentional, optical configuration is being used; unlike conventional electronic gate-arrays, these hybrid opto-electronic ones have no “design rules” that limit the complexity and generality of their interconnections.

This paper reports the application of Model Reference Adaptive Control (MRAC) to an X-Y planar motion mechanism. A flexure-based 2-DOF planar motion platform is first developed for the wafer probing purpose and a planar Voice Coil Motor (VCM) is used for driving the mechanism and the flexural bearings. The dynamics of the motion platform is governed by a set of differential equations using the mass-spring-damper model and the Kirchhoff’s circuit laws. Due to the non-linearity of the force constant and the coupling effect of the VCM, a MRAC algorithm is proposed to implement on the motion control system so as to improve the system transient response. In order to guarantee the stability of the Model Reference Adaptive System (MRAS), Lyapunov Theory is adopted in the controller design. The control system performance is simulated using MATLAB /SIMULINK with the considerations of the motor non-linearity and the assembly variation of the flexural mechanism. On the other hand, a conventional PID controller is also constructed for control experiments to compare the transient responses between MRAC and PID control systems. Simulation results revealed that the proposed MRAS outperforms the PID controller for the 2 DOF planar motion system in the presence of sensor noise, disturbing force and parameter variation effects.

In this research, a nonlinear shunted piezoelectric is proposed for practical realization of nonlinear vibration absorbers. The main advantage of the electro-mechanical system is that non-linearity can be readily achieved by proper circuit design. First, the dynamics of a SDOF linear mechanical oscillator coupled to a nonlinear shunted piezoelectric attachment is studied. Both the nonlinear normal modes and the nonlinear forced response of the electro-mechanical system are investigated. Numerical simulation reveals that under certain condition, a fast, passive energy transfer from the mechanical oscillator to the piezoelectric attachment is observed. The essentially nonlinear absorber is also able to work over broad frequency band under periodic excitation with a smaller inductance requirement compared with the linear piezoelectric vibration absorber. The application of piezoelectric vibration absorbers to simplified blade-disk structures is also taken into consideration. It is shown that when blades become mistuned, the nonlinear vibration absorber yields better vibration mitigation performance than the linear shunt circuit does. Namely, the blade mistuned vibration could be reduced by the nonlinear effect in the piezoelectric absorber. However, to improve the performance of piezoelectric-based vibration absorber, a systematic and rigorous study of the optimal tuning design deserves further investigation.

Pelli and Zhang1 describe techniques for combining the outputs of the three color DACs with a CRT monitor to achieve extra gray-scale resolution, particularly at low contrast levels. While there should theoretically be 24 bits of gray scale available, this is unachievable in practice because of monitor nonlinearities and DAC inaccuracies. We measure and account for the inaccuracies in the DAC (which are extremely stable) and build a single look-up table containing over 32,000 (15 bits) RGB values that are converted by a passive resistive circuit into equal-interval gray-scale values. Dynamic inaccuracies resulting from DAC bit changes have been examined and found to be negligible. A novel smoothing technique that does not depend on assumptions of the form of the monitor non-linearity has been used. The final correlation of measured vs. specified luminance has been as high as 0.999996 (and is typically higher than 0.99995).