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Littérature scientifique sur le sujet « Algorithms and implementation »

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Publié le 10 mars 2023

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Articles de revues sur le sujet "Algorithms and implementation"

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Tsaramirsis, Kostandinos, Georgios Tsaramirsis, Fazal Qudus Khan, Awais Ahmad, Alaa Omar Khadidos et Adil Khadidos. « More Agility to Semantic Similarities Algorithm Implementations ». International Journal of Environmental Research and Public Health 17, no 1 (30 décembre 2019) : 267. http://dx.doi.org/10.3390/ijerph17010267.

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Algorithms for measuring semantic similarity between Gene Ontology (GO) terms has become a popular area of research in bioinformatics as it can help to detect functional associations between genes and potential impact to the health and well-being of humans, animals, and plants. While the focus of the research is on the design and improvement of GO semantic similarity algorithms, there is still a need for implementation of such algorithms before they can be used to solve actual biological problems. This can be challenging given that the potential users usually come from a biology background and they are not programmers. A number of implementations exist for some well-established algorithms but these implementations are not generic enough to support any algorithm other than the ones they are designed for. The aim of this paper is to shift the focus away from implementation, allowing researchers to focus on algorithm’s design and execution rather than implementation. This is achieved by an implementation approach capable of understanding and executing user defined GO semantic similarity algorithms. Questions and answers were used for the definition of the user defined algorithm. Additionally, this approach understands any direct acyclic digraph in an Open Biomedical Ontologies (OBO)-like format and its annotations. On the other hand, software developers of similar applications can also benefit by using this as a template for their applications.
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Verma, Rohit, et Jyoti Dhiman. « Implementation of Improved Cryptography Algorithm ». International Journal of Information Technology and Computer Science 14, no 2 (8 avril 2022) : 45–53. http://dx.doi.org/10.5815/ijitcs.2022.02.04.

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A network is an interconnected group of independent computing devices which uses a different set of protocols to communicate with each other independently and meaningfully. This communication should be carried out securely. Due to different attacks, this security sometimes gets compromised. So, to communicate securely different cryptography algorithms are used i.e., symmetric and asymmetric algorithms. Cryptography helps to achieve authentication, confidentiality, integrity, non-repudiation, and availability of data. Nowadays many algorithms provide security to data but these algorithms have various security flaws. To improve the strength of these algorithms, a new security protocol is designed using features of symmetric key and asymmetric key algorithms. The security principles can be achieved by AES and RSA algorithms. The main purpose of designing this algorithm is to provide better security to data in transit against passive as well as from active attacks. The new proposed hybrid algorithm is implemented in MATLAB R2019a. This algorithm will be analysed and compared on three parameters like avalanche effect, performance, and security against attacks. The proposed model will contribute towards improving the excellence of educators and academics, as well as increase competitiveness of educational programmes on cybersecurity among similar institutions in the EU countries.
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Bassil, Youssef. « Implementation of Combinatorial Algorithms using Optimization Techniques ». International Journal of Trend in Scientific Research and Development Volume-3, Issue-3 (30 avril 2019) : 660–66. http://dx.doi.org/10.31142/ijtsrd22925.

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Bassil, Youssef. « Implementation of Computational Algorithms using Parallel Programming ». International Journal of Trend in Scientific Research and Development Volume-3, Issue-3 (30 avril 2019) : 704–10. http://dx.doi.org/10.31142/ijtsrd22947.

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Mehlhorn, Kurt, et Michael Seel. « Infimaximal Frames : A Technique for Making Lines Look Like Segments ». International Journal of Computational Geometry & ; Applications 13, no 03 (juin 2003) : 241–55. http://dx.doi.org/10.1142/s0218195903001141.

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Many geometric algorithms that are usually formulated for points and segments generalize easily to inputs also containing rays and lines. The sweep algorithm for segment intersection is a prototypical example. Implementations of such algorithms do, in general, not extend easily. For example, segment endpoints cause events in sweep line algorithms, but lines have no endpoints. We describe a general technique, which we call infimaximal frames, for extending implementations to inputs also containing rays and lines. The technique can also be used to extend implementations of planar subdivisions to subdivisions with many unbounded faces. We have used the technique successfully in generalizing a sweep algorithm designed for segments to rays and lines and also in an implementation of planar Nef polyhedra.14,1 Our implementation is based on concepts of generic programming in C++ and the geometric data types provided by the C++ Computational Geometry Algorithms Library (CGAL).
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Saliby, Joe G. « Design and Implementation of Digital Image Transformation Algorithms ». International Journal of Trend in Scientific Research and Development Volume-3, Issue-3 (30 avril 2019) : 623–31. http://dx.doi.org/10.31142/ijtsrd22918.

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Michael, Prawin Angel. « FPGA Implementation of Multilevel Space Vector PWM Algorithms ». International Journal of Engineering and Technology 1, no 3 (2009) : 208–12. http://dx.doi.org/10.7763/ijet.2009.v1.39.

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Yanwari, Muhammad Irwan, Anton Satria Prabuwono, Tri Raharjo Yudantoro, Nurseno Bayu Aji, Wiktasari et Slamet Handoko. « Priority Scheduling Implementation for Exam Schedule ». Indonesian Journal of Information Systems 5, no 2 (28 février 2023) : 80–89. http://dx.doi.org/10.24002/ijis.v5i2.6871.

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Scheduling is a common problem that has been raised for a long time. Many algorithms have been created for this problem. Some algorithms offer flexibility in terms of constraints and complex operations. Because of that complexity, many algorithms will need huge computation resources and execution time. A platform like a web application has many restrictions such as execution time and computation resources. A complex algorithm is not suited for the web application platform. Priority scheduling is a scheduling algorithm based on a priority queue. Every schedule slot will produce a queue based on the constraints. Each constraint will have a different weight. Weight in queue represents their priority. This algorithm provides a light algorithm that only needs a few computations and execution times. The exam schedule is one of many problems in educational institutions. A web application is a popular platform that can be accessed from everywhere. Many educational institutions use web platforms as their main system platform. Web platforms have some restrictions such as execution time. Due to web platform restrictions, priority scheduling is a suitable algorithm for this platform. In this study, the author tries to implement a priority scheduling algorithm in scheduling cases with a website platform and shows that this algorithm solution can be an alternative for solving scheduling cases with low computational resources.
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Afathi, Maan. « Implementation of new hybrid evolutionary algorithm with fuzzy logic control approach for optimization problems ». Eastern-European Journal of Enterprise Technologies 6, no 4 (114) (16 décembre 2021) : 6–14. http://dx.doi.org/10.15587/1729-4061.2021.245222.

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The main purpose of using the hybrid evolutionary algorithm is to reach optimal values and achieve goals that traditional methods cannot reach and because there are different evolutionary computations, each of them has different advantages and capabilities. Therefore, researchers integrate more than one algorithm into a hybrid form to increase the ability of these algorithms to perform evolutionary computation when working alone. In this paper, we propose a new algorithm for hybrid genetic algorithm (GA) and particle swarm optimization (PSO) with fuzzy logic control (FLC) approach for function optimization. Fuzzy logic is applied to switch dynamically between evolutionary algorithms, in an attempt to improve the algorithm performance. The HEF hybrid evolutionary algorithms are compared to GA, PSO, GAPSO, and PSOGA. The comparison uses a variety of measurement functions. In addition to strongly convex functions, these functions can be uniformly distributed or not, and are valuable for evaluating our approach. Iterations of 500, 1000, and 1500 were used for each function. The HEF algorithm’s efficiency was tested on four functions. The new algorithm is often the best solution, HEF accounted for 75 % of all the tests. This method is superior to conventional methods in terms of efficiency
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Crutchfield, William Y., et Michael L. Welcome. « Object-Oriented Implementation of Adaptive Mesh Refinement Algorithms ». Scientific Programming 2, no 4 (1993) : 145–56. http://dx.doi.org/10.1155/1993/838429.

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We describe C++ classes that simplify development of adaptive mesh refinement (AMR) algorithms. The classes divide into two groups, generic classes that are broadly useful in adaptive algorithms, and application-specific classes that are the basis for our AMR algorithm. We employ two languages, with C++ responsible for the high-level data structures, and Fortran responsible for low-level numerics. The C++ implementation is as fast as the original Fortran implementation. Use of inheritance has allowed us to extend the original AMR algorithm to other problems with greatly reduced development time.
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Thèses sur le sujet "Algorithms and implementation"

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Karlsson, Mattias. « IMPLEMENTATION OF ALGORITHMS ON FPGAS ». Thesis, Jönköping University, JTH, Computer and Electrical Engineering, 2009. http://urn.kb.se/resolve?urn=urn:nbn:se:hj:diva-9735.

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This thesis describes how an algorithm is transferred from a digital signal processor to an embedded microprocessor in an FPGA using C to hardware program from Altera.

Saab Avitronics develops the secondary high lift control system for the Boeing 787 aircraft. The high lift system consists of electric motors controlling the trailing edge wing flaps and the leading edge wing slats. The high lift motors manage to control the Boeing 787 aircraft with full power even if half of each motor’s stators are damaged. The motor is a PMDC brushless motor which is controlled by an advanced algorithm. The algorithm needs to be calculated by a fast special digital signal processor.

In this thesis I have tested if the algorithm can be transferred to an FPGA and still manage the time and safety demands. This was done by transferring an already working algorithm from the digital signal processor to an FPGA. The idea was to put the algorithm in an embedded NIOS II microprocessor and speed up the bottlenecks with Altera’s C to hardware program.

The study shows that the C-code needs to be optimized for C to hardware to manage the up speeding part, as the tests showed that the calculation time for the algorithm actually became longer with C to hardware. This thesis also shows that it is highly probable to use an FPGA equipped with Altera’s NIOS II safety critical microprocessor instead of a digital signal processor to control the electrical high lift motors in the Boeing 787 aircraft.

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Yildiz, Ozgur. « Implementation Of Mesh Generation Algorithms ». Master's thesis, METU, 2003. http://etd.lib.metu.edu.tr/upload/1339621/index.pdf.

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In this thesis, three mesh generation software packages have been developed and implemented. The first two were based on structured mesh generation algorithms and used to solve structured surface and volume mesh generation problems of three-dimensional domains. Structured mesh generation algorithms were based on the concept of isoparametric coordinates. In structured surface mesh generation software, quadrilateral mesh elements were generated for complex three-dimensional surfaces and these elements were then triangulated in order to obtain high-quality triangular mesh elements. Structured volume mesh generation software was used to generate hexahedral mesh elements for volumes. Tetrahedral mesh elements were constructed from hexahedral elements using hexahedral node insertion method. The results, which were produced by the mesh generation algorithms, were converted to a required format in order to be saved in output files. The third software package is an unstructured quality tetrahedral mesh generator and was used to generate exact Delaunay tetrahedralizations, constrained (conforming) Delaunay tetrahedralizations and quality conforming Delaunay tetrahedralizations. Apart from the mesh generation algorithms used and implemented in this thesis, unstructured mesh generation techniques that can be used to generate quadrilateral, triangular, hexahedral and tetrahedral mesh elements were also discussed.
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Rothacher, Fritz Markus. « Sample-rate conversion : algorithms and VLSI implementation / ». [Konstanz] : Hartung-Gorre, 1995. http://e-collection.ethbib.ethz.ch/show?type=diss&nr=10980.

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Thakkar, Darshan Suresh, et darshanst@gmail com. « FPGA Implementation of Short Word-Length Algorithms ». RMIT University. Electrical and Computer Engineering, 2008. http://adt.lib.rmit.edu.au/adt/public/adt-VIT20080806.140908.

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Short Word-Length refers to single-bit, two-bit or ternary processing systems. SWL systems use Sigma-Delta Modulation (SDM) technique to express an analogue or multi-bit input signal in terms of a high frequency single-bit stream. In Sigma-Delta Modulation, the input signal is coarsely quantized into a single-bit representation by sampling it at a much higher rate than twice the maximum input frequency viz. the Nyquist rate. This single-bit representation is almost exclusively filtered to remove conversion quantization noise and sample decimated to the Nyquist frequency in preparation for traditional signal processing. SWL algorithms have a huge potential in a variety of applications as they offer many advantages as compared to multi-bit approaches. Features of SWL include efficient hardware implementation, increased flexibility and massive cost savings. Field Programmable Gate Arrays (FPGAs) are SRAM/FLASH based integrated circuits that can be programmed and re-programmed by the end user. FPGAs are made up of arrays of logic gates, routing channels and I/O blocks. State-of-the-art FPGAs include features such as Advanced Clock Management, Dedicated Multipliers, DSP Slices, High Speed I/O and Embedded Microprocessors. A System-on-Programmable-Chip (SoPC) design approach uses some or all the aforementioned resources to create a complete processing system on the device itself, ensuring maximum silicon area utilization and higher speed by eliminating inter-chip communication overheads. This dissertation focuses on the application of SWL processing systems in audio Class-D Amplifiers and aims to prove the claims of efficient hardware implementation and higher speeds of operation. The analog Class-D Amplifier is analyzed and an SWL equivalent of the system is derived by replacing the analogue components with DSP functions wherever possible. The SWL Class-D Amplifier is implemented on an FPGA, the standard emulation platform, using VHSIC Hardware Description Languages (VHDL). The approach is taken a step forward by adding re-configurability and media selectivity and proposing SDM adaptivity to improve performance.
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Mahdi, Abdul-Hussain Ebrahim. « Efficient generalized transform algorithms for digital implementation ». Thesis, Bangor University, 1990. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.277612.

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Farooq, Muhammad. « New Lanczos-type algorithms and their implementation ». Thesis, University of Essex, 2011. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.536976.

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Jerez, Juan Luis. « Custom optimization algorithms for efficient hardware implementation ». Thesis, Imperial College London, 2013. http://hdl.handle.net/10044/1/12791.

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The focus is on real-time optimal decision making with application in advanced control systems. These computationally intensive schemes, which involve the repeated solution of (convex) optimization problems within a sampling interval, require more efficient computational methods than currently available for extending their application to highly dynamical systems and setups with resource-constrained embedded computing platforms. A range of techniques are proposed to exploit synergies between digital hardware, numerical analysis and algorithm design. These techniques build on top of parameterisable hardware code generation tools that generate VHDL code describing custom computing architectures for interior-point methods and a range of first-order constrained optimization methods. Since memory limitations are often important in embedded implementations we develop a custom storage scheme for KKT matrices arising in interior-point methods for control, which reduces memory requirements significantly and prevents I/O bandwidth limitations from affecting the performance in our implementations. To take advantage of the trend towards parallel computing architectures and to exploit the special characteristics of our custom architectures we propose several high-level parallel optimal control schemes that can reduce computation time. A novel optimization formulation was devised for reducing the computational effort in solving certain problems independent of the computing platform used. In order to be able to solve optimization problems in fixed-point arithmetic, which is significantly more resource-efficient than floating-point, tailored linear algebra algorithms were developed for solving the linear systems that form the computational bottleneck in many optimization methods. These methods come with guarantees for reliable operation. We also provide finite-precision error analysis for fixed-point implementations of first-order methods that can be used to minimize the use of resources while meeting accuracy specifications. The suggested techniques are demonstrated on several practical examples, including a hardware-in-the-loop setup for optimization-based control of a large airliner.
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Ferguson, Phillip David. « Implementation exploration of imaging algorithms on FPGAs ». Thesis, University of Glasgow, 2012. http://theses.gla.ac.uk/3419/.

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This portfolio thesis documents the work carried out as part of the Engineering Doctorate (EngD) programme undertaken at the Institute for System Level Integration. This work was sponsored and aided by Thales Optronics Ltd, a company well versed in developing specialised electro-optical devices. Field programmable gate arrays (FPGAs) are the devices of choice for custom image processing algorithms due to their reconfigurable nature. This also makes them more economical for low volume production runs where non-recoverable engineering costs are a large factor. Asynchronous circuits have had a remarkable surge in development over the last 20 years, to such an extent that they are beginning to displace conventional designs for niche applications. Their unique ability to adapt to environmental and data dependent processing needs have lead them to out-perform synchronous designs in ASIC platforms for certain applications. Abstract The main body of research was separated into three areas of work presented as three technical documents. The first area of research addresses an FPGA implementation of contrast limited adaptive histogram equalisation (CLAHE), an algorithm which provides increased visual performance over conventional methods. From this, a novel implementation strategy was provided along with the key design factors for future use in a commercial context. The second area of research investigates the ability to create asynchronous circuits on FPGA devices. The main motivation for this work was to establish if any of the benefits which had been demonstrated for ASIC devices can be applied to FPGA devices. The investigation surmised the most suitable asynchronous design style for FPGA devices, a design flow to allow asynchronous circuits to function correctly on FPGAs and novel design strategies to implement consistent and repeatable asynchronous components. The result of this work established a route to implement circuits asynchronously in an FPGA. The final area of research focused on a unique conversion tool that allows synchronous circuits to run asynchronously on FPGAs whilst maintaining the same data flow patterns. This research produced an automated tool capable of implementing circuits on an FPGA asynchronously from their synchronous descriptions. This approach allowed the primary motivators of this work to be addressed. The results of this work show timing, resource utilisation and noise spectrum benefits by implementing circuits asynchronously on FPGA devices.
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Bukina, Elena. « Asymptotically optimal gradient algorithms : analysis and implementation ». Nice, 2012. http://www.theses.fr/2012NICE4033.

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Nous nous intéressons dans ce manuscrit au problème relatif à la minimisation de fonctions quadratiques dont la matrice hessienne est creuse, symétrique et définie positive (ou, de manière équivalente, au problème de résolution de systèmes linéaires de grande taille). Les méthodes classiques itératives fréquemment employées pour résoudre ce problème procèdent en choisissant successivement des pas dont la longueur et la direction dépendent du spectre de la matrice et sont donc adaptées au problème particulier traité. Ce choix adaptatif du pas peut cependant limiter l’efficacité de l’implémentation parallèle d’un algorithme : la présence de nombreux produits scalaires à calculer limite grandement les performances en imposant des étapes de synchronisation ainsi qu’un communication globale coûteuse dans le cas particulier des machines parallèles à mémoire distribuée disposant d’un grand nombre de processeurs. L’approche proposée dans cette thèse se fonde sur l’utilisation d’une famille de méthodes du gradient pour laquelle l’inverse de la longueur des pas est choisi d’avance. Pour ce type de méthodes, l’utilisation d’une suite de longueurs de pas ayant une distribution arc sinus sur l’intervalle défini par les limites du spectre de la matrice hessienne permet de converger rapidement. De fait, il n’y a aucun besoin d’étudier précisément le détail du spectre dans la mesure où les longueurs de pas ne sont reliées au problème que par les valeurs propres extrêmes de la matrice hessienne. Nous proposons d’estimer celles-ci pendant le déroulement de l’algorithme lui-même. En conséquence de la simplicité du calcul de la longueur des pas, le calcul de produits scalaires à chaque itération de l’algorithme n’est pas nécessaire (ils ne sont utilisés que sur un petit nombre d’itérations prédéfinies dans le but de déterminer les limites spectrales de la matrice) rendant ainsi notre approche particulièrement intéressante dans un contexte de calcul parallèle. Nous proposons plusieurs méthodes de gradient couplées à différentes suites de longueurs de pas précalculées ainsi qu’à plusieurs estimateurs de valeurs propres. En pratique, les performances de la méthode la plus efficace (en termes de propriété de convergence et de coût calcul) sont testées sur un ensemble de problèmes théoriques et pratiques. La même approche est aussi considérée pour l’optimisation quadratique convexe sous contraintes d’égalité
In this work we consider the minimization of quadratic functions with sparse and symmetric positive-definite Hessian matrices (or, equivalently, the solution of large linear systems of equations). Classical iterative methods for solving these problems proceed by choosing the step sizes (and search directions) relatively to the spectrum of the matrix, which are thus adapted to the particular problem considered. This type of adaptive choice results in computations that may limit the efficiency of parallel implementations of a given method : the presence of several (separate) inner products to be computed at each iteration crates blocking steps due to required global communication on some distributed-memory parallel machines with large number of processors. The approach developed in this thesis is focused on the use of a family of gradient methods where the inverse step sizes are selected beforehand. For this type of methods the use of sequences of step sizes with the arcsine distribution on the interval defined by the bounds of the matrix spectrum allows to achieve fast rates of convergence. Therefore, there is no need to extensively study the spectrum since the step size are connected to the problem through only the extremal eigenvalues of the Hessian matrix. We propose to estimate the matrix spectrum and generated by the algorithm itself. Due to the simplicity of the step size generation, the computation of inner products at each iteration is not required (they are needed at just a small number of pre-defined iterations to determine the spectral boundaries), making the approach particularly interesting in a parallel computing context. Several effective gradient methods are proposed coupled with pre-computed sequences of step sizes and eigenvalue estimators. The practical performance of the most appealing of them (in terms of convergence properties and required computational effort) is tested on a set of theoretical and real-life test problems. The same approach is also considered for convex quadratic optimization subject to equality constraints
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Sankaran, Sundar G. « Implementation and evaluation of echo cancellation algorithms ». Thesis, This resource online, 1996. http://scholar.lib.vt.edu/theses/available/etd-02132009-172004/.

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Livres sur le sujet "Algorithms and implementation"

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Muller, J. M. Elementary functions : Algorithms and implementation. Boston : Birkhäuser, 1997.

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Kurt, Mehlhorn, Näher Stefan et Nievergelt Jurg, dir. Algorithms : Implementation, libraries and use. London : Academic Press, 1994.

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Ramirez, Paulo Sergio. Adaptive Filtering : Algorithms and Practical Implementation. Boston, MA : Springer US, 2002.

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Diniz, Paulo S. R. Adaptive Filtering : Algorithms and Practical Implementation. 4e éd. Boston, MA : Springer US, 2013.

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Adaptive filtering : Algorithms and practical implementation. Boston : Kluwer Academic Publishers, 1997.

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Adaptive filtering : Algorithms and practical implementation. 2e éd. Boston : Kluwer Academic Publishers, 2002.

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Roosta, Seyed H. Algorithm design, analysis and implementation. New York : Springer, 2005.

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Sayood, K. Implementation issues in source coding : Semiannual status report. Lincoln, Neb : College of Engineering and Technology, University of Nebraska-Lincoln, 1990.

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Shen, Hong. Efficient design and implementation of parallel algorithms. Åbo : Åbo Akademis Förlag, 1991.

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Omondi, Amos. Computer arithmetic systems : Algorithms, architecture and implementation. New York : Prentice-Hall, 1994.

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Chapitres de livres sur le sujet "Algorithms and implementation"

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Drechsler, Rolf. « Implementation ». Dans Evolutionary Algorithms for VLSI CAD, 45–56. Boston, MA : Springer US, 1998. http://dx.doi.org/10.1007/978-1-4757-2866-8_5.

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Chen, Danny Z., Shuang Luan et Jinhui Xu. « Topological Peeling and Implementation ». Dans Algorithms and Computation, 454–66. Berlin, Heidelberg : Springer Berlin Heidelberg, 2001. http://dx.doi.org/10.1007/3-540-45678-3_39.

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Välimäki, Niko, Wolfgang Gerlach, Kashyap Dixit et Veli Mäkinen. « Engineering a Compressed Suffix Tree Implementation ». Dans Experimental Algorithms, 217–28. Berlin, Heidelberg : Springer Berlin Heidelberg, 2007. http://dx.doi.org/10.1007/978-3-540-72845-0_17.

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van Glabbeek, Rob, et Bas Ploeger. « Five Determinisation Algorithms ». Dans Implementation and Applications of Automata, 161–70. Berlin, Heidelberg : Springer Berlin Heidelberg, 2008. http://dx.doi.org/10.1007/978-3-540-70844-5_17.

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Zlatev, Zahari. « Implementation of the Algorithms ». Dans Computational Methods for General Sparse Matrices, 109–20. Dordrecht : Springer Netherlands, 1991. http://dx.doi.org/10.1007/978-94-017-1116-6_6.

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Rasmussen, Kjeld. « Optimisation : Algorithms and implementation ». Dans Lecture Notes in Chemistry, 67–80. Berlin, Heidelberg : Springer Berlin Heidelberg, 1985. http://dx.doi.org/10.1007/978-3-642-45591-9_7.

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Vukobratović, Miomir, Dragan Stokić et Nenad Kirćanski. « Implementation of Control Algorithms ». Dans Non-Adaptive and Adaptive Control of Manipulation Robots, 322–80. Berlin, Heidelberg : Springer Berlin Heidelberg, 1985. http://dx.doi.org/10.1007/978-3-642-82201-8_7.

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Krestinskaya, Olga, et Alex Pappachen James. « Learning Algorithms and Implementation ». Dans Modeling and Optimization in Science and Technologies, 91–102. Cham : Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-14524-8_7.

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Kurgalin, Sergei, et Sergei Borzunov. « Implementation of Parallel Algorithms ». Dans A Practical Approach to High-Performance Computing, 93–115. Cham : Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-27558-7_6.

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Demetrescu, Camil, Andrew V. Goldberg et David S. Johnson. « Implementation Challenge for Shortest Paths ». Dans Encyclopedia of Algorithms, 947–51. New York, NY : Springer New York, 2016. http://dx.doi.org/10.1007/978-1-4939-2864-4_181.

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Actes de conférences sur le sujet "Algorithms and implementation"

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Efimov, Aleksey Igorevich, et Dmitry Igorevich Ustukov. « Comparative Analysis of Stereo Vision Algorithms Implementation on Various Architectures ». Dans 32nd International Conference on Computer Graphics and Vision. Keldysh Institute of Applied Mathematics, 2022. http://dx.doi.org/10.20948/graphicon-2022-484-489.

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A comparative analysis of the functionality of stereo vision algorithms on various hardware architectures has been carried out. The quantitative results of stereo vision algorithms implementation are presented, taking into account the specifics of the applied hardware base. The description of the original algorithm for calculating the depth map using the summed-area table is given. The complexity of the algorithm does not depend on the size of the search window. The article presents the content and results of the implementation of the stereo vision method on standard architecture computers, including multi-threaded implementation, a single-board computer and FPGA. The proposed results may be of interest in the design of vision systems for applied applications.
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Capraro, Chris, Uttam Kumar Majumder, Josh Siddall, Eric K. Davis, Dan Brown et Chris Cicotta. « SAR object classification implementation for embedded platforms ». Dans Algorithms for Synthetic Aperture Radar Imagery XXVI, sous la direction de Edmund Zelnio et Frederick D. Garber. SPIE, 2019. http://dx.doi.org/10.1117/12.2520625.

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Broggini, F. « GPU Implementation of Geophysical Algorithms ». Dans 80th EAGE Conference and Exhibition 2018. Netherlands : EAGE Publications BV, 2018. http://dx.doi.org/10.3997/2214-4609.201801346.

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Narayan, Motade Sumitra, et A. V. Kulkarni. « Implementation of multiuser detection algorithms ». Dans 2015 International Conference on Information Processing (ICIP). IEEE, 2015. http://dx.doi.org/10.1109/infop.2015.7489443.

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Chicha, Zoran, Luka Milinkovic et Aleksandra Smiljanic. « FPGA implementation of lookup algorithms ». Dans 2011 IEEE 12th International Conference on High Performance Switching and Routing (HPSR). IEEE, 2011. http://dx.doi.org/10.1109/hpsr.2011.5986037.

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Mihhailov, Dmitri, Valery Sklyarov, Iouliia Skliarova et Alexander Sudnitson. « Hardware implementation of recursive algorithms ». Dans 2010 53rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 2010. http://dx.doi.org/10.1109/mwscas.2010.5548674.

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Borowicz, Adam. « GPU Implementation of Adaptive Fourier Decomposition ». Dans 2019 Signal Processing : Algorithms, Architectures, Arrangements, and Applications (SPA). IEEE, 2019. http://dx.doi.org/10.23919/spa.2019.8936752.

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Guimarães, Antonio, Diego Aranha et Edson Borin. « Secure and efficient software implementation of QC-MDPC code-based cryptography ». Dans XX Simpósio em Sistemas Computacionais de Alto Desempenho. Sociedade Brasileira de Computação - SBC, 2019. http://dx.doi.org/10.5753/wscad_estendido.2019.8710.

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The emergence of quantum computers is pushing an unprecedented transition in the public key cryptography field. Conventional algorithms, mostly represented by elliptic curves and RSA, are vulnerable to attacks using quantum computers and need, therefore, to be replaced. Cryptosystems based on error-correcting codes are considered some of the most promising candidates to replace them for encryption schemes. Among the code families, QC-MDPC codes achieve the smallest key sizes while maintaining the desired security properties. Their performance, however, still needs to be greatly improved to reach a competitive level. In this work, we focus on optimizing the performance of QC-MDPC code-based cryptosystems through improvements concerning both their implementations and algorithms. We first present a new enhanced version of QcBits' key encapsulation mechanism, which is a constant time implementation of the Niederreiter cryptosystem using QC-MDPC codes. In this version, we updated the implementation parameters to meet the 128-bit quantum security level, replaced some of the core algorithms avoiding slower instructions, vectorized the entire code using the AVX 512 instruction set extension and introduced some other minor improvements. Comparing with the current state-of-the-art implementation for QC-MDPC codes, the BIKE implementation, our code performs 1.9 times faster when decrypting messages. We then optimize the performance of QC-MDPC code-based cryptosystems through the insertion of a configurable failure rate in their arithmetic procedures. We present constant time algorithms with a configurable failure rate for multiplication and inversion over binary polynomials, the two most expensive subroutines used in QC-MDPC implementations. Using a failure rate negligible compared to the security level (2^{-128}), our multiplication is 2 times faster than the one used in the NTL library on sparse polynomials and 1.6 times faster than a naive constant-time sparse polynomial multiplication. Our inversion algorithm, based on the inversion algorithm of Wu et al., is 2 times faster than the original and 12 times faster than the inversion algorithm of Itoh and Tsujii using the same modulus polynomial (x^{32749} - 1). By inserting these algorithms in our enhanced version of QcBits, we were able to achieve a speedup of 1.9 on the key generation and up to 1.4 on the decryption time. Comparing with BIKE, our final version of QcBits performs the uniform decryption 2.7 times faster. Moreover, the techniques presented in this work can also be applied to BIKE, opening new possibilities for further Improvements.
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Mihhailov, Dmitri, Valery Sklyarov, Iouliia Skliarova et Alexander Sudnitson. « Hardware implementation of recursive sorting algorithms ». Dans 2011 International Conference on Electronic Devices, Systems and Applications (ICEDSA). IEEE, 2011. http://dx.doi.org/10.1109/icedsa.2011.5959040.

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Ercegovac, Milos D., Jean-Michel Muller et Arnaud Tisserand. « FPGA implementation of polynomial evaluation algorithms ». Dans Photonics East '95, sous la direction de John Schewel. SPIE, 1995. http://dx.doi.org/10.1117/12.221338.

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Rapports d'organisations sur le sujet "Algorithms and implementation"

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Reif, John H. Implementation of Parallel Algorithms. Fort Belvoir, VA : Defense Technical Information Center, septembre 1991. http://dx.doi.org/10.21236/ada248759.

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Reif, John H. Implementation of Parallel Algorithms. Fort Belvoir, VA : Defense Technical Information Center, mars 1992. http://dx.doi.org/10.21236/ada248826.

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Reif, John H. Implementation of Parallel Algorithms. Fort Belvoir, VA : Defense Technical Information Center, juin 1992. http://dx.doi.org/10.21236/ada253638.

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Reif, John H. Implementation of Parallel Algorithms. Fort Belvoir, VA : Defense Technical Information Center, décembre 1993. http://dx.doi.org/10.21236/ada275803.

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Loveland, D. W. Search Algorithms and Their Implementation. Fort Belvoir, VA : Defense Technical Information Center, août 1985. http://dx.doi.org/10.21236/ada170802.

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Ho, James K. Nonprocedural Implementation of Mathematical Programming Algorithms. Fort Belvoir, VA : Defense Technical Information Center, décembre 1988. http://dx.doi.org/10.21236/ada203392.

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Ullman, Jeffrey D. Design and Implementation of Parallel Algorithms. Fort Belvoir, VA : Defense Technical Information Center, mai 1992. http://dx.doi.org/10.21236/ada250894.

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Braun, Thomas R., et Ralph C. Smith. Efficient Implementation Algorithms for Homogenized Energy Models. Fort Belvoir, VA : Defense Technical Information Center, janvier 2005. http://dx.doi.org/10.21236/ada439961.

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Sharir, Micha. Implementation and Experimentation with Motion Planning Algorithms. Fort Belvoir, VA : Defense Technical Information Center, septembre 1991. http://dx.doi.org/10.21236/ada242801.

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Sharir, Micha. Implementation and Experimentation with Motion Planning Algorithms. Fort Belvoir, VA : Defense Technical Information Center, septembre 1990. http://dx.doi.org/10.21236/ada228278.

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