Bibliographies thématiques / AGC CIRCUITS

Littérature scientifique sur le sujet « AGC CIRCUITS »

Auteur : Grafiati
Publié le 11 septembre 2023

Créez une référence correcte selon les styles APA, MLA, Chicago, Harvard et plusieurs autres

Choisissez une source :

Sommaire

Consultez les listes thématiques d’articles de revues, de livres, de thèses, de rapports de conférences et d’autres sources académiques sur le sujet « AGC CIRCUITS ».

À côté de chaque source dans la liste de références il y a un bouton « Ajouter à la bibliographie ». Cliquez sur ce bouton, et nous générerons automatiquement la référence bibliographique pour la source choisie selon votre style de citation préféré : APA, MLA, Harvard, Vancouver, Chicago, etc.

Vous pouvez aussi télécharger le texte intégral de la publication scolaire au format pdf et consulter son résumé en ligne lorsque ces informations sont inclues dans les métadonnées.

Articles de revues sur le sujet "AGC CIRCUITS"

1

Gao, Zhi Qiang, Fu Xiang Huang, Jing Li, Liang Yin et Xiao Wei Liu. « A CMOS Automatic Gain Control Circuit for Biomedical Applications ». Key Engineering Materials 645-646 (mai 2015) : 1308–13. http://dx.doi.org/10.4028/www.scientific.net/kem.645-646.1308.

Texte intégral
Résumé :
In this paper, a low-voltage automatic gain control (AGC) circuits is presented. The proposed circuit uses a novel approximated exponential function to increase the dB-linear output range. The three-stage AGC is fabricated in 0.18μm CMOS technology and shows the maximum gain variation of more than 100dB and a 67dB linear range with linearity error of less than ±1dB. The range of gain variation can be controlled from 34 to 101dB. The AGC dissipates less than 2.3mA under 1.8V supply voltage while occupying 0.4mm2 of chip area.
Styles APA, Harvard, Vancouver, ISO, etc.
2

Pandey, Rajeshwari, Neeta Pandey, Mayank Bothra et Sajal K. Paul. « Operational Transresistance Amplifier-Based Multiphase Sinusoidal Oscillators ». Journal of Electrical and Computer Engineering 2011 (2011) : 1–8. http://dx.doi.org/10.1155/2011/586853.

Texte intégral
Résumé :
Multiphase sinusoidal oscillator circuits are presented which utilize Operational Transresistance Amplifier (OTRA) as the active element. The first circuit producesnodd-phase oscillations of equal amplitudes and equally spaced in phase. The second circuit is capable of producingnodd- or even- phase oscillations equally spaced in phase. An alternative approach is discussed in the third circuit, which utilizes a single-phase tunable oscillator circuit which is used to inject signals into a phase shifter circuits. An automatic gain control (AGC) circuit has been implemented for the second and third circuit. The circuits are simple to realize and have a low component count. PSPICE simulations have been given to verify the theoretical analysis. The experimental outcome corroborates the theoretical propositions and simulated results.
Styles APA, Harvard, Vancouver, ISO, etc.
3

Badger, D. M. « Stability of AGC circuits containing peak detectors ». IEEE Transactions on Consumer Electronics 38, no 3 (1992) : 377–83. http://dx.doi.org/10.1109/30.156710.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
4

Sotner, Roman, Lukas Langhammer, Jan Jerabek, Peter A. Ushakov et Tomas Dostal. « Fractional-Order Phase Shifters with Constant Magnitude Frequency Responses ». Elektronika ir Elektrotechnika 25, no 5 (6 octobre 2019) : 25–30. http://dx.doi.org/10.5755/j01.eie.25.5.24352.

Texte intégral
Résumé :
This contribution presents and experimentally analyzes the idea how to reach the constant magnitude as well as the phase response in the fractional-order (FO) phase when shifting two-ports. The straightforward method employing the automatic gain control circuit (AGC) in a cascade after so-called constant phase block approximating FO integrator or differentiator is studied. The variable gain amplifier utilized in AGC and simple RC-based FO constant phase elements (approximating capacitors with order alpha = 1/4 and alpha = 1/2 as an example) connected in the feedback of operational amplifier-based integrator are established in the experimental setup. The operation indicated in three decades (between 100 Hz and 100 kHz) is evaluated. The known solutions of the standard FO phase shifting circuits are discussed and generally compared with the features obtained in this paper, together with the supposed effects of AGC on their performances.
Styles APA, Harvard, Vancouver, ISO, etc.
5

Fuada, Syifaul, Angga Pratama Putra, Yulian Aska et Trio Adiono. « A First Approach to Design Mobility Function and Noise Filter in VLC System Utilizing Low-cost Analog Circuits ». International Journal of Recent Contributions from Engineering, Science & ; IT (iJES) 5, no 2 (6 juillet 2017) : 14. http://dx.doi.org/10.3991/ijes.v5i2.6700.

Texte intégral
Résumé :
<p class="0abstract">Visible Light Communication (VLC) as one of wireless technology must be able to offer a good capability as mobile communication system. The signal will be faded when the distance and angle of LED to photo-detector become higher at a certain distance. Other problem at VLC system is light interference noise which is caused by flicker effect from other light sources such as incandescent, fluorescent, DC-lamp (i.e. flashlight) and the sunlight. Each of lights have specific carried signal characteristics and it can influences the VLC system. In this paper we offer design of mobile VLC system based on analog domain. We use Automatic Gain Controller (AGC) circuit using commercially available IC and it will be placed at analog front-end receiver side. AGC can self-adjust its gain according to the input signal amplitude. We also design analog filter to eliminate all interferences noise spectrum which is existed under 50 KHz. We design both circuits, analog filter and AGC in VLC receiver system with low-cost. The test data are obtained through the simulation and achieved good results in ideal condition.</p>
Styles APA, Harvard, Vancouver, ISO, etc.
6

Khoury, J. M. « On the design of constant settling time AGC circuits ». IEEE Transactions on Circuits and Systems II : Analog and Digital Signal Processing 45, no 3 (mars 1998) : 283–94. http://dx.doi.org/10.1109/82.664234.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
7

Yu, Min Li, Yan Jun Bi et Hong Xiu Meng. « Design of Digital Storage Oscilloscope Based on FPGA ». Applied Mechanics and Materials 333-335 (juillet 2013) : 2323–26. http://dx.doi.org/10.4028/www.scientific.net/amm.333-335.2323.

Texte intégral
Résumé :
A kind of portable digital storage oscilloscope (DSO) is developed in this paper. It builds trigger, storage, measurement module for embedded system with programmable logic resource of FPGA chip. The external digital circuits of a digital oscilloscope is achieved. And it saves a lot of cost by implanting NIOS II soft-core processor as the control unit of the system in the FPGA. This system has the function of automatic frequency control (AFC) and automatic gain control (AGC), and it can measure the signal conveniently.
Styles APA, Harvard, Vancouver, ISO, etc.
8

MASUDA, T., N. SHIRAMIZU, E. OHUE, K. ODA, R. HAYAMI, M. KONDO, T. ONAI et al. « A SiGe HBT IC CHIPSET for40-Gb/s OPTICAL TRANSMISSION SYSTEMS ». International Journal of High Speed Electronics and Systems 13, no 01 (mars 2003) : 239–63. http://dx.doi.org/10.1142/s0129156403001594.

Texte intégral
Résumé :
Using a 0.2-μm self-aligned epitaxial-growth silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) technology, we have developed a chipset for 40-Gb/s time-division multiplexing optical transmission systems. In this paper, we describe seven analog and digital ICs: a 45-GHz bandwidth transimpedance amplifier, a 48.7-GHz bandwidth automatic-gain-controllable amplifier, a 40-Gb/s decision circuit, a 40-Gb/s full-wave rectifier, a 40-Gb/s limiting amplifier with a 32-dB gain, a 45-Gb/s 1:4 demultiplexer, and a 45-Gb/s 4:1 multiplexer. To increase bandwidth of the transimpedance amplifier, a common-base input stage is introduced. In order to have high gain and wide bandwidth simultaneously, active load circuits composed of a differential transimpedance amplifier are used for the AGC amplifier, the limiting amplifier, and the decision circuit. Full-rate clocking is employed to reduce the influence caused by clock-duty variation in digital circuits such as the decision circuit, the demultiplexer, and the multiplexer. All ICs were characterized by using on-wafer probes, and some of them were built in brass-packages for bit-error rate measurement.
Styles APA, Harvard, Vancouver, ISO, etc.
9

Plyushch, O. H., et V. I. Kravchenko. « Utilization of AGC circuits in signal processing algorithms in adaptive antenna arrays ». Connectivity 142, no 6 (2019) : 52–57. http://dx.doi.org/10.31673/2412-9070.2019.065257.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
10

Bentler, Ruth A., et John A. Nelson. « Assessing Release-Time Options in a Two-Channel AGC Hearing Aid ». American Journal of Audiology 6, no 1 (mars 1997) : 43–51. http://dx.doi.org/10.1044/1059-0889.0601.43.

Texte intégral
Résumé :
The purpose of this study was to determine whether different release times, as implemented in a commercial two-channel AGC hearing aid, would result in differing speech intelligibility performance, user preference, or use time. In experiment one, 14 subjects were fitted with a two-channel multi-memory AGC hearing aid. Four memories were programmed to have identical frequency responses and output limitation characteristics. Only the release times were varied, with the low channel/high channel set as follows (in ms): 20/35, 20/150, 100/35, 500/7. Results obtained from the NST (+5 S/N), magnitude estimations of intelligibility, and data-logging of use time did not show any release-time pair to be superior to any other. In experiment two, 10 subjects participated in a forced-choice, paired-comparison procedure using the same release-time pairs from experiment one. Auditory stimuli consisted of three input levels, consisting of speech, speech in noise, and music. Results indicated no release-time pair to be superior in any listening condition. Results may be explained, in part, by the use of a curvilinear compression circuit and the milder hearing loss exhibited by the subjects. Future investigation of the effect of release-time variation should be carried out on circuits with adjustable compression parameters (and fixed compression ratios) with listeners exhibiting different degrees of hearing loss.
Styles APA, Harvard, Vancouver, ISO, etc.
Plus de sources

Thèses sur le sujet "AGC CIRCUITS"

1

Fletcher, R. G. « Power semiconductor devices in A.C. circuit protection ». Thesis, Imperial College London, 1987. http://hdl.handle.net/10044/1/7921.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
2

Gupta, Narendra Kumar. « Inductive interference into a lineside signalling cable in A.C. electric railway systems ». Thesis, University of Manchester, 1985. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.252792.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
3

Couto, Barone Dante Augusto Mazaré Guy. « Conception d'un circuit intégré arbitre de bus de communication multiprotocoles ABC M / ». S.l. : Université Grenoble 1, 2008. http://tel.archives-ouvertes.fr/tel-00311675.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
4

Gibson, Andrew A. P. « Variational finite element analysis of microwave circuits and gyrotropic components ». Thesis, University of Manchester, 2003. http://www.manchester.ac.uk/escholar/uk-ac-man-scw:98230.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
5

Chen, Jian. « ULTRA LOW POWER READ-OUT INTEGRATED CIRCUIT DESIGN ». Wright State University / OhioLINK, 2012. http://rave.ohiolink.edu/etdc/view?acc_num=wright1345480982.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
6

Pagliarani, Stefano <1978&gt. « Progetto del circuito di lubrificazione di una trattrice agricola ». Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2009. http://amsdottorato.unibo.it/2109/1/Pagliarani_Stefano_tesi.pdf.

Texte intégral
Résumé :
Today the design of hydraulic and lubrication circuits is becoming more and more important. The aim of this study is to develop a methodology for the design of the lubrication circuit of an agricultural tractor. In this paper the lubrication circuit of a continuously variable transmission is analysed. Several lines of the circuit are considered and in particular the lubrication of gears is discussed. The worst possible working condition which corresponds to the highest power dissipation for each part of the transmission is determined. The model of the lubrication circuit is developed with two different software simulations (Automation Studio & Amesim). In order to check the reliability of the simulation models and to characterise the lubrication circuit, experimental tests are performed. The comparison between the values of pressure drops obtained by the models and by the experimental test, demonstrates that it is possible to use these programs for the set up of a simple model of the lubrication circuit. The calculation of oil flows necessary for a force-fed lubrication of the gears, the simulation of the circuit by commercial software, and the validation of the circuit design allow to set up a preliminary equilibrium among the pipes and a proper flow rate distribution. Optimising the circuit design in the initial phase of the project is very important. The experimental adjustment of the circuit, which is often difficult, can be simplified; time and cost production can be reduced.
Styles APA, Harvard, Vancouver, ISO, etc.
7

Pagliarani, Stefano <1978&gt. « Progetto del circuito di lubrificazione di una trattrice agricola ». Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2009. http://amsdottorato.unibo.it/2109/.

Texte intégral
Résumé :
Today the design of hydraulic and lubrication circuits is becoming more and more important. The aim of this study is to develop a methodology for the design of the lubrication circuit of an agricultural tractor. In this paper the lubrication circuit of a continuously variable transmission is analysed. Several lines of the circuit are considered and in particular the lubrication of gears is discussed. The worst possible working condition which corresponds to the highest power dissipation for each part of the transmission is determined. The model of the lubrication circuit is developed with two different software simulations (Automation Studio & Amesim). In order to check the reliability of the simulation models and to characterise the lubrication circuit, experimental tests are performed. The comparison between the values of pressure drops obtained by the models and by the experimental test, demonstrates that it is possible to use these programs for the set up of a simple model of the lubrication circuit. The calculation of oil flows necessary for a force-fed lubrication of the gears, the simulation of the circuit by commercial software, and the validation of the circuit design allow to set up a preliminary equilibrium among the pipes and a proper flow rate distribution. Optimising the circuit design in the initial phase of the project is very important. The experimental adjustment of the circuit, which is often difficult, can be simplified; time and cost production can be reduced.
Styles APA, Harvard, Vancouver, ISO, etc.
8

Kandala, Veera Raghavendra Sai Mallik. « ENERGY EFFICIENT CIRCUIT TECHNIQUES FOR SUCCESSIVE APPROXIMATION REGISTER ADC ». OpenSIUC, 2012. https://opensiuc.lib.siu.edu/dissertations/539.

Texte intégral
Résumé :
Charge-scaling (CS) successive approximation register (SAR) ADC's are widely used in the design of low power electronics. Significant portions of CS-SAR ADC power are consumed by CS capacitor arrays and comparator circuits. This Dissertation presents circuit techniques to reduce the power consumption of both CS capacitor array and the latch comparator during ADC operations. The impacts of the proposed techniques on ADC accuracies are analyzed and circuit techniques are presented to address the accuracy concerns. The dissertation also presents techniques to cope with capacitor mismatches, which becomes more significant with the use of very small unit capacitors in the CS array. These techniques rely on a novel programmable CS capacitor array that allow optimally grouping the unit capacitors. Based on a 0.13um CMOS technology the proposed techniques are verified with extensive circuit simulation. Post layout simulations are done to evaluate the proposed techniques for energy efficient CS capacitor array.
Styles APA, Harvard, Vancouver, ISO, etc.
9

Li, Yu. « Redressing timing issues for speed-independent circuits in deep sub-micron age ». Thesis, University of Newcastle Upon Tyne, 2012. http://hdl.handle.net/10443/1793.

Texte intégral
Résumé :
With continued advancement in semiconductor manufacturing tech- nologies, process variations become more and more severe. These variations not only impair circuit performance but may also cause po- tential hazards in integrated circuits (IC). Asynchronous IC design, which does not rely on the use of an explicit clock, is more robust to process variations compared to synchronous design and is suggested to be a promising design approach in deep-submicron age, especially for low-power or harsh environment applications. However, the correctness of asynchronous circuits is also becoming challenged by the shrinking technology. The increased wire delays compared to gate delays and threshold variations could bring glitches into the circuit. This work proposes a method to generate a set of su cient timing constraints for a given speed-independent circuit to work correctly when the isochronic fork timing assumption is lifted into a weaker timing assumption. The complexity of the entire process is polyno- mial to the number of gates. The generated timing constraints are relative orderings between the transition events at the input of each gate and the circuit is guaranteed to work correctly by ful lling these constraints under the timing assumption. The benchmarks show that both the number of total constraints and the constraints that are only needed to eliminate strong adversary paths are reduced by around 40% compared to those suggested in the current literature, thus claiming the weakest formally proved condi- tions.
Styles APA, Harvard, Vancouver, ISO, etc.
10

Malloug, Hani. « Conception de générateurs sinusoïdaux embarqués pour l'auto-test des circuits mixtes ». Thesis, Université Grenoble Alpes (ComUE), 2018. http://www.theses.fr/2018GREAT069/document.

Texte intégral
Résumé :
Développer un générateur de signal analogique efficace est un élément clés pour les BIST des circuits analogiques et mixtes afin de produire le stimulus de test approprié, et remplacer les générateurs de signaux externes couteux dans les protocoles de standard de test fonctionnel analogique et mixte. Dans cette optique, nous présentons dans cette thèse des stratégies différentes de génération de signal sinusoïdal, basées sur les techniques d’annulation d’harmonique, pour le design d’un synthétiseur embarqué de signal sinusoïdal à haute fréquence. Les générateurs proposés utilisent des circuits numériques pour produire un ensemble de signaux carrés déphasés. Ces signaux carrés sont pondérés et combinés en appliquant différentes stratégies d’annulation d’harmonique dans un convertisseur numérique-analogique simplifié. Le générateur sélectionné permet d’annuler toutes les harmoniques en dessous de la 11ème. De plus, une simple stratégie de calibration a été conçue pour compenser l’effet de mismatch et de la variation de process de fabrication sur l’efficacité de la technique d’annulation d’harmonique. La simplicité du circuit rend cette approche adaptable pour le BIST des circuits intégrés analogique et mixte. Les modèles comportementaux, les simulations électriques d’un design en 28nm FDSOI et les résultats expérimentaux sont fournis pour valider la fonctionnalité du générateur proposé. Les résultats obtenus montrent des performances du circuit calibré autour de 52dB de SFDR pour un signal généré à 166MHz
One of the main key points to enable mixed-signal BIST solutions is the development of efficient on-chip analog signal generators that can provide appropriate test stimuli and replace costly external signal generators in standard analog and mixed-signal functional test protocols. In this line, we present in this thesis different sinewave generation strategies based on harmonic cancellation techniques to design a high-frequency on-chip sinusoidal synthetize. The proposed generators employ digital hardware to provide a set of phase-shifted digital square-wave signals. These square-wave signals are scaled and combined using different harmonic cancellation strategies in a simplified current-steering DAC. The selected generator allows the cancellation of all harmonic components up to the eleventh. Additionally, a simple calibration strategy has been devised to compensate the impact of process variations and mismatch on the effectiveness of the harmonic cancellation. The simplicity of the circuitry makes this approach suitable for mixed-signal BIST applications. Electrical simulations of a 28nm FDSOI design and experimental results are provided to validate the functionality of the proposed signal generator. Obtained results show a calibrated performance around 52dB of SFDR for a generated sinusoidal signal at 166 MHz
Styles APA, Harvard, Vancouver, ISO, etc.
Plus de sources

Livres sur le sujet "AGC CIRCUITS"

1

Demystifying Switched-Capacitor Circuits. Amsterdam : Newnes (Elsevier), 2006.

Trouver le texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
2

Warren, Jean. ABC circus. Everett, Wash : Warren Pub. House, 1991.

Trouver le texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
3

Dreamer, Sue. Circus ABC. Boston : Little, Brown, 1985.

Trouver le texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
4

Yih-Fang, Huang, Wei Che-Ho, Institute of Electrical and Electronics Engineers. et IEEE International Symposium on Circuits and Systems (1997 : Hong Kong), dir. Circuits and systems in the information age. New York : Institute of Electrical and Electronics Engineers, 1997.

Trouver le texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
5

Gender circuits : Bodies and identities in a technological age. New York, NY : Routledge, 2010.

Trouver le texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
6

Shapiro, Eve. Gender circuits : Bodies and identities in a technological age. New York, NY : Routledge, 2010.

Trouver le texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
7

ABC is for circus. [United States] : Ammo Books, 2015.

Trouver le texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
8

Ali, H. M. J. Static model of an A.C. circuit breaker. Manchester : UMIST, 1994.

Trouver le texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
9

Stuart, Thomas A. A study of ignition and simulation circuits for arcjet thrusters. [Washington, DC : U.S. National Aeronautics and Space Administration, 1991.

Trouver le texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
10

Stuart, Thomas A. A study of ignition and simulation circuits for arcjet thrusters. [Washington, DC : U.S. National Aeronautics and Space Administration, 1991.

Trouver le texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
Plus de sources

Chapitres de livres sur le sujet "AGC CIRCUITS"

1

Oh, Taehyoun, et Ramesh Harjani. « Adaptive XTCR, AGC, and Adaptive DFE Loop ». Dans High Performance Multi-Channel High-Speed I/O Circuits, 47–67. New York, NY : Springer New York, 2013. http://dx.doi.org/10.1007/978-1-4614-4963-8_4.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
2

Alam, Shahbaz. « Design of AGC circuits for oscillator using current conveyor based translinear loops ». Dans Recent Trends in Communication and Electronics, 349–54. London : CRC Press, 2021. http://dx.doi.org/10.1201/9781003193838-63.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
3

Dugdale, David. « A.C. Circuits ». Dans Essentials of electromagnetism, 231–72. London : Macmillan Education UK, 1993. http://dx.doi.org/10.1007/978-1-349-22780-8_10.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
4

Morris, Noel M., et Frank W. Senior. « A.C. Series and Parallel Circuits ». Dans Electric Circuits, 99–120. London : Macmillan Education UK, 1991. http://dx.doi.org/10.1007/978-1-349-11232-6_5.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
5

Palani, Rakesh Kumar, et Ramesh Harjani. « ADC ». Dans Analog Circuits and Signal Processing, 103–21. Cham : Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-46628-6_7.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
6

Morris, Noel M. « Poly-Phase a.c. Circuits ». Dans Mastering Electrical Engineering, 257–70. London : Macmillan Education UK, 1985. http://dx.doi.org/10.1007/978-1-349-18015-8_13.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
7

Bird, John. « Power in a.c. circuits ». Dans Bird's Electrical Circuit Theory and Technology, 491–506. 7e éd. London : Routledge, 2021. http://dx.doi.org/10.1201/9781003130338-33.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
8

Morris, Noel M. « Poly-Phase a.c. Circuits ». Dans Mastering Electrical Engineering, 257–70. London : Macmillan Education UK, 1991. http://dx.doi.org/10.1007/978-1-349-12230-1_13.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
9

Pointon, A. J., et H. M. Howarth. « Coupled circuits ». Dans AC and DC Network Theory, 90–105. Dordrecht : Springer Netherlands, 1991. http://dx.doi.org/10.1007/978-94-011-3142-1_8.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
10

Li, Weitao, Fule Li et Zhihua Wang. « ADC Architecture ». Dans Analog Circuits and Signal Processing, 9–45. Cham : Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-62012-1_2.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.

Actes de conférences sur le sujet "AGC CIRCUITS"

1

Erbes, Andreja, Xueyong Wei et Ashwin A. Seshia. « MEMS-based mechanical AGC for oscillator circuits ». Dans 2013 Joint European Frequency and Time Forum & International Frequency Control Symposium (EFTF/IFC). IEEE, 2013. http://dx.doi.org/10.1109/eftf-ifc.2013.6702052.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
2

Xie, Michael, Sangtak Park, Eihab Abdel-Rahman et Mustafa Yavuz. « Actuation of a Frequency Modulated MEMS Gyroscope ». Dans ASME 2014 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. American Society of Mechanical Engineers, 2014. http://dx.doi.org/10.1115/detc2014-34817.

Texte intégral
Résumé :
This paper describes an analog actuation circuit for a novel frequency-modulated MEMS gyroscope. The circuit provides an amplitude-modulated (AM) signal as the input into a RLC resonant drive circuit, which drives the gyroscope. The actuation system is composed an automatic gain control (AGC) loop, a low pass filter, an amplitude modulation component and a resonant drive circuit. The AM signal is composed of a modulating signal that excite a natural frequency of gyroscope drive mode and a carrier signal with a frequency corresponding to the electrical resonant frequency of the RLC circuit. Both feedforward and feedback AGC configurations are used to stabilize the envelope of the signal. However, the breadboard implementations of the feedforward and feedback circuits in their current configurations have similar signal to noise ratio to that of the function generator. To improve the actuation circuit performance, we plan to include the resonant drive circuit within the AGC feedback loop and implement the actuation circuit on PCB.
Styles APA, Harvard, Vancouver, ISO, etc.
3

Tran, Fung et Scott. « Automatic gain control (AGC) circuit for high density BiCMOS SRAM ». Dans 1993 Symposium on VLSI Circuits. IEEE, 1989. http://dx.doi.org/10.1109/vlsic.1989.1037494.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
4

Zhou Ning et Zai-ming Li. « An improved analog AGC for TD-SCDMA receiver ». Dans 2007 5th International Conference on Communications, Circuits and Systems. IEEE, 2007. http://dx.doi.org/10.1109/icccas.2007.4348141.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
5

Liao Ji-chang et He Song-bai. « An improved analog AGC for TD-SCDMA receiver ». Dans 2007 5th International Conference on Communications, Circuits and Systems. IEEE, 2007. http://dx.doi.org/10.1109/icccas.2007.6250059.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
6

Alegre, J. P., B. Calvo, S. Celma et F. Aznar. « CMOS combined feedforward/feedback AGC circuit for VHF applications ». Dans 2010 53rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 2010. http://dx.doi.org/10.1109/mwscas.2010.5548721.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
7

Han, Wei, Shan Wang et Bo Yang. « Design and implementation of AGC algorithm circuit for high PAPR signal ». Dans 2016 International Conference on Integrated Circuits and Microsystems (ICICM). IEEE, 2016. http://dx.doi.org/10.1109/icam.2016.7813553.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
8

Akkaya, Ayca, Firat Celik, Armin Tajalli et Yusuf Leblebici. « A 10b SAR ADC with Widely Scalable Sampling Rate and AGC Amplifier Front-End ». Dans 2018 IEEE Nordic Circuits and Systems Conference (NORCAS) : NORCHIP and International Symposium of System-on-Chip (SoC). IEEE, 2018. http://dx.doi.org/10.1109/norchip.2018.8573505.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
9

Nauta, Henk C., et Ernst H. Nordholt. « High-Performance Audio Amplifier with AGC Control and Signal Clipping for Portable Military Radio ». Dans Twelfth European Solid-State Circuits Conference. IEEE, 1986. http://dx.doi.org/10.1109/esscirc.1986.5468314.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
10

Maxim, A., M. Gheorge et C. Turinici. « Zero-Second-IF SiGe BiCMOS Satellite Radio Tuner Using a Dual RF/IF AGC Loop ». Dans 2007 IEEE Symposium on VLSI Circuits. IEEE, 2007. http://dx.doi.org/10.1109/vlsic.2007.4342722.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.

Rapports d'organisations sur le sujet "AGC CIRCUITS"

1

Weinschenk, Craig, Daniel Madrzykowski et Paul Courtney. Impact of Flashover Fire Conditions on Exposed Energized Electrical Cords and Cables. UL Firefighter Safety Research Institute, octobre 2019. http://dx.doi.org/10.54206/102376/hdmn5904.

Texte intégral
Résumé :
A set of experiments was conducted to expose different types of energized electrical cords for lamps, office equipment, and appliances to a developing room fire exposure. All of the cords were positioned on the floor and arranged in a manner to receive a similar thermal exposure. Six types of cords commonly used as power supply cords, extension cords, and as part of residential electrical wiring systems were chosen for the experiments. The non-metallic sheathed cables (NMB) typically found in residential electrical branch wiring were included to provide a link to previous research. The basic test design was to expose the six different types of cords, on the floor of a compartment to a growing fire to determine the conditions under which the cord would trip the circuit breaker and/or undergo an arc fault. All of the cords would be energized and installed on a non-combustible surface. Six cord types (18-2 SPT1, 16-3 SJTW, 12-2 NM-B, 12-3 NM-B, 18-3 SVT, 18-2 NISPT-2) and three types of circuit protection (Molded case circuit breaker (MCCB), combination Arc-fault circuit interrupter (AFCI), Ground-fault circuit interrupter (GFCI)) were exposed to six room-scale fires. The circuit protection was remote from the thermal exposure. The six room fires consisted of three replicate fires with two sofas as the main fuel source, two replicate fires with one sofa as the main fuel source and one fire with two sofas and MDF paneling on three walls in the room. Each fuel package was sufficient to support flashover conditions in the room and as a result, the impact on the cords and circuit protection was not significantly different. The average peak heat release rate of the sofa fueled compartment fires with gypsum board ceiling and walls was 6.8 MW. The addition of vinyl covered MDF wall paneling on three of the compartment walls increased the peak heat release rate to 12 MW, although most of the increased energy release occurred outside of the compartment opening. In each experiment during post flashover exposure, the insulation on the cords ignited and burned through, exposing bare conductor. During this period the circuits faulted. The circuit protection devices are not designed to provide thermal protection, and, thus, were installed remote from the fire. The devices operated as designed in all experiments. All of the circuit faults resulted in either a magnetic trip of the conventional circuit breaker or a ground-fault trip in the GFCI or AFCI capable circuit protection devices. Though not required by UL 1699, Standard for Safety for Arc-Fault Circuit-Interrupters as the solution for detection methodology, the AFCIs used had differential current detection. Examination of signal data showed that the only cord types that tripped with a fault to ground were the insulated conductors in non-metallic sheathed cables (12-2 NM-B and 12-3 NM-B). This was expected due to the bare grounding conductor present. Assessments of both the thermal exposure and physical damage to the cords did not reveal any correlation between the thermal exposure, cord damage, and trip type.
Styles APA, Harvard, Vancouver, ISO, etc.
2

Johnson, Jay Dean, Armando J. Fresquez, Bob Gudgel et Andrew Meares. Series and parallel arc-fault circuit interrupter tests. Office of Scientific and Technical Information (OSTI), juillet 2013. http://dx.doi.org/10.2172/1092992.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
3

Subudhi, M., W. Shier et E. MacDougall. Age-related degradation of Westinghouse 480-volt circuit breakers. Office of Scientific and Technical Information (OSTI), juillet 1990. http://dx.doi.org/10.2172/7028755.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
4

Biswas, Gautam, Daniel Schwartz, Bharat Bhuva, John Bransford et Daniel Holton. Assessing Problem Solving Skills in Understanding and Troubleshooting AC Circuits. Fort Belvoir, VA : Defense Technical Information Center, décembre 2001. http://dx.doi.org/10.21236/ada401285.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
5

Winslow, Joshua. Circuitry Design for ChIMES AC Drive Coil. Office of Scientific and Technical Information (OSTI), novembre 2020. http://dx.doi.org/10.2172/1808487.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
6

Johnson, Jay Dean, Scott S. Kuszmaul, Jason E. Strauch et David Alan Schoenwald. Creating dynamic equivalent PV circuit models with impedance spectroscopy for arc-fault modeling. Office of Scientific and Technical Information (OSTI), juin 2011. http://dx.doi.org/10.2172/1020514.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
7

Mei, Ting, Andy Huang, Heidi Thornquist, Peter Sholander et Jason Verley. Prediction of Circuit Response to an Electromagnetic Environment ; ASC IC FY20 Milestone 7179. Office of Scientific and Technical Information (OSTI), septembre 2020. http://dx.doi.org/10.2172/1663259.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
8

Martzloff, Francois D. Surge protection in low-voltage AC power circuits - an anthology, part 1 - annotated bibliography. Gaithersburg, MD : National Institute of Standards and Technology, 2001. http://dx.doi.org/10.6028/nist.ir.6714-1.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
9

TOWNE, C. M. SHORT CIRCUIT COORDINATION STUDY & ; ARC FLASH EVALUATION FOR LIQUID PROCESSING & ; CAPSULE STORAGE 310 FACILITY. Office of Scientific and Technical Information (OSTI), décembre 2003. http://dx.doi.org/10.2172/821674.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
10

Martzloff, Francois D. Surge protection in low-voltage AC power circuits - an anthology, part 2 - development of standards reality checks. Gaithersburg, MD : National Institute of Standards and Technology, 2002. http://dx.doi.org/10.6028/nist.ir.6714-2.

Texte intégral
Styles APA, Harvard, Vancouver, ISO, etc.
Vous pouvez également être intéressé par les bibliographies sur le sujet « AGC CIRCUITS » pour d’autres types de sources :
Articles de revues Thèses Livres
Nous offrons des réductions sur tous les plans premium pour les auteurs dont les œuvres sont incluses dans des sélections littéraires thématiques. Contactez-nous pour obtenir un code promo unique!

Vers la bibliographie