Littérature scientifique sur le sujet « 16-Bit float »
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Articles de revues sur le sujet "16-Bit float"
Hao, Xin, Changxing Lin et Qiuyu Wu. « A Parallel Timing Synchronization Structure in Real-Time High Transmission Capacity Wireless Communication Systems ». Electronics 9, no 4 (16 avril 2020) : 652. http://dx.doi.org/10.3390/electronics9040652.
Texte intégralMaria, Kovaci, et Balta Horia. « A Study on Turbo Coded 16-QAM Bit Allocation in Rice Flat Fading Channel ». Procedia Computer Science 56 (2015) : 300–308. http://dx.doi.org/10.1016/j.procs.2015.07.212.
Texte intégralIslam, Md Matiqul, Md Ashraful Islam, Md Kamal Uddin et Sujan Chandra Roy. « Performance evaluation of polar coded neural demapper based 5G MIMO communication system by varying antenna size ». Multidisciplinary Science Journal 5, no 3 (18 mai 2023) : 2023028. http://dx.doi.org/10.31893/multiscience.2023028.
Texte intégralReis, M., M. Felizardo, A. C. Fernandes, A. Kling, T. Morlat et J. G. Marques. « Acoustic instrumentation for a bubble chamber towards dark matter searches ». E3S Web of Conferences 88 (2019) : 01002. http://dx.doi.org/10.1051/e3sconf/20198801002.
Texte intégralCococcioni, Marco, Federico Rossi, Emanuele Ruffaldi et Sergio Saponara. « Fast Approximations of Activation Functions in Deep Neural Networks when using Posit Arithmetic ». Sensors 20, no 5 (10 mars 2020) : 1515. http://dx.doi.org/10.3390/s20051515.
Texte intégralEl-Tarhuni, Mohamed, Mohamed Hassan et Akram Bin Sediq. « A Jointly Optimized VariableM-QAM and Power Allocation Scheme for Image Transmission ». Journal of Computer Networks and Communications 2012 (2012) : 1–14. http://dx.doi.org/10.1155/2012/642649.
Texte intégralAlimohammad, Amirhossein, Saeed Fouladi Fard et Bruce F. Cockburn. « Filter-Based Fading Channel Modeling ». Modelling and Simulation in Engineering 2012 (2012) : 1–10. http://dx.doi.org/10.1155/2012/705078.
Texte intégralAl-Batran, Salah-Eddin, Ralf Dieter Hofheinz, Harald Schmalenberg, Dirk Strumberg, Eray Goekkurt, Stefan Angermeier, Thomas Zander et al. « Perioperative ramucirumab in combination with FLOT versus FLOT alone for resectable esophagogastric adenocarcinoma (RAMSES/FLOT7) : Results of the phase II-portion—A multicenter, randomized phase II/III trial of the German AIO and Italian GOIM. » Journal of Clinical Oncology 38, no 15_suppl (20 mai 2020) : 4501. http://dx.doi.org/10.1200/jco.2020.38.15_suppl.4501.
Texte intégralQatawneh, Ibrahim. « Bit Error Rate Performance of Ofdm Utilising Differentially Encoded 16 Star Qam with Differentially Coherent Demodulation in Awgn, Frequency Flat and Two-Path Fading Channels.(Dept.E) ». MEJ. Mansoura Engineering Journal 27, no 3 (24 janvier 2021) : 37–48. http://dx.doi.org/10.21608/bfemu.2021.142709.
Texte intégralGoetze, Thorsten Oliver, Ralf-Dieter Hofheinz, Harald Schmalenberg, Dirk Strumberg, Eray Goekkurt, Stefan Angermeier, Thomas Zander et al. « Perioperative ramucirumab in combination with FLOT versus FLOT alone for resectable esophagogastric adenocarcinoma (RAMSES/FLOT7) with high rate of signet cell component : Final results of the multicenter, randomized phase II/III trial of the German AIO and Italian GOIM. » Journal of Clinical Oncology 40, no 16_suppl (1 juin 2022) : 4042. http://dx.doi.org/10.1200/jco.2022.40.16_suppl.4042.
Texte intégralThèses sur le sujet "16-Bit float"
Romera, Thomas. « Adéquation algorithme architecture pour flot optique sur GPU embarqué ». Electronic Thesis or Diss., Sorbonne université, 2023. http://www.theses.fr/2023SORUS450.
Texte intégralThis thesis focus on the optimization and efficient implementation of pixel motion (optical flow) estimation algorithms on embedded graphics processing units (GPUs). Two iterative algorithms have been studied: the Total Variation - L1 (TV-L1) method and the Horn-Schunck method. The primary objective of this work is to achieve real-time processing, with a target frame processing time of less than 40 milliseconds, on low-power platforms, while maintaining acceptable image resolution and flow estimation quality for the intended applications. Various levels of optimization strategies have been explored. High-level algorithmic transformations, such as operator fusion and operator pipelining, have been implemented to maximize data reuse and enhance spatial/temporal locality. Additionally, GPU-specific low-level optimizations, including the utilization of vector instructions and numbers, as well as efficient memory access management, have been incorporated. The impact of floating-point number representation (single-precision versus half-precision) has also been investigated. The implementations have been assessed on Nvidia's Jetson Xavier, TX2, and Nano embedded platforms in terms of execution time, power consumption, and optical flow accuracy. Notably, the TV-L1 method exhibits higher complexity and computational intensity compared to Horn-Schunck. The fastest versions of these algorithms achieve a processing rate of 0.21 nanoseconds per pixel per iteration in half-precision on the Xavier platform, representing a 22x time reduction over efficient and parallel CPU versions. Furthermore, energy consumption is reduced by a factor of x5.3. Among the tested boards, the Xavier embedded platform, being both the most powerful and the most recent, consistently delivers the best results in terms of speed and energy efficiency. Operator merging and pipelining have proven to be instrumental in improving GPU performance by enhancing data reuse. This data reuse is made possible through GPU Shared memory, which is a small, high-speed memory that enables data sharing among threads within the same GPU thread block. While merging multiple iterations yields performance gains, it is constrained by the size of the Shared memory, necessitating trade-offs between resource utilization and speed. The adoption of half-precision numbers accelerates iterative algorithms and achieves superior optical flow accuracy within the same time frame compared to single-precision counterparts. Half-precision implementations converge more rapidly due to the increased number of iterations possible within a given time window. Specifically, the use of half-precision numbers on the best GPU architecture accelerates execution by up to x2.2 for TV-L1 and x3.7 for Horn-Schunck. This work underscores the significance of both GPU-specific optimizations for computer vision algorithms, along with the use and study of reduced floating point numbers. They pave the way for future enhancements through new algorithmic transformations, alternative numerical formats, and hardware architectures. This approach can potentially be extended to other families of iterative algorithms
Chapitres de livres sur le sujet "16-Bit float"
Pournelle, Jerry. « Buying a Computer ». Dans 1001 Computer Words You Need to Know. Oxford University Press, 2004. http://dx.doi.org/10.1093/oso/9780195167757.003.0011.
Texte intégralAtkins, Peter. « Networking Opportunities : The Friedel Crafts Reaction ». Dans Reactions. Oxford University Press, 2011. http://dx.doi.org/10.1093/oso/9780199695126.003.0027.
Texte intégralActes de conférences sur le sujet "16-Bit float"
Franco, Nata, Mauricio Corona, Andres Davila, Uttam Aswal, Mohammed Aljuzayri, Sarah Albanawi, Edison Barrera, Aldia Syamsudhuha, Murtada AlHassan et Maksim Antonov. « Technical Challenges and Technology Deployment of First 16 ? CWD Jobs with Stage-Cementing Tool : Deepest and Longest Runs in the Region ». Dans SPE/IADC Middle East Drilling Technology Conference and Exhibition. SPE, 2023. http://dx.doi.org/10.2118/214589-ms.
Texte intégralSusin, Matheus M., et Lucas Wanner. « Approximate Reciprocal Square Root with Single - and Half-Precision Floats ». Dans Escola Regional de Alto Desempenho de São Paulo. Sociedade Brasileira de Computação, 2018. http://dx.doi.org/10.5753/eradsp.2018.13600.
Texte intégralOmara, Ahmed, Hector Alba, Faisal Al Yarroby, Ahmed Al Abri et Riyad Al Habsi. « A Unique Engineering Approach in Horizontal Drilling Through Unconsolidated Formations to Minimize Time and Cost Using High-Build-Rate Rotary Steerable Systems in Sultanate of Oman ». Dans SPE/IADC Middle East Drilling Technology Conference and Exhibition. SPE, 2021. http://dx.doi.org/10.2118/202095-ms.
Texte intégralLall, Pradeep, et Kartik Goyal. « Reliability of SAC 305 Solder Interconnects on Double-Sided Flexible Printed Circuit Board Using X-Ray Micro-CT ». Dans ASME 2017 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems collocated with the ASME 2017 Conference on Information Storage and Processing Systems. American Society of Mechanical Engineers, 2017. http://dx.doi.org/10.1115/ipack2017-74264.
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