Bibliografías temáticas / Tunneling field effect transistor

Literatura académica sobre el tema "Tunneling field effect transistor"

Autor: Grafiati
Publicado: 6 de septiembre de 2023
Última modificación: 7 de septiembre de 2023

Crea una cita precisa en los estilos APA, MLA, Chicago, Harvard y otros

Elija tipo de fuente:

Índice

Consulte las listas temáticas de artículos, libros, tesis, actas de conferencias y otras fuentes académicas sobre el tema "Tunneling field effect transistor".

Junto a cada fuente en la lista de referencias hay un botón "Agregar a la bibliografía". Pulsa este botón, y generaremos automáticamente la referencia bibliográfica para la obra elegida en el estilo de cita que necesites: APA, MLA, Harvard, Vancouver, Chicago, etc.

También puede descargar el texto completo de la publicación académica en formato pdf y leer en línea su resumen siempre que esté disponible en los metadatos.

Artículos de revistas sobre el tema "Tunneling field effect transistor"

1

Hähnel, D., M. Oehme, M. Sarlija, A. Karmous, M. Schmid, J. Werner, O. Kirfel, I. Fischer y J. Schulze. "Germanium vertical Tunneling Field-Effect Transistor". Solid-State Electronics 62, n.º 1 (agosto de 2011): 132–37. http://dx.doi.org/10.1016/j.sse.2011.03.011.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
2

Chou, S. Y., J. S. Harris y R. F. W. Pease. "Lateral resonant tunneling field‐effect transistor". Applied Physics Letters 52, n.º 23 (6 de junio de 1988): 1982–84. http://dx.doi.org/10.1063/1.99656.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
3

GHOREISHI, SEYED SALEH, KAMYAR SAGHAFI y MOHAMMAD KAZEM MORAVVEJ-FARSHI. "A NOVEL GRAPHENE NANO-RIBBON FIELD EFFECT TRANSISTOR WITH SCHOTTKY TUNNELING DRAIN AND OHMIC TUNNELING SOURCE". Modern Physics Letters B 27, n.º 26 (10 de octubre de 2013): 1350189. http://dx.doi.org/10.1142/s0217984913501893.

Texto completo
Resumen
In this paper, we propose a novel tunneling graphene nanoribbon field effect transistor by modification of the conventional structure in a way that its drain high-doped extension part is replaced by lightly linear doped region. Then the proposed structure has a Schottky contact at the drain side. As the source contact is ohmic and the drain contact is Schottky, this structure is called Schottky–Ohmic tunneling graphene nanoribbon field effect transistor. Electrical behaviors of the proposed device are investigated by mode space nonequilibrium Green's function (NEGF) formalism in the ballistic limit. Simulation results show that without increasing transistor length, I OFF , I ON /I OFF , ambipolar behavior, delay time and PDP of the proposed structure improve, in comparison with the conventional tunneling graphene nanoribbon field effect transistor with the same dimension. Also subthreshold swing which is one of the evident characteristics of the tunneling FET is preserved in this structure.
Los estilos APA, Harvard, Vancouver, ISO, etc.
4

Oh, Jong Hyeok y Yun Seop Yu. "Investigation of Tunneling Effect for a N-Type Feedback Field-Effect Transistor". Micromachines 13, n.º 8 (16 de agosto de 2022): 1329. http://dx.doi.org/10.3390/mi13081329.

Texto completo
Resumen
In this paper, the tunneling effect for a N-type feedback field-effect transistor (NFBFET) was investigated. The NFBFET has highly doped N-P junction in the channel region. When drain-source voltage is applied at the NFBFET, the aligning between conduction band of N-region and valence band of P-region occur, and band-to-band tunneling (BTBT) current can be formed on surface region of N-P junction in the channel of the NFBFET. When the doping concentration of gated-channel region (Ngc) is 4 × 1018 cm−3, the tunneling current makes off-currents increase approximately 104 times. As gate-source voltage is applied to NFBFET, the tunneling rate decreases owing to reducing of aligned region between bands by stronger gate-field. Eventually, the tunneling currents are vanished at the BTBT vanishing point before threshold voltage. When Ngc increase from 4 × 1018 to 6 × 1018, the tunneling current is generated not only at the surface region but also at the bulk region. Moreover, the tunneling length is shorter at the surface and bulk regions, and hence the leakage currents more increase. The BTBT vanishing point also increases due to increase of tunneling rates at surface and bulk region as Ngc increases.
Los estilos APA, Harvard, Vancouver, ISO, etc.
5

Capasso, Federico, Susanta Sen y Alfred Y. Cho. "Negative transconductance resonant tunneling field‐effect transistor". Applied Physics Letters 51, n.º 7 (17 de agosto de 1987): 526–28. http://dx.doi.org/10.1063/1.98387.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
6

Ismail, K., D. A. Antoniadis y H. I. Smith. "A planar resonant-tunneling field-effect transistor". IEEE Transactions on Electron Devices 36, n.º 11 (noviembre de 1989): 2617. http://dx.doi.org/10.1109/16.43732.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
7

YOUSEFI, REZA y SEYED SALEH GHOREYSHI. "NUMERICAL STUDY OF OHMIC-SCHOTTKY CARBON NANOTUBE FIELD EFFECT TRANSISTOR". Modern Physics Letters B 26, n.º 15 (17 de mayo de 2012): 1250096. http://dx.doi.org/10.1142/s0217984912500960.

Texto completo
Resumen
MOS-like transistors are one of the transistor topologies based on the carbon nanotubes. Some modified structures have been proposed to improve their electrical characteristics, such as band to band tunneling (BTBT) and switching behavior. Unfortunately, most of them increase the transistor length due to the use of additional regions. In this paper, we propose a structure that improves the OFF state and switching behavior of the transistor without increase in the transistor length. The proposed structure is constructed by a modification of the conventional structure in a way that its drain high-doped extension part is replaced by a lightly linear doped region. Then, the proposed structure has a Schottky contact at the drain side. With a nonequilibrium Green's function (NEGF) formalism, we have studied the characteristics of the proposed device and compared them with those obtained by a conventional structure with the same channel length. The results show that the proposed structure enjoys from better switching characteristics and OFF-state behavior, especially at low currents, in comparison to the main structure and, as a result, can be a good candidate for the low-power applications.
Los estilos APA, Harvard, Vancouver, ISO, etc.
8

Abdul-Kadir, Firas Natheer, Yasir Hashim, Muhammad Nazmus Shakib y Faris Hassan Taha. "Electrical characterization of si nanowire GAA-TFET based on dimensions downscaling". International Journal of Electrical and Computer Engineering (IJECE) 11, n.º 1 (1 de febrero de 2021): 780. http://dx.doi.org/10.11591/ijece.v11i1.pp780-787.

Texto completo
Resumen
This research paper explains the effect of the dimensions of Gate-all-around Si nanowire tunneling field effect transistor (GAA Si-NW TFET) on ON/OFF current ratio, drain induces barrier lowering (DIBL), sub-threshold swing (SS), and threshold voltage (VT). These parameters are critical factors of the characteristics of tunnel field effect transistors. The Silvaco TCAD has been used to study the electrical characteristics of Si-NW TFET. Output (gate voltage-drain current) characteristics with channel dimensions were simulated. Results show that 50nm long nanowires with 9nm-18nm diameter and 3nm oxide thickness tend to have the best nanowire tunnel field effect transistor (Si-NW TFET) characteristics.
Los estilos APA, Harvard, Vancouver, ISO, etc.
9

Peng-Fei Guo, Li-Tao Yang, Yue Yang, Lu Fan, Gen-Quan Han, G. S. Samudra y Yee-Chia Yeo. "Tunneling Field-Effect Transistor: Effect of Strain and Temperature on Tunneling Current". IEEE Electron Device Letters 30, n.º 9 (septiembre de 2009): 981–83. http://dx.doi.org/10.1109/led.2009.2026296.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
10

Kim, Hyun Woo y Daewoong Kwon. "Analysis on Tunnel Field-Effect Transistor with Asymmetric Spacer". Applied Sciences 10, n.º 9 (27 de abril de 2020): 3054. http://dx.doi.org/10.3390/app10093054.

Texto completo
Resumen
Tunnel field-effect transistor (Tunnel FET) with asymmetric spacer is proposed to obtain high on-current and reduced inverter delay simultaneously. In order to analyze the proposed Tunnel FET, electrical characteristics are evaluated by technology computer-aided design (TCAD) simulations with calibrated tunneling model parameters. The impact of the spacer κ values on tunneling rate is investigated with the symmetric spacer. As the κ values of the spacer increase, the on-current becomes enhanced since tunneling probabilities are increased by the fringing field through the spacer. However, on the drain-side, that fringing field through the drain-side spacer increases ambipolar current and gate-to-drain capacitance, which degrades leakage property and switching response. Therefore, the drain-side low-κ spacer, which makes the low fringing field, is adapted asymmetrically with the source-side high-κ spacer. This asymmetric spacer results in the reduction of gate-to-drain capacitance and switching delay with the improved on-current induced by the source-side high-κ spacer.
Los estilos APA, Harvard, Vancouver, ISO, etc.
Más fuentes

Tesis sobre el tema "Tunneling field effect transistor"

1

Nirschl, Thomas [Verfasser]. "Circuit Applications of the Tunneling Field Effect Transistor (TFET) / Thomas Nirschl". Aachen : Shaker, 2007. http://d-nb.info/1166512053/34.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
2

Chou, Mike Chuan 1969. "Process development for a silicon planar resonant-tunneling field-effect transistor". Thesis, Massachusetts Institute of Technology, 1994. http://hdl.handle.net/1721.1/34047.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
3

Shao, Ye. "Study of wide bandgap semiconductor nanowire field effect transistor and resonant tunneling device". The Ohio State University, 2015. http://rave.ohiolink.edu/etdc/view?acc_num=osu1448230793.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
4

AL-SHADEEDI, AKRAM. "LATERAL AND VERTICAL ORGANIC TRANSISTORS". Kent State University / OhioLINK, 2017. http://rave.ohiolink.edu/etdc/view?acc_num=kent1492441683969202.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
5

Glaß, Stefan [Verfasser], Siegfried [Akademischer Betreuer] Mantl y Matthias [Akademischer Betreuer] Wuttig. "Si/SiGe-based gate-normal tunneling field-effect transistors / Stefan Glaß ; Siegfried Mantl, Matthias Wuttig". Aachen : Universitätsbibliothek der RWTH Aachen, 2019. http://d-nb.info/1193181453/34.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
6

Rolseth, Erlend Granbo [Verfasser] y Jörg [Akademischer Betreuer] Schulze. "Experimental studies on germanium-tin p-channel tunneling field effect transistors / Erlend Granbo Rolseth ; Betreuer: Jörg Schulze". Stuttgart : Universitätsbibliothek der Universität Stuttgart, 2017. http://d-nb.info/1156603994/34.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
7

Schmidt, Matthias [Verfasser]. "Fabrication, characterization and simulation of band-to-band tunneling field-effect transistors based on silicon-germanium / Matthias Schmidt". Aachen : Hochschulbibliothek der Rheinisch-Westfälischen Technischen Hochschule Aachen, 2013. http://d-nb.info/1044748915/34.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
8

Wang, Lihui. "Quantum Mechanical Effects on MOSFET Scaling". Diss., Available online, Georgia Institute of Technology, 2006, 2006. http://etd.gatech.edu/theses/available/etd-07072006-111805/.

Texto completo
Resumen
Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2007.
Philip First, Committee Member ; Ian F. Akyildiz, Committee Member ; Russell Dupuis, Committee Member ; James D. Meindl, Committee Chair ; Willianm R. Callen, Committee Member.
Los estilos APA, Harvard, Vancouver, ISO, etc.
9

Nadimi, Ebrahim. "Quantum Mechanical and Atomic Level ab initio Calculation of Electron Transport through Ultrathin Gate Dielectrics of Metal-Oxide-Semiconductor Field Effect Transistors". Doctoral thesis, Universitätsbibliothek Chemnitz, 2008. http://nbn-resolving.de/urn:nbn:de:bsz:ch1-200800477.

Texto completo
Resumen
The low dimensions of the state-of-the-art nanoscale transistors exhibit increasing quantum mechanical effects, which are no longer negligible. Gate tunneling current is one of such effects, that is responsible for high power consumption and high working temperature in microprocessors. This in turn put limits on further down scaling of devices. Therefore modeling and calculation of tunneling current is of a great interest. This work provides a review of existing models for the calculation of the gate tunneling current in MOSFETs. The quantum mechanical effects are studied with a model, based on a self-consistent solution of the Schrödinger and Poisson equations within the effective mass approximation. The calculation of the tunneling current is focused on models based on the calculation of carrier’s lifetime on quasi-bound states (QBSs). A new method for the determination of carrier’s lifetime is suggested and then the tunneling current is calculated for different samples and compared to measurements. The model is also applied to the extraction of the “tunneling effective mass” of electrons in ultrathin oxynitride gate dielectrics. Ultrathin gate dielectrics (tox<2 nm) consist of only few atomic layers. Therefore, atomic scale deformations at interfaces and within the dielectric could have great influences on the performance of the dielectric layer and consequently on the tunneling current. On the other hand the specific material parameters would be changed due to atomic level deformations at interfaces. A combination of DFT and NEGF formalisms has been applied to the tunneling problem in the second part of this work. Such atomic level ab initio models take atomic level distortions automatically into account. An atomic scale model interface for the Si/SiO2 interface has been constructed and the tunneling currents through Si/SiO2/Si stack structures are calculated. The influence of single and double oxygen vacancies on the tunneling current is investigated. Atomic level distortions caused by a tensile or compression strains on SiO2 layer as well as their influence on the tunneling current are also investigated
Die vorliegende Arbeit beschäftigt sich mit der Berechnung von Tunnelströmen in MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors). Zu diesem Zweck wurde ein quantenmechanisches Modell, das auf der selbstkonsistenten Lösung der Schrödinger- und Poisson-Gleichungen basiert, entwickelt. Die Gleichungen sind im Rahmen der EMA gelöst worden. Die Lösung der Schrödinger-Gleichung unter offenen Randbedingungen führt zur Berechnung von Ladungsverteilung und Lebensdauer der Ladungsträger in den QBSs. Der Tunnelstrom wurde dann aus diesen Informationen ermittelt. Der Tunnelstrom wurde in verschiedenen Proben mit unterschiedlichen Oxynitrid Gatedielektrika berechnet und mit gemessenen Daten verglichen. Der Vergleich zeigte, dass die effektive Masse sich sowohl mit der Schichtdicke als auch mit dem Stickstoffgehalt ändert. Im zweiten Teil der vorliegenden Arbeit wurde ein atomistisches Modell zur Berechnung des Tunnelstroms verwendet, welche auf der DFT und NEGF basiert. Zuerst wurde ein atomistisches Modell für ein Si/SiO2-Schichtsystem konstruiert. Dann wurde der Tunnelstrom für verschiedene Si/SiO2/Si-Schichtsysteme berechnet. Das Modell ermöglicht die Untersuchung atom-skaliger Verzerrungen und ihren Einfluss auf den Tunnelstrom. Außerdem wurde der Einfluss einer einzelnen und zwei unterschiedlich positionierter neutraler Sauerstoffleerstellen auf den Tunnelstrom berechnet. Zug- und Druckspannungen auf SiO2 führen zur Deformationen in den chemischen Bindungen und ändern den Tunnelstrom. Auch solche Einflüsse sind anhand des atomistischen Modells berechnet worden
Los estilos APA, Harvard, Vancouver, ISO, etc.
10

Vishnoi, Rajat. "Modelling of nanoscale tunnelling field effect transistors". Thesis, IIT Delhi, 2016. http://localhost:8080/xmlui/handle/12345678/7030.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
Más fuentes

Libros sobre el tema "Tunneling field effect transistor"

1

Zhang, Lining y Mansun Chan, eds. Tunneling Field Effect Transistor Technology. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-31653-6.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
2

Samuel, T. S. Arun, Young Suh Song, Shubham Tayal, P. Vimala y Shiromani Balmukund Rahi. Tunneling Field Effect Transistors. Boca Raton: CRC Press, 2023. http://dx.doi.org/10.1201/9781003327035.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
3

Wang, Shiyu, Zakir Hossain, Yan Zhao y Tao Han. Graphene Field-Effect Transistor Biosensors. Singapore: Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-16-1212-1.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
4

Park, Byung-Eun, Hiroshi Ishiwara, Masanori Okuyama, Shigeki Sakai y Sung-Min Yoon, eds. Ferroelectric-Gate Field Effect Transistor Memories. Dordrecht: Springer Netherlands, 2016. http://dx.doi.org/10.1007/978-94-024-0841-6.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
5

Park, Byung-Eun, Hiroshi Ishiwara, Masanori Okuyama, Shigeki Sakai y Sung-Min Yoon, eds. Ferroelectric-Gate Field Effect Transistor Memories. Singapore: Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-1212-4.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
6

Corporation, Mitsubishi Electric. Ga As field effect transistor(chip) databook. Tokyo: Mitsubishi Electric Corporation, 1986.

Buscar texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
7

Amiri, Iraj Sadegh y Mahdiar Ghadiry. Analytical Modelling of Breakdown Effect in Graphene Nanoribbon Field Effect Transistor. Singapore: Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-10-6550-7.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
8

Karmakar, Supriya. Novel Three-state Quantum Dot Gate Field Effect Transistor. New Delhi: Springer India, 2014. http://dx.doi.org/10.1007/978-81-322-1635-3.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
9

Corporation, Mitsubishi Electric. GaAs field effect transistor MGF 1900 series user's manual. Tokyo: Mitsubishi Electric Corporation, 1987.

Buscar texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
10

Corporation, Mitsubishi Electric. Mitsubishi semiconductors 1994: GaAs field effect transistor (data book). Tokyo: Mitsubishi Electric Corporation, 1994.

Buscar texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
Más fuentes

Capítulos de libros sobre el tema "Tunneling field effect transistor"

1

Kumar, Pramod, Neha Paras y Manisha Bharti. "Designing of Nonvolatile Memories Utilizing Tunnel Field Effect Transistor". En Tunneling Field Effect Transistors, 235–50. Boca Raton: CRC Press, 2023. http://dx.doi.org/10.1201/9781003327035-13.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
2

Usha, C. y P. Vimala. "Evolution of Heterojunction Tunnel Field Effect Transistor and its Advantages". En Tunneling Field Effect Transistors, 99–123. Boca Raton: CRC Press, 2023. http://dx.doi.org/10.1201/9781003327035-6.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
3

Yu, Tao, Judy L. Hoyt y Dimitri A. Antoniadis. "Tunneling FET Fabrication and Characterization". En Tunneling Field Effect Transistor Technology, 33–60. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-31653-6_2.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
4

Liu, Fei, Qing Shi, Jian Wang y Hong Guo. "Atomistic Simulations of Tunneling FETs". En Tunneling Field Effect Transistor Technology, 111–49. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-31653-6_5.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
5

Zhang, Lining, Jun Huang y Mansun Chan. "Steep Slope Devices and TFETs". En Tunneling Field Effect Transistor Technology, 1–31. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-31653-6_1.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
6

Zhang, Lining y Mansun Chan. "Compact Models of TFETs". En Tunneling Field Effect Transistor Technology, 61–87. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-31653-6_3.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
7

Fan, Ming-Long, Yin-Nien Chen, Pin Su y Ching-Te Chuang. "Challenges and Designs of TFET for Digital Applications". En Tunneling Field Effect Transistor Technology, 89–109. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-31653-6_4.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
8

Huang, Jun Z., Lining Zhang, Pengyu Long, Michael Povolotskyi y Gerhard Klimeck. "Quantum Transport Simulation of III-V TFETs with Reduced-Order $$ \varvec{k} \cdot \varvec{p} $$ k · p Method". En Tunneling Field Effect Transistor Technology, 151–80. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-31653-6_6.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
9

Wang, Hao. "Carbon Nanotube TFETs: Structure Optimization with Numerical Simulation". En Tunneling Field Effect Transistor Technology, 181–210. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-31653-6_7.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
10

Singh, Prabhat y Dharmendra Singh Yadav. "Analysis of Channel Doping Variation on Transfer Characteristics to High-Frequency Performance of F-TFET". En Tunneling Field Effect Transistors, 193–203. Boca Raton: CRC Press, 2023. http://dx.doi.org/10.1201/9781003327035-10.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.

Actas de conferencias sobre el tema "Tunneling field effect transistor"

1

Reddy, Dharmendar, Leonard F. Register y Sanjay K. Banerjee. "Bilayer graphene vertical tunneling field effect transistor". En 2012 70th Annual Device Research Conference (DRC). IEEE, 2012. http://dx.doi.org/10.1109/drc.2012.6256932.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
2

Jiao, G. F., X. Y. Huang, Z. X. Chen, W. Cao, D. M. Huang, H. Y. Yu, N. Singh, G. Q. Lo, D. L. Kwong y Ming-Fu Li. "Investigation of tunneling field effect transistor reliability". En 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT). IEEE, 2010. http://dx.doi.org/10.1109/icsict.2010.5667426.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
3

Fischer, I. A., D. Hahnel, H. Isemann, A. Kottantharayil, G. Murali, M. Oehme y J. Schulze. "Si Tunneling Field Effect Transistor with Tunnelling In-Line with the Gate Field". En 2012 International Silicon-Germanium Technology and Device Meeting (ISTDM). IEEE, 2012. http://dx.doi.org/10.1109/istdm.2012.6222411.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
4

Vijayvargiya, Vikas y Santosh Vishvakarma. "Effect of doping profile on tunneling field effect transistor performance". En 2013 Spanish Conference on Electron Devices (CDE). IEEE, 2013. http://dx.doi.org/10.1109/cde.2013.6481376.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
5

Es-Sakhi, Azzedin D. y Masud H. Chowdhury. "Multichannel Tunneling Carbon Nanotube Field Effect Transistor (MT-CNTFET)". En 2014 27th IEEE International System-on-Chip Conference (SOCC). IEEE, 2014. http://dx.doi.org/10.1109/socc.2014.6948918.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
6

Zhao, Pei, R. M. Feenstra, Gong Gu y Debdeep Jena. "SymFET: A proposed symmetric graphene tunneling field effect transistor". En 2012 70th Annual Device Research Conference (DRC). IEEE, 2012. http://dx.doi.org/10.1109/drc.2012.6257006.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
7

Han, Ru, Haichao Zhang y Danghui Wang. "Inverted π-shaped Si/Ge Tunneling Field Effect Transistor". En 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT). IEEE, 2018. http://dx.doi.org/10.1109/icsict.2018.8564939.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
8

Suzuki, S., M. Muruganathan, S. Oda y H. Mizuta. "Band-to-Band Graphene Resonant Tunneling Field Effect Transistor". En 2015 International Conference on Solid State Devices and Materials. The Japan Society of Applied Physics, 2015. http://dx.doi.org/10.7567/ssdm.2015.b-5-2.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
9

Elgamal, Muhammad. "Genetic Algorithm to Optimize Performance of Tunneling Field-Effect Transistor". En 2020 International Conference on Innovative Trends in Communication and Computer Engineering (ITCE). IEEE, 2020. http://dx.doi.org/10.1109/itce48509.2020.9047768.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
10

Yang, Q., J. Zhang, C. Zhu, X. Lin, F. Yan y X. Ji. "Performance evaluation of tunneling field effect transistor on Terahertz detection". En 2018 China Semiconductor Technology International Conference (CSTIC). IEEE, 2018. http://dx.doi.org/10.1109/cstic.2018.8369195.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.

Informes sobre el tema "Tunneling field effect transistor"

1

Suslov, Alexey y Tzu-Ming Lu. Capacitance of a Ge/SiGe heterostructure field-effect transistor. Office of Scientific and Technical Information (OSTI), noviembre de 2018. http://dx.doi.org/10.2172/1484586.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
2

Dorsey, Andrew M. y Matthew H. Ervin. Effects of Differing Carbon Nanotube Field-effect Transistor Architectures. Fort Belvoir, VA: Defense Technical Information Center, julio de 2009. http://dx.doi.org/10.21236/ada502660.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
3

Blair, S. M. AlGaN/InGaN Nitride Based Modulation Doped Field Effect Transistor. Fort Belvoir, VA: Defense Technical Information Center, noviembre de 2003. http://dx.doi.org/10.21236/ada422632.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
4

Allen, N., L. Voss, C. Frye, K. KWeon, J. Varley y Q. Shao. Gallium Nitride Superjunction Fin Field Effect Transistor: Continued Funding Report. Office of Scientific and Technical Information (OSTI), octubre de 2021. http://dx.doi.org/10.2172/1826468.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
5

Sun, W. D., Fred H. Pollak, Patrick A. Folkes y Godfrey A. Gumbs. Band-Bending Effect of Low-Temperature GaAs on a Pseudomorphic Modulation-Doped Field-Effect Transistor. Fort Belvoir, VA: Defense Technical Information Center, marzo de 1999. http://dx.doi.org/10.21236/ada361412.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
6

Huebschman, Benjamin D., Pankaj B. Shah y Romeo Del Rosario. Theory and Operation of Cold Field-effect Transistor (FET) External Parasitic Parameter Extraction. Fort Belvoir, VA: Defense Technical Information Center, mayo de 2009. http://dx.doi.org/10.21236/ada499619.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
7

Harrison, Richard Karl, Stephen Wayne Howell, Jeffrey B. Martin y Allister B. Hamilton. Exploring graphene field effect transistor devices to improve spectral resolution of semiconductor radiation detectors. Office of Scientific and Technical Information (OSTI), diciembre de 2013. http://dx.doi.org/10.2172/1200672.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
8

Jackson, H. G., T. T. Shimizu y B. Leskovar. Preliminary measurements of gamma ray effects on characteristics of broad-band GaAs field-effect transistor preamplifiers. Office of Scientific and Technical Information (OSTI), enero de 1985. http://dx.doi.org/10.2172/5126571.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
9

Cooper, Donald E. y Steven C. Moss. Picosecond Optoelectronic Measurement of the High Frequency Scattering Parameters of a GaAs FET (Field Effect Transistor). Fort Belvoir, VA: Defense Technical Information Center, junio de 1986. http://dx.doi.org/10.21236/ada170618.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
10

Aizin, Gregory. Plasmon Enhanced Electron Drag and Terahertz Photoconductance in a Grating-Gated Field-Effect Transistor with Two-Dimensional Electron Channel. Fort Belvoir, VA: Defense Technical Information Center, enero de 2006. http://dx.doi.org/10.21236/ada447174.

Texto completo
Los estilos APA, Harvard, Vancouver, ISO, etc.
También puede estar interesado en las bibliografías ampliadas sobre el tema "Tunneling field effect transistor" para tipos de fuentes particulares:
Artículos de revistas Tesis Libros
Ofrecemos descuentos en todos los planes premium para autores cuyas obras están incluidas en selecciones literarias temáticas. ¡Contáctenos para obtener un código promocional único!

Pasar a la bibliografía