Literatura académica sobre el tema "Thin Film Transistors (TFT)"
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Artículos de revistas sobre el tema "Thin Film Transistors (TFT)"
Park, Hyun-Woo, Sera Kwon, Aeran Song, Dukhyun Choi y Kwun-Bum Chung. "Dynamics of bias instability in the tungsten-indium-zinc oxide thin film transistor". Journal of Materials Chemistry C 7, n.º 4 (2019): 1006–13. http://dx.doi.org/10.1039/c8tc03585g.
Texto completoPokharel, Peshal y Lalita Shrestha. "Fabrication of Transparent Thin Film for Application of Thin Film Transistor (TFT) and Microelectronics". Himalayan Journal of Science and Technology 6, n.º 1 (31 de diciembre de 2022): 22–28. http://dx.doi.org/10.3126/hijost.v6i1.50645.
Texto completoManoli, Kyriaki, Preethi Seshadri, Mandeep Singh, Cinzia Di Franco, Angelo Nacci, Gerardo Palazzo y Luisa Torsi. "Solvent-gated thin-film-transistors". Physical Chemistry Chemical Physics 19, n.º 31 (2017): 20573–81. http://dx.doi.org/10.1039/c7cp03262e.
Texto completoKuo, Yue. "(Invited) Oxide TFT Applications: Principles and Challenges". ECS Meeting Abstracts MA2022-02, n.º 35 (9 de octubre de 2022): 1285. http://dx.doi.org/10.1149/ma2022-02351285mtgabs.
Texto completoMądzik, Mateusz Tomasz, Elangovan Elamurugu, Raquel Flores y Jaime Viegas. "Impact of glycerol on Zinc Oxide based thin film transistors with Indium Molybdenum Oxide electrodes". MRS Advances 1, n.º 4 (2016): 265–68. http://dx.doi.org/10.1557/adv.2016.26.
Texto completoYan, Xingzhen, Kai Shi, Xuefeng Chu, Fan Yang, Yaodan Chi y Xiaotian Yang. "Stepped Annealed Inkjet-Printed InGaZnO Thin-Film Transistors". Coatings 9, n.º 10 (27 de septiembre de 2019): 619. http://dx.doi.org/10.3390/coatings9100619.
Texto completoGu, Guiru, Yunfeng Ling, Runyu Liu, Puminun Vasinajindakaw, Xuejun Lu, Carissa S. Jones, Wu-Sheng Shih et al. "All-Printed Thin-Film Transistor Based on Purified Single-Walled Carbon Nanotubes with Linear Response". Journal of Nanotechnology 2011 (2011): 1–4. http://dx.doi.org/10.1155/2011/823680.
Texto completoNagamatsu, Shuichi, Masataka Ishida, Shougo Miyajima y Shyam S. Pandey. "P3HT Nanofibrils Thin-Film Transistors by Adsorbing Deposition in Suspension". Materials 12, n.º 21 (5 de noviembre de 2019): 3643. http://dx.doi.org/10.3390/ma12213643.
Texto completoFuruta, Mamoru y Yusaku Magari. "(Invited, Digital Presentation) Nondegenerate Hydrogen-Doped Polycrystalline Indium Oxide (InOx:H) Thin Films for High-Mobility Thin Film Transistors". ECS Meeting Abstracts MA2022-02, n.º 35 (9 de octubre de 2022): 1266. http://dx.doi.org/10.1149/ma2022-02351266mtgabs.
Texto completoShin, Seung Won, Jae Eun Cho, Hyun-Mo Lee, Jin-Seong Park y Seong Jun Kang. "Photoresponses of InSnGaO and InGaZnO thin-film transistors". RSC Advances 6, n.º 87 (2016): 83529–33. http://dx.doi.org/10.1039/c6ra17896k.
Texto completoTesis sobre el tema "Thin Film Transistors (TFT)"
Hein, Moritz. "Organic Thin-Film Transistors". Doctoral thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2017. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-167894.
Texto completoDong, Hanpeng. "Microcrystalline silicon based thin film transistors fabricated on flexible substrate". Thesis, Rennes 1, 2015. http://www.theses.fr/2015REN1S173/document.
Texto completoThis work deals with the development of microcrystalline silicon thin film transistors (TFTs) fabricated on flexible substrate at low temperature (T=180 °C). The first step of this work consists in studying the electrical stability of TFTs. The N-type TFTs fabricated on glass substrate are electrically stable under gate bias stress VGStress= +50V at T=50 °C. The threshold voltage shift (ΔVTH) was only 1.2 V during 4 hours. This electrical instability of TFTs is mainly due to carrier trapping inside the silicon nitride gate insulator. The second step of this work lies in the study of the mechanical behavior of the TFTs. Both tensile and compressive strains were applied on TFTs. The minimum curvature radius is r=1.5 mm for both tension and compression. The main limitation of TFTs comes from the mechanical strain εlimit of silicon nitride used as gate insulator of TFTs. Also, these TFTs are mechanically reliable: the variation of ION current was only 1% after 200 cycles mechanical bending. These results obtained open the way to the development of flexible electronics that can be folded in half.Finally, TFTs have been fabricated using different gate insulators in order to improve the mobility. Unfortunately, all the gate insulators used couldn’t improve mobility without sacrificing electrical stability of TFT. More detailed studies and complementary optimization of these gate insulators are necessary
Ho, Tsz Kin. "Design of TFT circuit and touchscreen electronics /". View abstract or full-text, 2009. http://library.ust.hk/cgi/db/thesis.pl?ECED%202009%20HO.
Texto completoNominanda, Helinda. "Amorphous silicon thin film transistor as nonvolatile device". Texas A&M University, 2008. http://hdl.handle.net/1969.1/86004.
Texto completoRossi, Leonardo. "Flexible oxide thin film transistors: fabrication and photoresponse". Master's thesis, Alma Mater Studiorum - Università di Bologna, 2017. http://amslaurea.unibo.it/14542/.
Texto completoFratelli, Ilaria. "Flexible oxide thin film transistors: device fabrication and kelvin probe force microscopy analysis". Master's thesis, Alma Mater Studiorum - Università di Bologna, 2017. http://amslaurea.unibo.it/13538/.
Texto completoJakob, Markus Prüfer. "Compact DC Modelling of Short-Channel Effects in Organic Thin-Film Transistors". Doctoral thesis, Universitat Rovira i Virgili, 2022. http://hdl.handle.net/10803/673905.
Texto completoLos transistores orgánicos de capa fina (TFT) son dispositivos prometedores para las pantallas flexibles de matriz activa y los conjuntos de sensores, ya que pueden fabricarse a temperaturas de proceso relativamente bajas y, por tanto, no sólo en vidrio, sino también en sustratos poliméricos. Para mejorar el rendimiento dinámico de los dispositivos y circuitos TFT, una reducción agresiva de la longitud de los canales provoca efectos extrínsecos en los dispositivos que tienen que ser capturados por modelos compactos. Esta tesis presenta modelos analíticos, basados en la física, de la degradación de la pendiente subumbral, el roll-off del voltaje umbral y el efecto DIBL en TFTs coplanares y escalonados que pueden ser implementados en cualquier modelo compacto de corriente continua arbitrario que esté definido por el voltaje umbral y la pendiente subumbral. Por lo tanto, la ecuación diferencial de Laplace se resuelve para la geometría coplanar y escalonada aplicando la transformación Schwarz-Christoffel. Las soluciones del potencial sirven de base para la definición de las ecuaciones del modelo. Además, se desarrollan modelos compactos de las barreras Schottky dependientes de la polarización en las interfaces fuente/semiconductor y drenador/semiconductor en los TFT coplanares y escalonados, que modelan la inyección y la eyección de portadores de carga, respectivamente, como corriente de emisión termoiónica
Organic thin-film transistors (TFTs) are promising devices for flexible active-matrix displays and sensor arrays, since they can be fabricated at relatively low process temperatures and thus not only on glass, but also on polymeric substrates. In order to improve the dynamic TFT and circuit performance, an aggressive reduction of the channel length causes extrinsic de-vice effects that have to be captured by compact models. This dissertation presents analytical, physics-based models of the subthreshold-swing degra-dation, the thresholdvoltage roll-off and DIBL effects in coplanar and staggered TFTs that can be implemented in any arbitrary compact dc model that are defined by the threshold voltage and the subthreshold swing. Therefore, Laplace’s differential equation is solved for the coplanar and staggered geometry by applying the Schwarz-Christoffel transformation. The potential solutions serve as a basis for the definition of the model equations. Further-more, compact models of the biasdependent Schottky barriers at the source/semiconductor and drain/semiconductor interfaces in coplanar and staggered TFTs are derived, which model the charge carriers injection and ejection, respectively, as thermionic emission cur-rent. Thereby, in case of the source barrier, the Schottky barrier lowering effect due to im-age charges is captured and therefore, an analytical expression of the electric field at the source barrier is derived.
Dosev, Dosi Konstantinov. "Fabrication, characterisation and modelling of nanocrystalline silicon thin-film transistors obtained by hot-wire chemical vapour deposition". Doctoral thesis, Universitat Politècnica de Catalunya, 2003. http://hdl.handle.net/10803/6324.
Texto completoIn this work, thin-film transistors (TFTs) were fabricated using nanocrystalline hydrogenated silicon film (nc-Si:H), deposited by HWCVD over thermally oxidized silicon wafer. The employed substrate temperature during the deposition process permits inexpensive materials as glasses or plastics to be used for various applications in large-area electronics. The deposition rate was about one order of magnitude higher than in other conventionally employed techniques. The deposited nc-Si:H films show good uniformity and reproducibility. The films consist of vertically grown columnar grains surrounded by amorphous phase. The columnar grains are thinner at the bottom (near the oxide interface) and thicker at the top of the film. Chromium layer was evaporated over the nc-Si:H in order to form drain and source contacts. Using photolithography techniques, two types of samples were fabricated. The first type (simplified) was with the chromium contacts directly deposited over the intrinsic nc-Si:H layer. No dry etching was involved in the fabrication process of this sample. The transistors on the wafer were not electrically separated from each other. Doped n+ layer was incorporated at the drain and source contacts in the second type of samples (complete samples). Dry etching was employed to eliminate the nc-Si:H between the TFTs and to isolate them electrically from each other.
The electrical characteristics of both types of nc-Si:H TFTs were similar to a-Si:H based TFTs. Nevertheless, some significant differences were observed in the characteristics of the two types of samples. The increasing of the off-current in the simplified structure was eliminated by the n+ layer in the second type of samples. This led to the improving of the on/off ratio. The n+ layer also eliminated current crowding of the output characteristics. On the other hand, the subthreshold slope, the threshold voltage and the density of states were slightly deteriorated in the samples with incorporated n+ layer. Surface states created by the dry etching could be a possible reason. Other cause could be a bad quality of the nc-Si:H/SiO2 interface. The TFTs with incorporated n+ contact layer and electrically separated on the wafer were used in the further studies of stability and device modelling.
The nc-Si:H TFTs were submitted under prolonged positive and negative gate bias stress in order to study their stability. We studied the influence of the stressing time and voltage on the transfer characteristics, threshold voltage, activation energy and density of states. The threshold voltage increased under positive gate bias stress and decreased under negative gate bias stress. After both positive and negative stresses, the threshold voltage recovered its initial values without annealing. This behaviour indicated that temporary charge trapping in the channel/gate insulator interface is the responsible process for the device performance under stress. Measurements of space-charge limited current confirmed that bulk states were not affected by the positive nor by negative stress.
Analysis of the activation energy and the density of states gave more detailed information about the physical processes taking place during the stress. Typical drawback of the nc-Si:H films grown by HWCVD with tungsten (W) filament is the bad quality of the bottom, initially grown, interfacial layer. It is normally amorphous and porous. We assume that this property of the nc-Si:H film is determining for charge trapping and the consecutive temporary changes of the TFT's characteristics. On the other hand, the absence of defect-state creation during the gate bias stress demonstrates that the nc-Si:H films did not suffer degradation under the applied stress conditions.
The electrical characteristics and the operational regimes of the nc-Si:H TFTs were studied in details in order to obtain the best possible fit using the Spice models for a-Si:H and poly-Si TFTs existing until now. The analysis of the transconductance gm showed behaviour typical for a-Si:H TFTs at low gate voltages. In contrast, at high gate voltages unexpected increasing of gm was observed, as in poly-Si TFTs. Therefore, it was impossible to fit the transfer and output characteristics with the a-Si:H TFT model neither with poly-Si TFT model.
We performed numerical simulations using the Silvaco's Atlas simulator of semiconductor devices in order to understand the physical parameters, responsible for the device behaviour. The simulations showed that the reason for this behaviour is the density of acceptor-like states, which situates the properties of nc-Si:H TFTs between the amorphous and the polycrystalline transistors. Taking into account this result, we performed analysis of the concentrations of the free and the trapped carriers in nc-Si:H layer. It was found that nc-Si:H operates in transitional regime between above-threshold and crystalline-like regimes. This transitional regime was predicted earlier, but not experimentally observed until now. Finally, we introduced new equations and three new parameters into the existing a-Si TFTs model in order to account for the transitional regime. The new proposed model permits the shapes of the transconductance, the transfer and the output characteristics to be modelled accurately.
Noring, Martin. "To automatically estimate the surface area coverage of carbon nanotubes on thin film transistors with image analysis : Bachelor’s degree project report". Thesis, Uppsala universitet, Institutionen för teknikvetenskaper, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-157168.
Texto completoZhu, Lei. "Modeling of a-Si:H TFT I-V Characteristics in the Forward Subthreshold Operation". Thesis, University of Waterloo, 2005. http://hdl.handle.net/10012/868.
Texto completoLibros sobre el tema "Thin Film Transistors (TFT)"
Tsukada, Toshihisa. TFT/LCD: Liquid-crystal displays addressed by thin-film transistors. Amsterdam: Gordon and Breach, 1996.
Buscar texto completoHakumaku toranjisuta gijutsu no subete: Kōzō, tokusei, seizō purosesu kara jisedai TFT made = Thin film transistor. Tōkyō: Kōgyō Chōsakai, 2007.
Buscar texto completoAoki, Hitoshi. Dynamic characterization of a-Si TFT-LCD pixels. Palo Alto, CA: Hewlett-Packard Laboratories, Technical Publications Department, 1996.
Buscar texto completoTsukada, Toshihisa. TFT/LCD: Liquid-crystal displays addressed by thin-film transistors. Amsterdam: Gordon and Breach, 1996.
Buscar texto completoTaiwan de jing tan hao: Tai Ri Han TFT shi ji zhi zheng. Taiabei Shi: Shi bao wen hua chu ban qi ye gu fen you xian gong si, 2004.
Buscar texto completoBo mo jing ti guan (TFT) zhen lie zhi zao ji shu. Shanghai Shi: Fu dan da xue chu ban she, 2007.
Buscar texto completoMaeda, Shigenobu. Teishōhi denryoku kōsoku MOSFET gijutsu: Takesshō shirikon TFT fukagata SRAM to SOI debaisu. Tōkyō: Sipec, 2002.
Buscar texto completoInternational Workshop on Active Matrix Liquid Crystal Displays (2001 Tokyo, Japan). AM-LCD 01: Digest of technical papers : 2001 International Workshop on Active Matrix Liquid Crystal Displays, TFT technologies and related materials, July 11-13, 2001, Kogakuin University, Tokyo, Japan. [Kobe, Japan]: Japan Society of Applied Physics, 2001.
Buscar texto completoInternational Workshop on Active Matrix Liquid Crystal Displays (1999 Tokyo, Japan). AM-LCD 99: Digest of technical papers :1999 International Workshop on Active Matrix Liquid Crystal Displays, TFT technologies and related materials, July 14-16, 1999, Kogakuin University, Tokyo, Japan. [Kobe, Japan]: Japan Society of Applied Physics, 1999.
Buscar texto completoBrotherton, S. D. Introduction to Thin Film Transistors: Physics and Technology of TFTs. Heidelberg: Springer International Publishing, 2013.
Buscar texto completoCapítulos de libros sobre el tema "Thin Film Transistors (TFT)"
Ishihara, Ryoichi. "Poly-Si TFT Structures". En Thin Film Transistors, 670–700. Boston, MA: Springer US, 2004. http://dx.doi.org/10.1007/978-1-4615-0397-2_15.
Texto completoChoi, Byong-Deok, Inhwan Lee y Oh-Kyong Kwon. "Poly-Si TFT Drivers". En Thin Film Transistors, 885–949. Boston, MA: Springer US, 2004. http://dx.doi.org/10.1007/978-1-4615-0397-2_22.
Texto completoKuo, Yue. "a-Si:H TFT Structures". En Thin Film Transistors, 183–202. Boston, MA: Springer US, 2004. http://dx.doi.org/10.1007/978-1-4615-0397-2_4.
Texto completoKuo, Yue. "Poly-Si TFT for non-LCD Applications". En Thin Film Transistors, 989–1021. Boston, MA: Springer US, 2004. http://dx.doi.org/10.1007/978-1-4615-0397-2_24.
Texto completoFlewitt, Andrew J. y William I. Milne. "a-Si:H TFT Thin Film and Substrate Materials". En Thin Film Transistors, 15–78. Boston, MA: Springer US, 2004. http://dx.doi.org/10.1007/978-1-4615-0397-2_2.
Texto completoHigashi, Seiichiro. "Process Integration Issues for Poly-Si TFT Fabrication". En Thin Film Transistors, 849–83. Boston, MA: Springer US, 2004. http://dx.doi.org/10.1007/978-1-4615-0397-2_21.
Texto completoKuo, Yue. "Plasma Etching in a-Si:H TFT Array Fabrication". En Thin Film Transistors, 273–312. Boston, MA: Springer US, 2004. http://dx.doi.org/10.1007/978-1-4615-0397-2_7.
Texto completoMatsumura, Hideki, Akira Izumi y Atsushi Masuda. "Catalytic Chemical Vapor Deposition of a-Si:H TFT". En Thin Film Transistors, 377–94. Boston, MA: Springer US, 2004. http://dx.doi.org/10.1007/978-1-4615-0397-2_9.
Texto completoKuo, Yue. "Deposition of Dielectric Thin Films for a-Si:H TFT". En Thin Film Transistors, 241–71. Boston, MA: Springer US, 2004. http://dx.doi.org/10.1007/978-1-4615-0397-2_6.
Texto completoBrotherton, S. D. "Poly-Si TFT Performance". En Introduction to Thin Film Transistors, 253–300. Heidelberg: Springer International Publishing, 2013. http://dx.doi.org/10.1007/978-3-319-00002-2_8.
Texto completoActas de conferencias sobre el tema "Thin Film Transistors (TFT)"
Colli, A. "Thin film transistors on nanostructured layers prepared by nanowire lithography". En 2009 Compact Thin-Film Transistor Modeling for Circuit Simulation (TFT/CTFT). IEEE, 2009. http://dx.doi.org/10.1109/ctft.2009.5379875.
Texto completoTang, Wei, Jiaqing Zhao, Qiaofeng Li y Xiaojun Guo. "Highly Sensitive Low Power Ion-sensitive Organic Thin-Film Transistors". En 2018 9th International Conference on Computer Aided Design for Thin-Film Transistors (CAD-TFT). IEEE, 2018. http://dx.doi.org/10.1109/cad-tft.2018.8608054.
Texto completoChen, Yonghua, Zhinong Yu, Xuyang Li y Jin Cheng. "Low-Temperature Fabrication of Solution-Processed InGaZnO Thin-Film Transistors". En 2018 9th International Conference on Computer Aided Design for Thin-Film Transistors (CAD-TFT). IEEE, 2018. http://dx.doi.org/10.1109/cad-tft.2018.8608055.
Texto completoLv, Nannan, Zening Wang, Lei Lu y Mingxiang Wang. "Structure Optimization on Elevated-Metal a-InGaZnO Thin Film Transistors". En 2018 9th International Conference on Computer Aided Design for Thin-Film Transistors (CAD-TFT). IEEE, 2018. http://dx.doi.org/10.1109/cad-tft.2018.8608105.
Texto completoWu, Yue, Weina Yong, Chia-Yu Lee y Hang Zhou. "An Asymmetric Metal Electrode for TFT-LCDs". En 2018 9th International Conference on Computer Aided Design for Thin-Film Transistors (CAD-TFT). IEEE, 2018. http://dx.doi.org/10.1109/cad-tft.2018.8608114.
Texto completoAdl, Ahmad Hossein, Samira Farsinezhad, Alex Ma, Douglas W. Barlage y Karthik Shankar. "High Performance Zinc Oxide Thin Film Transistors Through Improved Material Processing and Device Design". En ASME 2014 International Mechanical Engineering Congress and Exposition. American Society of Mechanical Engineers, 2014. http://dx.doi.org/10.1115/imece2014-36941.
Texto completoZhou, Yongkai, Shik Lin Lee, Chao Fu, Younan Hua y Xiaomin Li. "Fault Isolation and TEM Study in State-of-Art Thin-Film Transistors". En ISTFA 2015. ASM International, 2015. http://dx.doi.org/10.31399/asm.cp.istfa2015p0374.
Texto completoHe, Yongli, Ya Gao, Zehua Liu, Jie Luo, Chenxi Zhang y Qing Wan. "Indium-Zinc-Oxide Electric-Double-Layer Thin-Film Transistors for Humidity Sensing". En 2018 9th International Conference on Computer Aided Design for Thin-Film Transistors (CAD-TFT). IEEE, 2018. http://dx.doi.org/10.1109/cad-tft.2018.8608110.
Texto completoZhong, Wei, Guoyuan Li y Rongsheng Chen. "Vapor-phase self-assembled monolayer on InSnZnO Thin-Film Transistors for enhanced performance". En 2018 9th International Conference on Computer Aided Design for Thin-Film Transistors (CAD-TFT). IEEE, 2018. http://dx.doi.org/10.1109/cad-tft.2018.8608102.
Texto completoDeng, Xuan, Yuqing Zhang, Haishi Fu y Shengdong Zhang. "High mobility metal-oxide thin film transistors with IGZO/In2O3 dual-channel structure". En 2018 9th International Conference on Computer Aided Design for Thin-Film Transistors (CAD-TFT). IEEE, 2018. http://dx.doi.org/10.1109/cad-tft.2018.8608103.
Texto completoInformes sobre el tema "Thin Film Transistors (TFT)"
Ray, Asim K. Design of Novel Organic Thin Film Transistors for Wearable Electronics. Fort Belvoir, VA: Defense Technical Information Center, agosto de 2012. http://dx.doi.org/10.21236/ada565909.
Texto completoHatalis, Miliadis K. Low Temperature Polysilicon Thin Film Transistors in Advanced Display Technologies. Fort Belvoir, VA: Defense Technical Information Center, septiembre de 2000. http://dx.doi.org/10.21236/ada388339.
Texto completoPark, Chan E. Nanocomposite Gate Dielectrics With Nanoparticles for Organic Thin Film Transistors. Fort Belvoir, VA: Defense Technical Information Center, septiembre de 2006. http://dx.doi.org/10.21236/ada473096.
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