Artículos de revistas sobre el tema "SUB MICRON TECHNOLOGIES"
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DESPOTULI, ALEXANDER y ALEXANDRA ANDREEVA. "A SHORT REVIEW ON DEEP-SUB-VOLTAGE NANOELECTRONICS AND RELATED TECHNOLOGIES". International Journal of Nanoscience 08, n.º 04n05 (agosto de 2009): 389–402. http://dx.doi.org/10.1142/s0219581x09006328.
Texto completoYamazaki, T., K. Imai, H. Yoshida, Y. Kinoshita y H. Suzuki. "Process integration technologies for sub-half micron BiCMOS LSls". Electrical Engineering 79, n.º 5 (octubre de 1996): 329–33. http://dx.doi.org/10.1007/bf01235873.
Texto completoBude, J. D. y M. Mastrapasqua. "Impact ionization and distribution functions in sub-micron nMOSFET technologies". IEEE Electron Device Letters 16, n.º 10 (octubre de 1995): 439–41. http://dx.doi.org/10.1109/55.464810.
Texto completoManolopoulos, Spyros, K. Mathieson y R. Turchetta. "Simulation of monolithic active pixels in deep sub-micron technologies". Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 487, n.º 1-2 (julio de 2002): 181–87. http://dx.doi.org/10.1016/s0168-9002(02)00963-4.
Texto completoBoyes, E. D. "LVEDS For Advanced Materials and Semiconductor Technologies". Microscopy and Microanalysis 5, S2 (agosto de 1999): 314–15. http://dx.doi.org/10.1017/s1431927600014896.
Texto completoDuruk, Alper, Ece Olcay Güneş y Hakan Kuntman. "A new low voltage CMOS differential OTRA for sub-micron technologies". AEU - International Journal of Electronics and Communications 61, n.º 5 (mayo de 2007): 291–99. http://dx.doi.org/10.1016/j.aeue.2006.05.009.
Texto completoKaloyeros, Alain E. y Michael A. Fury. "Chemical Vapor Deposition of Copper for Multilevel Metallization". MRS Bulletin 18, n.º 6 (junio de 1993): 22–29. http://dx.doi.org/10.1557/s0883769400047291.
Texto completoBude, Jeff D. "Monte Carlo Simulations of Impact Ionization Feedback in MOSFET Structures". VLSI Design 8, n.º 1-4 (1 de enero de 1998): 13–19. http://dx.doi.org/10.1155/1998/10649.
Texto completoVishnoi, U. y T. G. Noll. "Area- and energy-efficient CORDIC accelerators in deep sub-micron CMOS technologies". Advances in Radio Science 10 (18 de septiembre de 2012): 207–13. http://dx.doi.org/10.5194/ars-10-207-2012.
Texto completoGul, Waqas, Maitham Shams y Dhamin Al-Khalili. "SRAM Cell Design Challenges in Modern Deep Sub-Micron Technologies: An Overview". Micromachines 13, n.º 8 (17 de agosto de 2022): 1332. http://dx.doi.org/10.3390/mi13081332.
Texto completoBaldi, L., B. Franzini, D. Pandini y R. Zafalon. "Design solutions for the interconnection parasitic effects in deep sub-micron technologies". Microelectronic Engineering 55, n.º 1-4 (marzo de 2001): 11–18. http://dx.doi.org/10.1016/s0167-9317(00)00423-8.
Texto completoGelpey, Jeffrey C., Steve McCoy, Dave Camm y Wilfried Lerch. "An Overview of ms Annealing for Deep Sub-Micron Activation". Materials Science Forum 573-574 (marzo de 2008): 257–67. http://dx.doi.org/10.4028/www.scientific.net/msf.573-574.257.
Texto completoArmigliato, A., R. Balboni, G. P. Carnevale, P. Colpani, S. Frabboni y G. Pavia. "Strain Field Distribution in Submicron Devices by TEM/CBED. A European Project". Microscopy and Microanalysis 6, S2 (agosto de 2000): 1076–77. http://dx.doi.org/10.1017/s1431927600037879.
Texto completoLudeke, Sascha y Arto Javanainen. "Proton Direct Ionization in Sub-Micron Technologies: Numerical Method for RPP Parameter Extraction". IEEE Transactions on Nuclear Science 69, n.º 3 (marzo de 2022): 254–63. http://dx.doi.org/10.1109/tns.2022.3147592.
Texto completoChen, X. Y., J. A. Johansen, C. Salm y A. D. van Rheenen. "On low-frequency noise of polycrystalline GexSi1−x for sub-micron CMOS technologies". Solid-State Electronics 45, n.º 11 (noviembre de 2001): 1967–71. http://dx.doi.org/10.1016/s0038-1101(01)00242-8.
Texto completoBalasubramanian, A., A. L. Sternberg, B. L. Bhuva y L. W. Massengill. "Crosstalk Effects Caused by Single Event Hits in Deep Sub-Micron CMOS Technologies". IEEE Transactions on Nuclear Science 53, n.º 6 (diciembre de 2006): 3306–11. http://dx.doi.org/10.1109/tns.2006.884675.
Texto completoPak, Murat, Zeliha Yilmaz y Aylin Ersoy. "A Novel OPC Technique for 2D Critical Dimension Optimization of Sub-micron Patterns using an Experimental Methodology". International Symposium on Microelectronics 2012, n.º 1 (1 de enero de 2012): 000702–9. http://dx.doi.org/10.4071/isom-2012-wa56.
Texto completoNGAN, A. H. W., P. C. WO, L. ZUO, H. LI y N. AFRIN. "THE STRENGTH OF SUBMICRON-SIZED MATERIALS". International Journal of Modern Physics B 20, n.º 25n27 (30 de octubre de 2006): 3579–86. http://dx.doi.org/10.1142/s0217979206040027.
Texto completoNunes, A. M., S. A. Moshkalev, P. J. Tatsch y A. M. Daltrini. "Plasma Etching of Polycrystalline Silicon using Thinning Technology for Application in CMOS and MEMS Technologies". Journal of Integrated Circuits and Systems 2, n.º 2 (18 de noviembre de 2007): 74–80. http://dx.doi.org/10.29292/jics.v2i2.269.
Texto completoSHANG, Kefeng, Wudi CAO, Weiwei HUAN, Nan JIANG, Na LU y Jie LI. "Effect of megapore particles packing on dielectric barrier discharge, O3 generation and benzene degradation". Plasma Science and Technology 24, n.º 1 (22 de noviembre de 2021): 015501. http://dx.doi.org/10.1088/2058-6272/ac3379.
Texto completoFossum, Jon Otto. "Clay nanolayer encapsulation, evolving from origins of life to future technologies". European Physical Journal Special Topics 229, n.º 17-18 (noviembre de 2020): 2863–79. http://dx.doi.org/10.1140/epjst/e2020-000131-1.
Texto completoKrishna, R. y Punithavathi Duraiswamy. "Low leakage 10T SRAM cell with improved data stability in deep sub-micron technologies". Analog Integrated Circuits and Signal Processing 109, n.º 1 (6 de mayo de 2021): 153–63. http://dx.doi.org/10.1007/s10470-021-01870-7.
Texto completoFobelets, K., W. Jeamsaksiri, C. Papavasilliou, T. Vilches, V. Gaspari, J. E. Velazquez-Perez, K. Michelakis, T. Hackbarth y U. König. "Comparison of sub-micron Si:SiGe heterojunction nFETs to Si nMOSFET in present-day technologies". Solid-State Electronics 48, n.º 8 (agosto de 2004): 1401–6. http://dx.doi.org/10.1016/j.sse.2004.01.017.
Texto completoNing, Zhenqiu, Yuri Sneyders, Wim Vanderbauwhede, Renaud Gillon, Marnix Tack y Paul Raes. "A compact test structure for characterisation of leakage currents in sub-micron CMOS technologies". Microelectronics Reliability 41, n.º 12 (diciembre de 2001): 1939–45. http://dx.doi.org/10.1016/s0026-2714(01)00100-7.
Texto completoJo, Seongmin y Yong Ho Song. "Leakage-aware adaptive routing for pipelined on-chip networks in ultra-deep sub-micron technologies". IEICE Electronics Express 9, n.º 24 (2012): 1887–92. http://dx.doi.org/10.1587/elex.9.1887.
Texto completoSamanta, Smrutilekha, Bhawna Tiwari, Pydi Ganga Bahubalindruni, Pedro Barquinha y Joao Goes. "Threshold voltage extraction techniques adaptable from sub-micron CMOS to large-area oxide TFT technologies". International Journal of Circuit Theory and Applications 45, n.º 12 (5 de abril de 2017): 2201–10. http://dx.doi.org/10.1002/cta.2340.
Texto completoDishari, Shudipto K. "(Invited) Novel Nature-Inspired Concepts to Design Ionomeric Nanomaterials for Energy Conversion and Storage Devices". ECS Meeting Abstracts MA2022-01, n.º 38 (7 de julio de 2022): 1707. http://dx.doi.org/10.1149/ma2022-01381707mtgabs.
Texto completoZhao, Gaoyang, Zhen Wei, Weilei Wang, Daohuan Feng, Aoxue Xu, Weili Liu y Zhitang Song. "Review on modeling and application of chemical mechanical polishing". Nanotechnology Reviews 9, n.º 1 (12 de marzo de 2020): 182–89. http://dx.doi.org/10.1515/ntrev-2020-0016.
Texto completoHwang, T., G. W. Wang, Y. Chang y C. L. Lau. "Comparison of Single and Tri‐Layer Technologies for Volume Production of Sub‐Half Micron Gate GaAs MESFETs". Journal of The Electrochemical Society 139, n.º 2 (1 de febrero de 1992): 625–28. http://dx.doi.org/10.1149/1.2069269.
Texto completoJavaheri, Reza y Reza Sedaghat. "Multi-valued logic mapping of resistive short and open delay-fault testing in deep sub-micron technologies". Microelectronics Reliability 49, n.º 2 (febrero de 2009): 178–85. http://dx.doi.org/10.1016/j.microrel.2008.11.010.
Texto completoWaghmare, Parag C., Samadhan B. Patil, Alka Kumbhar, R. O. Dusane y V. Ramgopal Rao. "Ultra-thin silicon nitride by hot wire chemical vapor deposition (HWCVD) for deep sub-micron CMOS technologies". Microelectronic Engineering 61-62 (julio de 2002): 625–29. http://dx.doi.org/10.1016/s0167-9317(02)00575-0.
Texto completoMillan, Alejandro, Manuel J. Bellido, Jorge Juan, David Guerrero, Paulino Ruiz-de-Clavijo y Julian Viejo. "Comprehensive Analysis on the Internal Power Dissipation of Static CMOS Cells in Ultra-Deep Sub-Micron Technologies". Journal of Low Power Electronics 6, n.º 1 (1 de abril de 2010): 93–102. http://dx.doi.org/10.1166/jolpe.2010.1059.
Texto completoRao Tirumalasetty, Venkata, C. V. Mohan Krishna, K. Sai Sree Tanmaie, T. Lakshmi Naveena y Ch Jonathan. "A novel design of high performance1-bit adder circuit at deep sub-micron technology". International Journal of Engineering & Technology 7, n.º 1.1 (21 de diciembre de 2017): 660. http://dx.doi.org/10.14419/ijet.v7i1.1.10822.
Texto completoBashirpour, Mohammad, Wei Cui, Angela Gamouras y Jean-Michel Ménard. "Scalable Fabrication of Nanogratings on GaP for Efficient Diffraction of Near-Infrared Pulses and Enhanced Terahertz Generation by Optical Rectification". Crystals 12, n.º 5 (10 de mayo de 2022): 684. http://dx.doi.org/10.3390/cryst12050684.
Texto completoCox Jr, Kevin L., Sai Guna Ranjan Gurazada, Keith E. Duncan, Kirk J. Czymmek, Christopher N. Topp y Blake C. Meyers. "Organizing your space: The potential for integrating spatial transcriptomics and 3D imaging data in plants". Plant Physiology 188, n.º 2 (2 de noviembre de 2021): 703–12. http://dx.doi.org/10.1093/plphys/kiab508.
Texto completoPandey, Ayush, Yixin Xiao, Maddaka Reddeppa, Yakshita Malhotra, Jiangnan Liu, Jungwook Min, Yuanpeng Wu y Zetian Mi. "A red-emitting micrometer scale LED with external quantum efficiency >8%". Applied Physics Letters 122, n.º 15 (10 de abril de 2023): 151103. http://dx.doi.org/10.1063/5.0129234.
Texto completoChrzanowska-Jeske, Malgorzata, Yang Xu y Marek Perkowski. "Logic Synthesis for a Regular Layout". VLSI Design 10, n.º 1 (1 de enero de 1999): 35–55. http://dx.doi.org/10.1155/1999/85272.
Texto completoXu, Yux, Ping Xiang y Xiaopeng Xie. "Comprehensive understanding of dark count mechanisms of single-photon avalanche diodes fabricated in deep sub-micron CMOS technologies". Solid-State Electronics 129 (marzo de 2017): 168–74. http://dx.doi.org/10.1016/j.sse.2016.11.009.
Texto completoVerhaege, Koen G. y Christian C. Russ. "Novel fully silicided ballasting and MFT design techniques for ESD protection in advanced deep sub-micron CMOS technologies". Microelectronics Reliability 41, n.º 11 (noviembre de 2001): 1739–49. http://dx.doi.org/10.1016/s0026-2714(01)00030-0.
Texto completoSexton, B. A. y R. J. Marnock. "Characterization of High Resolution Resists and Metal Shims by Scanning Probe Microscopy". Microscopy and Microanalysis 6, n.º 2 (marzo de 2000): 129–36. http://dx.doi.org/10.1007/s100059910012.
Texto completoMaj, P. "Fast and precise algorithms for calculating offset correction in single photon counting ASICs built in deep sub-micron technologies". Journal of Instrumentation 9, n.º 07 (9 de julio de 2014): C07009. http://dx.doi.org/10.1088/1748-0221/9/07/c07009.
Texto completoTANIGUCHI, Kazuhiro. "New Technologies for Scaled-down Cu Interconnection in Ultra-Large Scale Integrated Circuits. Copper Deposition System for Sub-micron Patterning." Journal of the Surface Finishing Society of Japan 49, n.º 11 (1998): 1176–79. http://dx.doi.org/10.4139/sfj.49.1176.
Texto completoByeon, Kyeong Jae, Sung Hoon Hong, Ki Yeon Yang, Seung Hyun Ra, Jin Ho Ahn y Heon Lee. "Embossing Lithography on Sticky Thermoset Polymer Using Ni Template". Solid State Phenomena 124-126 (junio de 2007): 147–51. http://dx.doi.org/10.4028/www.scientific.net/ssp.124-126.147.
Texto completoXiao, Tong y Malgorzata Marek-Sadowska. "Using Temporal and Functional Information in Crosstalk Aware Static Timing Analysis". VLSI Design 15, n.º 3 (1 de enero de 2002): 647–66. http://dx.doi.org/10.1080/1065514021000012264.
Texto completoWaghmare, Parag C., Samadhan B. Patil, Alka A. Kumbhar, Ramgopal Rao y R. O. Dusane. "Nitrogen dilution effects on structural and electrical properties of hot-wire-deposited a-SiN:H films for deep-sub-micron CMOS technologies". Thin Solid Films 430, n.º 1-2 (abril de 2003): 189–91. http://dx.doi.org/10.1016/s0040-6090(03)00108-1.
Texto completoChatterjee, Sayan. "Study and Analysis of Full Adder in Different Sub-Micron Technologies with an Area Efficient Layout of 4-Bit Ripple Carry Adder". International Journal of Innovative Research in Computer and Communication Engineering 03, n.º 06 (10 de junio de 2015): 4979–84. http://dx.doi.org/10.15680/ijircce.2015.0306005.
Texto completoNadeem, Irfan, Rehan Akhter, Shazeen Akhtar y Anjum Tauqir. "Optimization of Pulsed Fiber Laser Texturing for Solid Lubricant Deposition on a Ti/TiN Coated Aerospace Alloy". Key Engineering Materials 875 (febrero de 2021): 337–45. http://dx.doi.org/10.4028/www.scientific.net/kem.875.337.
Texto completoFaraji Rad, Zahra, Philip D. Prewett y Graham J. Davies. "An overview of microneedle applications, materials, and fabrication methods". Beilstein Journal of Nanotechnology 12 (13 de septiembre de 2021): 1034–46. http://dx.doi.org/10.3762/bjnano.12.77.
Texto completoParadhasaradhi, Damarla, Kollu Jaya Lakshmi, Yadavalli Harika, Busa Ravi Teja Sai y Golla Jayanth Krishna. "Comparative analysis of SRAM cell with leakage power reduction approaches". International Journal of Engineering & Technology 7, n.º 2.7 (18 de marzo de 2018): 863. http://dx.doi.org/10.14419/ijet.v7i2.7.11083.
Texto completoHeimbrook, L. A. "Analytical solutions for complex problems using multiple diagnostic techniques". Proceedings, annual meeting, Electron Microscopy Society of America 53 (13 de agosto de 1995): 686–87. http://dx.doi.org/10.1017/s0424820100139809.
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