Literatura académica sobre el tema "Sparse Vector Vector Multiplication"
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Artículos de revistas sobre el tema "Sparse Vector Vector Multiplication"
Tao, Yuan, Yangdong Deng, Shuai Mu, Zhenzhong Zhang, Mingfa Zhu, Limin Xiao y Li Ruan. "GPU accelerated sparse matrix-vector multiplication and sparse matrix-transpose vector multiplication". Concurrency and Computation: Practice and Experience 27, n.º 14 (7 de octubre de 2014): 3771–89. http://dx.doi.org/10.1002/cpe.3415.
Texto completoFilippone, Salvatore, Valeria Cardellini, Davide Barbieri y Alessandro Fanfarillo. "Sparse Matrix-Vector Multiplication on GPGPUs". ACM Transactions on Mathematical Software 43, n.º 4 (23 de marzo de 2017): 1–49. http://dx.doi.org/10.1145/3017994.
Texto completoERHEL, JOCELYNE. "SPARSE MATRIX MULTIPLICATION ON VECTOR COMPUTERS". International Journal of High Speed Computing 02, n.º 02 (junio de 1990): 101–16. http://dx.doi.org/10.1142/s012905339000008x.
Texto completoHaque, Sardar Anisul, Shahadat Hossain y M. Moreno Maza. "Cache friendly sparse matrix-vector multiplication". ACM Communications in Computer Algebra 44, n.º 3/4 (28 de enero de 2011): 111–12. http://dx.doi.org/10.1145/1940475.1940490.
Texto completoBienz, Amanda, William D. Gropp y Luke N. Olson. "Node aware sparse matrix–vector multiplication". Journal of Parallel and Distributed Computing 130 (agosto de 2019): 166–78. http://dx.doi.org/10.1016/j.jpdc.2019.03.016.
Texto completoHeath, L. S., C. J. Ribbens y S. V. Pemmaraju. "Processor-efficient sparse matrix-vector multiplication". Computers & Mathematics with Applications 48, n.º 3-4 (agosto de 2004): 589–608. http://dx.doi.org/10.1016/j.camwa.2003.06.009.
Texto completoYang, Xintian, Srinivasan Parthasarathy y P. Sadayappan. "Fast sparse matrix-vector multiplication on GPUs". Proceedings of the VLDB Endowment 4, n.º 4 (enero de 2011): 231–42. http://dx.doi.org/10.14778/1938545.1938548.
Texto completoRomero, L. F. y E. L. Zapata. "Data distributions for sparse matrix vector multiplication". Parallel Computing 21, n.º 4 (abril de 1995): 583–605. http://dx.doi.org/10.1016/0167-8191(94)00087-q.
Texto completoThomas, Rajesh, Victor DeBrunner y Linda S. DeBrunner. "A Sparse Algorithm for Computing the DFT Using Its Real Eigenvectors". Signals 2, n.º 4 (11 de octubre de 2021): 688–705. http://dx.doi.org/10.3390/signals2040041.
Texto completoSun, C. C., J. Götze, H. Y. Jheng y S. J. Ruan. "Sparse matrix-vector multiplication on network-on-chip". Advances in Radio Science 8 (22 de diciembre de 2010): 289–94. http://dx.doi.org/10.5194/ars-8-289-2010.
Texto completoTesis sobre el tema "Sparse Vector Vector Multiplication"
Ashari, Arash. "Sparse Matrix-Vector Multiplication on GPU". The Ohio State University, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=osu1417770100.
Texto completoRamachandran, Shridhar. "Incremental PageRank acceleration using Sparse Matrix-Sparse Vector Multiplication". The Ohio State University, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=osu1462894358.
Texto completoBalasubramanian, Deepan Karthik. "Efficient Sparse Matrix Vector Multiplication for Structured Grid Representation". The Ohio State University, 2012. http://rave.ohiolink.edu/etdc/view?acc_num=osu1339730490.
Texto completoMansour, Ahmad [Verfasser]. "Sparse Matrix-Vector Multiplication Based on Network-on-Chip / Ahmad Mansour". München : Verlag Dr. Hut, 2015. http://d-nb.info/1075409470/34.
Texto completoSingh, Kunal. "High-Performance Sparse Matrix-Multi Vector Multiplication on Multi-Core Architecture". The Ohio State University, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=osu1524089757826551.
Texto completoEl-Kurdi, Yousef M. "Sparse Matrix-Vector floating-point multiplication with FPGAs for finite element electromagnetics". Thesis, McGill University, 2006. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=98958.
Texto completoGodwin, Jeswin Samuel. "High-Performancs Sparse Matrix-Vector Multiplication on GPUS for Structured Grid Computations". The Ohio State University, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=osu1357280824.
Texto completoPantawongdecha, Payut. "Autotuning divide-and-conquer matrix-vector multiplication". Thesis, Massachusetts Institute of Technology, 2016. http://hdl.handle.net/1721.1/105968.
Texto completoThis electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Cataloged from student-submitted PDF version of thesis.
Includes bibliographical references (pages 73-75).
Divide and conquer is an important concept in computer science. It is used ubiquitously to simplify and speed up programs. However, it needs to be optimized, with respect to parameter settings for example, in order to achieve the best performance. The problem boils down to searching for the best implementation choice on a given set of requirements, such as which machine the program is running on. The goal of this thesis is to apply and evaluate the Ztune approach [14] on serial divide-and-conquer matrix-vector multiplication. We implemented Ztune to autotune serial divide-and-conquer matrix-vector multiplication on machines with different hardware configurations, and found that Ztuneoptimized codes ran 1%-5% faster than the hand-optimized counterparts. We also compared Ztune-optimized results with other matrix-vector multiplication libraries including the Intel Math Kernel Library and OpenBLAS. Since the matrix-vector multiplication problem is a level 2 BLAS, it is not as computationally intensive as level 3 BLAS problems such as matrix-matrix multiplication and stencil computation. As a result, the measurement in matrix-vector multiplication is more prone to error from factors such as noise, cache alignment of the matrix, and cache states, which lead to wrong decision choices for Ztune. We explored multiple options to get more accurate measurements and demonstrated the techniques that remedied these issues. Lastly, we applied the Ztune approach to matrix-matrix multiplication, and we were able to achieve 2%-85% speedup compared to the hand-tuned code. This thesis represents joint work with Ekanathan Palamadai Natarajan.
by Payut Pantawongdecha.
M. Eng.
Hopkins, T. M. "The design of a sparse vector processor". Thesis, University of Edinburgh, 1993. http://hdl.handle.net/1842/14094.
Texto completoBelgin, Mehmet. "Structure-based Optimizations for Sparse Matrix-Vector Multiply". Diss., Virginia Tech, 2010. http://hdl.handle.net/10919/30260.
Texto completoPh. D.
Libros sobre el tema "Sparse Vector Vector Multiplication"
Andersen, J. The scheduling of sparse matrix-vector multiplicatiion on a massively parallel DAP computer. Uxbridge: Brunel University, Department of Mathematics and Statistics, 1991.
Buscar texto completoItai, Yad-Shalom y Langley Research Center, eds. Fast multiresolution algorithms for matrix-vector multiplication. Hampton, Va: National Aeronautics and Space Administration, Langley Research Center, 1992.
Buscar texto completoM¨uhlherr, Bernhard, Holger P. Petersson y Richard M. Weiss. Quadratic Forms of Type F4. Princeton University Press, 2017. http://dx.doi.org/10.23943/princeton/9780691166902.003.0009.
Texto completoBisseling, Rob H. Parallel Scientific Computation. Oxford University Press, 2020. http://dx.doi.org/10.1093/oso/9780198788348.001.0001.
Texto completoMann, Peter. Legendre Transforms. Oxford University Press, 2018. http://dx.doi.org/10.1093/oso/9780198822370.003.0033.
Texto completoAlgebraic And Geometric Aspects Of Integrable Systems And Random Matrices Ams Special Session Algebraic And Geometric Aspects Of Integrable Systems And Random Matrices January 67 2012 Boston Ma. American Mathematical Society, 2013.
Buscar texto completoCapítulos de libros sobre el tema "Sparse Vector Vector Multiplication"
Vassiliadis, Stamatis, Sorin Cotofana y Pyrrhos Stathis. "Vector ISA Extension for Sparse Matrix-Vector Multiplication". En Euro-Par’99 Parallel Processing, 708–15. Berlin, Heidelberg: Springer Berlin Heidelberg, 1999. http://dx.doi.org/10.1007/3-540-48311-x_100.
Texto completoMaeda, Hiroshi y Daisuke Takahashi. "Parallel Sparse Matrix-Vector Multiplication Using Accelerators". En Computational Science and Its Applications – ICCSA 2016, 3–18. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-42108-7_1.
Texto completoPlaksa, Sergiy A. y Vitalii S. Shpakivskyi. "Differentiation in Vector Spaces". En Monogenic Functions in Spaces with Commutative Multiplication and Applications, 13–23. Cham: Springer Nature Switzerland, 2023. http://dx.doi.org/10.1007/978-3-031-32254-9_2.
Texto completoHishinuma, Toshiaki, Hidehiko Hasegawa y Teruo Tanaka. "SIMD Parallel Sparse Matrix-Vector and Transposed-Matrix-Vector Multiplication in DD Precision". En High Performance Computing for Computational Science – VECPAR 2016, 21–34. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-61982-8_4.
Texto completoMonakov, Alexander y Arutyun Avetisyan. "Implementing Blocked Sparse Matrix-Vector Multiplication on NVIDIA GPUs". En Lecture Notes in Computer Science, 289–97. Berlin, Heidelberg: Springer Berlin Heidelberg, 2009. http://dx.doi.org/10.1007/978-3-642-03138-0_32.
Texto completoAlAhmadi, Sarah, Thaha Muhammed, Rashid Mehmood y Aiiad Albeshri. "Performance Characteristics for Sparse Matrix-Vector Multiplication on GPUs". En Smart Infrastructure and Applications, 409–26. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-13705-2_17.
Texto completoÇatalyürek, Ümit V. y Cevdet Aykanat. "Decomposing irregularly sparse matrices for parallel matrix-vector multiplication". En Parallel Algorithms for Irregularly Structured Problems, 75–86. Berlin, Heidelberg: Springer Berlin Heidelberg, 1996. http://dx.doi.org/10.1007/bfb0030098.
Texto completoWellein, Gerhard, Georg Hager, Achim Basermann y Holger Fehske. "Fast Sparse Matrix-Vector Multiplication for TeraFlop/s Computers". En Lecture Notes in Computer Science, 287–301. Berlin, Heidelberg: Springer Berlin Heidelberg, 2003. http://dx.doi.org/10.1007/3-540-36569-9_18.
Texto completoMonakov, Alexander, Anton Lokhmotov y Arutyun Avetisyan. "Automatically Tuning Sparse Matrix-Vector Multiplication for GPU Architectures". En High Performance Embedded Architectures and Compilers, 111–25. Berlin, Heidelberg: Springer Berlin Heidelberg, 2010. http://dx.doi.org/10.1007/978-3-642-11515-8_10.
Texto completoVuduc, Richard W. y Hyun-Jin Moon. "Fast Sparse Matrix-Vector Multiplication by Exploiting Variable Block Structure". En High Performance Computing and Communications, 807–16. Berlin, Heidelberg: Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11557654_91.
Texto completoActas de conferencias sobre el tema "Sparse Vector Vector Multiplication"
Zhuo, Ling y Viktor K. Prasanna. "Sparse Matrix-Vector multiplication on FPGAs". En the 2005 ACM/SIGDA 13th international symposium. New York, New York, USA: ACM Press, 2005. http://dx.doi.org/10.1145/1046192.1046202.
Texto completoHaque, Sardar Anisul, Shahadat Hossain y Marc Moreno Maza. "Cache friendly sparse matrix-vector multiplication". En the 4th International Workshop. New York, New York, USA: ACM Press, 2010. http://dx.doi.org/10.1145/1837210.1837238.
Texto completoLi, Haoran, Harumichi Yokoyama y Takuya Araki. "Merge-Based Parallel Sparse Matrix-Sparse Vector Multiplication with a Vector Architecture". En 2018 IEEE 20th International Conference on High Performance Computing and Communications; IEEE 16th International Conference on Smart City; IEEE 4th International Conference on Data Science and Systems (HPCC/SmartCity/DSS). IEEE, 2018. http://dx.doi.org/10.1109/hpcc/smartcity/dss.2018.00038.
Texto completoShah, Monika. "Sparse Matrix Sparse Vector Multiplication - A Novel Approach". En 2015 44th International Conference on Parallel Processing Workshops (ICPPW). IEEE, 2015. http://dx.doi.org/10.1109/icppw.2015.18.
Texto completoBuluç, Aydin, Jeremy T. Fineman, Matteo Frigo, John R. Gilbert y Charles E. Leiserson. "Parallel sparse matrix-vector and matrix-transpose-vector multiplication using compressed sparse blocks". En the twenty-first annual symposium. New York, New York, USA: ACM Press, 2009. http://dx.doi.org/10.1145/1583991.1584053.
Texto completoZhuowei Wang, Xianbin Xu, Wuqing Zhao, Yuping Zhang y Shuibing He. "Optimizing sparse matrix-vector multiplication on CUDA". En 2010 2nd International Conference on Education Technology and Computer (ICETC 2010). IEEE, 2010. http://dx.doi.org/10.1109/icetc.2010.5529724.
Texto completoPinar, Ali y Michael T. Heath. "Improving performance of sparse matrix-vector multiplication". En the 1999 ACM/IEEE conference. New York, New York, USA: ACM Press, 1999. http://dx.doi.org/10.1145/331532.331562.
Texto completoSun, Junqing, Gregory Peterson y Olaf Storaasli. "Sparse Matrix-Vector Multiplication Design on FPGAs". En 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007). IEEE, 2007. http://dx.doi.org/10.1109/fccm.2007.56.
Texto completoMerrill, Duane y Michael Garland. "Merge-Based Parallel Sparse Matrix-Vector Multiplication". En SC16: International Conference for High Performance Computing, Networking, Storage and Analysis. IEEE, 2016. http://dx.doi.org/10.1109/sc.2016.57.
Texto completoQuang Anh, Pham Nguyen, Rui Fan y Yonggang Wen. "Reducing Vector I/O for Faster GPU Sparse Matrix-Vector Multiplication". En 2015 IEEE International Parallel and Distributed Processing Symposium (IPDPS). IEEE, 2015. http://dx.doi.org/10.1109/ipdps.2015.100.
Texto completoInformes sobre el tema "Sparse Vector Vector Multiplication"
Vuduc, R. y H. Moon. Fast sparse matrix-vector multiplication by exploiting variable block structure. Office of Scientific and Technical Information (OSTI), julio de 2005. http://dx.doi.org/10.2172/891708.
Texto completoCalahan, D. A. Sparse Elimination on Vector Multiprocessors. Fort Belvoir, VA: Defense Technical Information Center, mayo de 1988. http://dx.doi.org/10.21236/ada204321.
Texto completoCalahan, D. A. Sparse Elimination on Vector Multiprocessors. Fort Belvoir, VA: Defense Technical Information Center, abril de 1985. http://dx.doi.org/10.21236/ada158274.
Texto completoCalahan, D. A. Sparse Elimination on Vector Multiprocessors. Fort Belvoir, VA: Defense Technical Information Center, abril de 1986. http://dx.doi.org/10.21236/ada175121.
Texto completoHendrickson, B., R. Leland y S. Plimpton. An efficient parallel algorithm for matrix-vector multiplication. Office of Scientific and Technical Information (OSTI), marzo de 1993. http://dx.doi.org/10.2172/6519330.
Texto completoLiberty, Edo y Steven W. Zucker. The Mailman Algorithm: A Note on Matrix Vector Multiplication. Fort Belvoir, VA: Defense Technical Information Center, enero de 2008. http://dx.doi.org/10.21236/ada481737.
Texto completoSimon, Horst D. Ordering Methods for Sparse Matrices and Vector Computers. Fort Belvoir, VA: Defense Technical Information Center, agosto de 1986. http://dx.doi.org/10.21236/ada186350.
Texto completoLewis, John G. Ordering Methods for Sparse Matrices and Vector Computers. Fort Belvoir, VA: Defense Technical Information Center, marzo de 1988. http://dx.doi.org/10.21236/ada198291.
Texto completoGropp, W. D., D. K. Kaushik, M. Minkoff y B. F. Smith. Improving the performance of tensor matrix vector multiplication in quantum chemistry codes. Office of Scientific and Technical Information (OSTI), mayo de 2008. http://dx.doi.org/10.2172/928654.
Texto completoTolleson, Blayne, Matthew Marinella, Christopher Bennett, Hugh Barnaby, Donald Wilson y Jesse Short. Vector-Matrix Multiplication Engine for Neuromorphic Computation with a CBRAM Crossbar Array. Office of Scientific and Technical Information (OSTI), febrero de 2022. http://dx.doi.org/10.2172/1846087.
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