Tesis sobre el tema "Source driver"

L’aéronautique tend à hybrider la propulsion et à électrifier de plus en plus de fonctions. Ceci entraîne une augmentation de la tension du réseau de bord HVDC afin de répondre à ces nouvelles contraintes sur les réseaux et systèmes électroniques. Pour atteindre ces objectifs, les nouveaux composants à semi-conducteurs de puissance SiC en calibre 3.3kV semblent être une alternative pro- metteuse à la filière Silicium IGBT. Cependant, leur faible maturité par rapport à la technologie Si est le principal frein à leur implémentation dans les réseaux de bords. Les travaux de recherche s’inscrivent dans le projet RA- PID AM-PM. L’objectif du projet est de concevoir un module de puissance bras d’onduleur 3,3kV@500A en technologie SiC en apportant une rupture technologique sur le packaging de puissance et son monitoring. Les travaux de recherche concernent le développement d’un circuit de commande intelligent permettant de fiabiliser le module de puissance et d’assurer des commutations sécurisées du semiconducteur. A partir des études sur la fiabilité des compo- sants SiC, deux indicateurs de vieillissement ont été identifiés, la résistance à l’état passant du module et le courant de fuite de grille du composant semiconducteur. Des circuits de surveillance embarqués de ces indicateurs ont été proposés et une nouvelle topologie de com- mande des semiconducteurs, le source driver, est proposée afin de rendre ces circuits compatibles. Pour finir, un démonstrateur spécialement conçu pour le module AM-PM est testé sur module SiC
Aeronautics tend to hybridize propulsion and electrify more and more functions on board. This leads to an increase in the voltage of the onboard network in order to meet these new constraints from electronic systems. To achieve these objectives, the new 3.3kV-rating SiC power semiconductor components seem to be a promising alternative to the Silicon IGBT sector. However, SiC technology’s low level of maturity compared to Si technol- ogy is the main obstacle to its implementation. The research work is part of the AM-PM RAPID project. The project objective is to design a 3.3kV@500A inverter arm power module in SiC technology by providing a technological break- through in power packaging and its monitoring. The research work focuses on the development of the gate driver and its intelligent functions to make the power module more reliable and to ensure secure switching of the semiconductor. From studies on the SiC component’s reliability, two aging indicators have been identified, the on-state resistance of the module and the gate leakage current of the semiconductor compo- nent. On-board monitoring circuits for these in- dicators have been proposed and a new semi- conductor control topology, the source driver, is proposed in order to make these circuits com- patible. Finally, a demonstrator specially de- signed for the AM-PM module is tested on a SiC module

The purpose of this thesis is to develop a low-cost, high power laser diode/fiber illumination system and to design the driver electronics of the spatial light modulator (SLM) for holographic, three dimensional (3D) imaging. A miniaturized laser diode/fiber/polarizing illumination system capable of 15mW of output at a wavelength of 690nm is designed, fabricated, and tested. The size limitations of various commercially available SLM drivers are described and the design to overcome them is suggested. The design describes in detail the timing considerations of the hardware interface and the psuedocode of the software interface between the host computer and the SLM. Experiments carried out to study the spatial uniformity of the SLM and the distortion due to the beam splitter on the structured output from the LIM are explained.
Master of Science

The aim of this thesis is to design, produce and verify the operation of two different LED drivers for automotive industry, which controls the ultra-bright white LEDs. At the beginning of a brief introduction explaining the principle of operation of LEDs. Furthermore theory describes the functions of all three basic drivers involved as buck, boost and buck-boost. Based on the requirements are selected ICs suitable for this implementation, theoretically described their block diagrams including the individual diagrams and eventually these samples are made, revived and measured their parameters.

Laser Diodes (LDs) are semiconductor coherent lightening devices which are widely used in many fields such as defence, industry, medical and optical communications. They have advantageous characteristics such as having higher electrical-to-optical and optical-to-optical conversion efficiencies from pump source to useful output power when compared to flash lamps, which makes them the best devices to be used in range finding applications. Optical output power of lasers depends on current through LDs. Therefore, there is a relationship between operating life and work performance of LDs and performance of drive power supply. Even, weak drive current, small fluctuations of drive current can result in much greater fluctuations of optical output power and device parameters which will reduce reliability of LDs. In this thesis, a hardware for a fast and high power pulsed LD driver is designed for laser range finder and is based on linear current source topology. The driver is capable of providing pulses up to 120A with 250&mu
s pulse width and frequencies ranging from 20Hz to 40Hz. It provides current pulses for two LD arrays controlled with a proportional-integral (PI) controller and protect LDs against overcurrents and overvoltages. The proposed current control in the thesis reduces current regulation to less than 1% and diminishes overshoots and undershoots to a value less than 1% of steady-state value, which improves safe operation of LDs. Moreover, protection functions proposed in the thesis are able to detect any failure in driver and interrupt LD firing immediately, which guarantees safe operation of LDs.

The two projects of the ITER Neutral Beam Test Facility (NBTF) [1] in Padova are MITICA, the full scale prototype of the heating Neutral Beam Injector (NBI) and SPIDER, the full-size negative ion source of the NBI. Both include a Radio Frequency (RF) Ion Source where plasma is produced by the inductive coupling with coils wound around vacuum chambers called drivers. Each coil is fed at 1 MHz up to a power of 100 kW, which corresponds to a voltage of about 12 kV rms, with nominal plasma parameters. The ion source design derives from the R&D carried out at the Max-Planck-Institut für Plasmaphysik (IPP) during the past years [2] [3], with additional improvements to achieve the desired performance in long duration pulses (up to 1 h) on a full ITER-size device, in a vacuum environment and with optimized beamlet optics [4] [5] [6] [7]. Among the various issues connected to the fulfillment of the requirements for ITER, special attention should be paid to those related to the voltage hold off in vacuum of the beam source components; not only for the acceleration grids subjected to very high dc voltage but also for the RF circuits of the ion source and in particular the RF drivers. Some concern in this regard has arisen since several years ago and in fact, also in IPP, the last two test facilities RADI and ELISE have been realized in such a way the areas containing the drivers that can be put under vacuum (lower than 10 4 mbar [8]) to better simulate the ITER operating condition [9] [10]. For the ITER heating NBI the concern is deeper, since the rear side of the ion source, where the drivers are located, is not directly pumped and the pressure at the moment is only estimated by means of simulation. The voltage hold off of the driver coils is essential to operate the ion source at full power and thus to reach the full performance. The topic of the PhD activity belongs to the framework of the RF R&D task of the NBTF workprogramme, and was focused on the development of a simple, accessible and flexible device called "High Voltage Radio Frequency Test Facility" (HVRFTF) to characterize the dielectric strength in vacuum of the RF drivers of SPIDER and MITICA ion sources and to effectively address the issues related to their voltage hold off when subjected to radiofrequency E-fields at low pressure. The experimental arrangement worked out to reproduce the desired operating conditions consists in a vacuum vessel capable to host different types of driver mock-ups, called Devices Under Test (DUT) in the thesis, a gas injection and pumping system to supply the desired gas species up to the test pressure and a RF circuit designed to produce the high voltage. The HVRFTF allows the variation of the quantities which influence the voltage hold off, such as the pressure, geometry and materials of the DUTs, in order to perform parametric analyses. The idea behind this flexibility is not only to execute tests relevant for the verification of the driver insulation design, but also to quantify operative margins and to identify possible improvements or hints for the design of new drivers. Part of the thesis work was the identification of the requirements of the HVRFTF, consisting in analyses carried out to identify the driver operating conditions relevant to the voltage hold off (geometry, materials and pressure). I estimated the voltage applied to the RF coil of the drivers at full power, and the related E-field, with the identification of the most stressed area. I conceived several driver mockups to be tested within the HVRFTF: the best configuration worked out for the scope is based on a couple of electrodes (one plane and one spherical) with a dielectric material in between. However, the studies highlighted that a single sphere diameter is not sufficiently accurate to cover the entire gap range of interest; in particular the sphere diameter has to be increased as far as the gap increases. Nevertheless, three of these DUTs allow reproducing the desired E-field trend. I decided to test at first a planar circular electrode pair with Rogowski profile, even if it is not suitable as driver mock-up, since it is a test configuration widely treated in the literature and it generates the most reproducible experimental regime, thus allowing a validation of the basic test arrangement. As far as the RF high voltage generation is concerned, the feasibility study led me to work out a resonant circuit matched through a reversed L-type network, supplied by a low voltage amplifier. As a first design approach, the load of the circuit to be matched to the low voltage amplifier output impedance could be the DUT, but the practical implementation of this concept in the design of the RF circuit is complex due to the variation of the DUT impedance during the test campaign and the effect of stray impedances of circuit components. From the electrical point of view, the DUT represents a capacitance with an equivalent series resistance; both depend on the geometry of the electrode pair, on the gap between the two electrodes, and on the properties of the dielectric material in between. The selected approach was to design a suitable inductor to be connected in parallel to the DUT and to use their equivalent impedance as the load impedance to be matched. With this method and once verified that the real part of the load impedance is lower than the real part of the amplifier output impedance, the matching network can be composed by capacitors only, that were designed to assure the matching condition at the nominal frequency. Variable capacitors can be adopted in order to modify the resonance frequency and maintain the matching condition in the whole frequency range of interest. Another important phase of my design work was the development of the electrical model of the components to be used, in order to verify and quantify the real power requirements as a function of the voltage to be reached with the HVRFTF. The realization of the HVRFTF was completed in 2016 with a first RF circuit composed of fixed capacitors and supplied by a RF amplifier rated for a limited power, both already available at Consorzio RFX. The test campaigns on a stainless steel planar circular electrode pair proved the correct operation of the overall plant and allowed obtaining the first experimental results, including in particular the achievement of a voltage up to 10 kV rms. Moreover the tests gave the opportunity to improve the knowledge in this field, discover unexpected issues relevant to specific operating conditions and investigate on possible solutions. Another important fallout of the tests was the validation of the models developed during the design phase, essential for the continuation of the R&D work. The thesis is organized as follows: - Chapter 1 presents the thesis background: starting from the identification of the need for sustainable energy sources, nuclear fusion is identified as a suitable contributor. ITER is the next step toward nuclear fusion and PRIMA, the ITER neutral beam test facility is one of the main supporting R&D projects, with its two experiments SPIDER and MITICA. The experiments are introduced with a brief description. - Chapter 2 enters more in details in one of the components of SPIDER and MITICA beam sources which is considered critical as far as the voltage holding is concerned: the driver. Its operating conditions are described in this chapter. - Chapter 3 presents the High Voltage Radio Frequency Test Facility (HVRFTF), a small, accessible and flexible testbed to experimentally characterize the dielectric strength in vacuum of the driver. - Chapter 4 reports on the analyses carried out for the definition of the devices to be tested within the HVTFTF, relevant mockups of the drivers. - Chapter 5 reports on the studies and the design of the circuit used in the HVRFTF for the generation of high voltage at radiofrequency. - Chapter 6 presents the experimental results obtained so far with the HVRFTF. - Conclusions.
La stazione sperimentale Neutral Beam Test Facility (NBTF) dell'esperimento ITER [1], in costruzione a Padova presso il Consorzio RFX, ospita due esperimenti: MITICA, il prototipo in scala 1:1 del sistema di iniezione di particelle neutre per il riscaldamento del plasma in ITER (NBI) e SPIDER, il prototipo della sorgente ionica impiegata dal NBI. Entrambi i progetti impiegano 8 "driver" a radiofrequenza (RF), ovvero sorgenti di plasma, per la generazione di ioni; ciascun driver è costituto da una camera da vuoto cilindrica su cui è avvolta una bobina che si accoppia induttivamente con il plasma. Ogni bobina è alimentata da un'onda sinusoidale di tensione a 1 MHz, con una potenza fino a 100 kW alla quale corrisponde, con i parametri nominali di plasma, un valore efficace di tensione tra i terminali di circa 12 kV rms. La soluzione progettuale della sorgente ionica deriva dall'attività di ricerca e sviluppo effettuata al Max-Planck-Institut für Plasmaphysik (IPP) negli scorsi anni [2] [3], ulteriormente studiata e sviluppata per raggiungere le prestazioni desiderate per ITER ed in particolare quelle legate al miglioramento dell'ottica del fascio e al funzionamento in vuoto con impulsi di durata prolungata fino ad un'ora [4] [5] [6] [7]. Tra le varie problematiche legate al soddisfacimento dei requisiti per ITER, particolare attenzione è rivolta alla tenuta della tensione in vuoto dei componenti e dei circuiti dell'iniettore, non solo per le griglie di accelerazione che sono soggette a tensioni dc fino a 1 MV, ma anche per i circuiti RF della sorgente e in particolare dei driver. La consapevolezza della criticità di questo aspetto è maturata negli ultimi anni e di conseguenza è cresciuta l'attenzione al problema: anche i più recenti esperimenti presso IPP (RADI ed ELISE) prevedono la possibilità di mettere in vuoto (con pressione inferiore a 10-4 mbar [8]) il volume contenente i driver, per poter simulare meglio le condizioni operative di ITER [9] [10]. Per l'iniettore di neutri di ITER la preoccupazione è anche maggiore, poiché non vi potrà essere controllo diretto della pressione nella regione dei driver; al momento essa è stimata per mezzo di simulazioni numeriche. La tenuta di tensione della bobina dei driver è essenziale al fine di operare la sorgente alla piena potenza, requisito per il raggiungimento delle piene prestazioni dell'iniettore. L'argomento del dottorato ricade nell'ambito della task "RF R&D" del programma di lavoro della NBTF ed è focalizzato allo sviluppo di un esperimento semplice, accessibile e flessibile chiamato "High Voltage RadioFrequency Test Facility" (HVRFTF), indirizzato allo studio delle problematiche legate alla tenuta di tensione in vuoto dei driver RF delle sorgenti di SPIDER e MITICA. Il setup sperimentale di HVRFTF consente di ricreare le condizioni operative delle bobine dei driver e consiste in una camera da vuoto capace di ospitare diversi dispositivi in prova, chiamati Device Under Test (DUT) nella tesi, un sistema di pompaggio e immissione gas in grado di regolare la pressione e la specie di gas all'interno della camera e di un circuito a radiofrequenza in grado di produrre l'alta tensione. HVRFTF permette la variazione delle grandezze fisiche che influenzano la tenuta di tensione, come ad esempio la pressione, la geometria e i materiali dei dispositivi in prova, al fine di poter effettuare analisi parametriche. Questa flessibilità permette non solo di verificare il progetto dell'isolamento dei driver, ma anche di quantificarne i margini operativi e di identificare possibili miglioramenti o spunti per il progetto elettrico di nuovi driver. Parte del lavoro di tesi è stato dedicato alla definizione dei requisiti di HVRFTF, a partire dallo studio della sorgente e delle condizioni operative dei driver che ne influenzano la tenuta di tensione. Ho stimato la tensione applicata alla bobina RF dei driver a piena potenza e ricavato la relativa mappa di campo elettrico, che mi ha consentito di identificare la regione maggiormente stressata. In seguito ho concepito diversi possibili modelli di driver da testare all'interno di HVRFTF: il migliore è basato su una coppia di elettrodi (un piano e una sfera) tra i quali è interposto un disco di materiale dielettrico. Tre sfere di diametro direttamente proporzionale al gap sono necessarie per riprodurre l'andamento del campo elettrico nell'intero intervallo di variazione del gap. Per le prime prove con HVRFTF ho deciso di testare degli elettrodi piani circolari con profilo di Rogowski, anche se non rappresentano un buon modello del driver, al fine di validare il setup sperimentale. L'uso di questo tipo di elettrodi è infatti ampiamente diffuso e documentato in letteratura, perché essi sono in grado di generare condizioni sperimentali riproducibili. Per la generazione di alta tensione a radiofrequenza, tra possibili soluzioni ho adottato un circuito risonante adattato all'impedenza di uscita dell'amplificatore che lo alimenta, attraverso una rete a L rovesciato. In prima istanza, il carico da adattare potrebbe essere l'impedenza del DUT, che dal punto di vista elettrico risulta essere una capacità in serie ad una resistenza, entrambe dipendenti dalla geometria degli elettrodi, dalla loro distanza (gap) e dalle proprietà del materiale dielettrico interposto tra loro. Tuttavia l'implementazione pratica di quest'approccio è complessa: l'impedenza del DUT durante la campagna sperimentale è variabile; inoltre i componenti del circuito di adattamento (almeno uno dei quali dovrebbe essere un induttore), introducono impedenze parassite non note, a loro volta da compensare. Una soluzione ragionevole che ho infine elaborato consiste nel collegare in parallelo al DUT un induttore di caratteristiche opportune e di utilizzare l'impedenza equivalente come carico da adattare. Con questo approccio, una volta dimensionati i componenti in modo tale che la parte reale dell'impedenza di carico sia minore della parte reale dell'impedenza di uscita dell'amplificatore, la rete di adattamento a L rovesciato risulta composta da soli condensatori, le cui capacità si ricavano imponendo il vincolo di adattamento di impedenza e la frequenza di risonanza. L'utilizzo di condensatori aventi capacità regolabile permette infine di modificare la frequenza di risonanza in modo da poter operare in tutto l'intervallo di frequenze di interesse. Per il progetto del circuito RF ho sviluppato modelli elettrici dettagliati per ogni componente impiegato, al fine di verificare e quantificare i requisiti di potenza attiva in funzione della tensione da raggiungere con HVRFTF. La realizzazione preliminare di HVRFTF è stata completata nel 2016 con un circuito a radiofrequenza composto da condensatori aventi capacità fissa, alimentato da un amplificatore RF di potenza limitata; sia i condensatori che l'amplificatore erano già disponibili al Consorzio RFX. La campagna di prove sperimentali con la coppia di elettrodi piani in acciaio ha dimostrato il corretto funzionamento dell'impianto sperimentale con il raggiungimento della tensione di 10 kV, ha consentito di ottenere i primi risultati sperimentali e di validare i modelli sviluppati durante la fase di progetto. Il lavoro presentato in questa tesi è così organizzato: - Capitolo 1: si presenta il contesto tematico all'interno del quale è stata sviluppata la tesi; a partire dal problema energetico, una possibile soluzione è un mix di fonti sostenibili tra cui la fusione nucleare. Si presentano in seguito ITER, il prossimo passo verso la fusione e "ITER Neutral Beam Test Facility", uno dei principali progetti a supporto di ITER con i suoi due esperimenti: SPIDER e MITICA. - Capitolo 2: si descrive in dettaglio uno dei componenti delle sorgenti ioniche di SPIDER e MITICA, ritenuto critico dal punto di vista della tenuta di tensione: il driver. Si presentano le analisi eseguite per derivare le sue condizioni operative. - Capitolo 3: si presenta l'esperimento "High Voltage Radio Frequency Test Facility" (HVRFTF), un piccolo impianto per la caratterizzazione sperimentale della rigidità dielettrica in vuoto dei driver. - Capitolo 4: si presentano le analisi effettuate per la definizione dei dispositivi da testare con HVRFTF, con l'obiettivo che essi possano riprodurre condizioni operative simili a quelle del driver per lo studio della problematica di interesse . - Capitolo 5: si riportano gli studi per la generazione di alta tensione a radiofrequenza e il progetto del circuito risonante adottato per HVRFTF. - Capitolo 6: si presentano i risultati ottenuti con HVRFTF. - Conclusioni.

Згідно теми дипломної роботи, проаналізовано актуальні проблеми експлуатації освітлювальних систем з LED-приладами. Проведено дослідження методів регулювання характеристик LED-приладів. Здійснено розрахунок електричних навантажень комплексу устаткування та освітлювальної установки. Здійснено проектування освітлювальної установки та аварійного освітлення. Запропоновано методи підвищення надійності функціонування освітлювальних систем з LED-приладами. Обгрунтовано ефективність та економічність методики переходу на LED-джерела світла.
According to the topic of diploma project, actual problems of operation of lighting systems with LED devices are analyzed. The methods of regulation of the characteristics of LED devices are investigated. The electrical loads of the equipment complex and the lighting system are calculated. The complex of lighting system and emergency lighting is designed. Methods of increasing the reliability of the operation of lighting systems with LED devices are proposed. The efficiency and cost-effectiveness of the method of switching to LED light sources are substantiated.
РЕФЕРАТ ... 3 ЗМІСТ.. 4 ВСТУП ... 6 І.АНАЛІТИЧНА ЧАСТИНА 1.1 Загальні відомості про напівпровідникові світлові прилади 1.1.1 Принцип роботи, технологія виробництва та переваги світлодіоднихсвітлових приладів. Основні параметри LED-ламп ... 9 1.1.2 Типи світлодіодів. Ступені захисту світлових приладів .... 16 1.1.3 Блоки живлення світлодіодних світильників .... 20 1.2 Актуальні проблеми використання напівпровідникових СП в промислових освітлювальних установках. Шляхи їх вирішення ... 22 1.3.1 Застосування NTC-термісторів обмеження струму ... 28 1.3.2 Застоcування автоматичних вимикачів ... 29 1.3.3 Перетворювальні плати ... 34 1.3.4 Світлодіодні драйвери керування. Протокол DALI. Драйвери плавного включення... 38 II. НАУКОВО-ДОСЛІДНА ЧАСТИНА 2.1 Дослідження та вибір системи керування ОУ. ... 47 III. ТЕХНОЛОГІЧНА ЧАСТИНА 3.1 Аналіз об’єктів. Особливості роботи цехів. ... 61 IV. ПРОЕКТНО-КОНСТРУКТОРСЬКА ЧАСТИНА 4.1 Визначення розрахункових навантажень ... 66 4.2 Розрахунок потужності розподільчих пунктів ... 69 4.3 Розрахунок потужності окремих електроприймачів, які не входять в РП.... 71 4.4 Визначення центру електричних навантажень .... 74 4.5 Вибір світлових приладів ... 78 4.6 Нормоване освітлення. .... 84 5 4.7 Вибір системи освітлення. Розрахунок кількості світильниківв середовищі програми RELUX. ... 85 4.8 Аварійне освітлення ... 89 V. СПЕЦІАЛЬНА ЧАСТИНА 5.1 Аналіз переваг та ефективності програми світлотехнічного розрахунку та 3D-моделювання RELUX .... 94 5.2 Аналіз переваг та ефективності програми моделювання КОМПАС-3D .... 98 VІ. ОРГАНІЗАЦІЙНО-ЕКОНОМІЧНА ЧАСТИНА 6.1 Фізичний і моральний знос. Амортизація, модернізація і ремонт основних фондів. ... 101 6.2 Оцінка економічної ефективності переходу з ЛР на LED-джерела світла. Розрахунок затрат на реалізацію проекту .... 105 VIІ. ОХОРОНА ПРАЦІ ТА БЕЗПЕКА В НАДЗВИЧАЙНИХ СИТУАЦІЯХ 7.1 Вплив умов освітленості на організм людини .... 109 7.2 Електрозахисні засоби та запобіжні пристосування .... 111 7.3 Протипожежні вимоги до улаштування та експлуатації електроустановок... 112 7.4 Плануваннязаходів цивільного захисту на підприємствах електротехнічної та світлотехнічної галузі у випадку надзвичайних ситуацій... 115 7.5 Захист персоналу об’єктів енергетикивід впливу іонізуючого випромінювання .... 118 VIIІ. ЕКОЛОГІЯ 8.1 Сучасні тенденції електроспоживання .... 121 8.2 Аналіз сучасних джерел світла та ступеня їх екологічності ... 123 ВИСНОВКИ ...127 ПЕРЕЛІК ПОСИЛАНЬ ... 128 ДОДАТКИ ... 132

Goal of this semestral thesis is to design power converter which is to be used for measurement. The converter consists of two forward converters in push-pull topology. The converter is to behave as a constant current source with maximum open-circuit voltage of 1000V. Maximum current is 5A. The current range is split into three sub-ranges, to meet the strict requirements on ripple current. The range of currents is 0-5A. The operating frequency of converter is 34KHz. The converter will be charged using two portable electric generators with output voltage 230V.

This diploma thesis deals with the design and construction of a three-axis CNC machine primarily designed for PCB drilling and production of front panels for various electronic devices. All three axes are driven by stepper motors NEMA 23 which are connected to stepper motor drivers L6470. Processor STM32F407 is used to control the whole machine. The wiring is completed by a LCD display with touchscreen which is used to communicate with user. Data for drilling can be entering manually or via USB inerface. Part of this thesis is the selection of a suitable construction and components, assembling equipment, wiring design of electronic circuits and writing the code to control the machine. Finally, the parameters of the designed device have been measured.

Accelerator-driven systems (ADS) are being investigated and designed for transmutation of the long-lived nuclear waste. Application of ADS allows to safely transmute large fractions of minor actinides (MA) per reactor core, while the fraction in critical reactors is limited to a few percent due to the safety constraints. Additional imposed costs of ADS introduction into the nuclear fuel cycle can be decreased by improving their effciency, particularly the external source effciency.

Design of the European Facility for Industrial Transmutation (EFIT) with transuranium (TRU) oxide fuel has been recently developed in the frame of  the EUROTRANS project. In this thesis it is shown that the neutron and proton source effciency of EFIT can be significantly improved by application of advanced TRU nitride fuel. Thanks to the good neutron economy of the nitride fuel, the EFIT core size can be reduced, which permits reducing the size of the spallation target. This provides a twice higher proton source effciency and therefore lowers the demand for the proton accelerator current. Additionally, the nitride version of EFIT features two times lower coolant void worth improving the core safety.

The pulsed neutron source (PNS) methods for ADS reactivity control have been studied experimentally at the YALINA facility in Minsk (Belarus) and shown good agreement with numerical simulation. The PNS methods will be most probably used for calibration of online reactivity monitoring system in future ADS.

 

Transmutation of plutonium and minor actinides inaccelerator-driven systems (ADS) is being envisaged for thepurpose of reducing the long-term radiotoxic inventory of spentnuclear reactor fuel. Consequently, the physics of sub-criticalsystems are being studied in several different experimentalprograms across the world, one of them being the MUSE(MUltiplication of External Source) program. In theseexperiments, an intense external neutron source is coupled to asub-critical core. In order to investigate the neutronics andsourceeffects in a sub-critical system, Monte Carlosimulations have in this thesis been performed for a modelrepresentative of the MUSE-4 experiments. The investigationshave focused on three different neutronic parameters; theneutron energy spectrum, the external neutron source efficiency(φ*) and the dynamic neutron source response.

In order to study the beam power amplification of an ADS, wehave introduced a new parameter, the proton source efficiency(Ψ*). Ψ* represents the average importance of theexternal proton source, relative to the average importance ofthe eigenmode neutron production. It is defined in analogy withthe neutron source efficiency φ*, but relates the corepower to the source protons instead of to the source neutrons.φ* is commonly used in the physics of sub-criticalsystems, driven by any external neutron source (spallationsource, (d,d), (d,t),²⁵²Cf spontaneous fission etc.). On the contrary,Ψ* has been defined only for ADS studies, where the systemis driven by a proton-induced spallation source. The mainadvantages with using Ψ* instead of φ* are that theway of defining the external source is unique and that Ψ*is proportional to the core power divided by the proton beampower, independently of the neutron source distribution. Thesecond part of this thesis has focused on studying Ψ* as afunction of different system parameters, thereby providing abasis for an ADS design with optimal proton beamamplification.

The aim of this thesis is to provide an understanding of the use of test-driven development (TDD) in unit testing level in open source software (OSS) projects. TDD is a software development approach relying in short development cycles. Test-first approach, in which software tests are written first and then just enough code to pass them, is a central part of TDD. This way tests and production code are developed synchronously together supporting quality assurance processes in OSS projects which are sometimes reported to suffer from insufficient testing. To get an understanding of the use of TDD in OSS projects, 2500 OSS projects were downloaded from GitHub and an automatic script was developed to analyse the projects and particularly test files which have one precise target file. These tests were divided in to three categories depending on if the tests were committed before, with or after their target files. It turned out that 74% (1822 out of 2500) projects contained at least one test file. 52% (1292) of all projects contained at least one test file with one precise target file and which was committed to the project’s repository either before or with its target file. 561 projects contained at least 10 tests with a single target and of which at least 50% were committed before or with their target files. These 561 projects are 22% from all projects and nearly one third (31%) of projects containing tests. Furthermore, it turned out that only half of all tests committed before or after their target files were committed by the same author who also committed the production code. Naturally tests committed with the production code were added by the same committer. Based on the results it seems that a distinct minority of the downloaded projects are certainly following the test-first aspect of TDD in the sense that tests are added to the project’s repository before the production code, although it is possible that tests are made first and only committed later with the target file. Since majority of the tests were committed with the target file, it can be assumed that most of them were created at least closely together. Thus, the most important finding in this study is that there is evidence of the open source community’s commitment to creating tests for their code.

This thesis concentrates on the interaction between SAWs (surface acoustic wave) and low-dimensional systems studied using optical techniques. In particular SAW-driven luminescence from a lateral p-n junction is demonstrated. The lateral p-n junction is formed by molecular beam epitaxy regrowth on a patterned GaAs substrate. Silicon is used as an amphoteric dopant to create a high mobility two-dimensional electron gas on flat (100) planes and a two-dimensional hole gas on angled (311)A facets. A lateral p-n junction is formed at the interface between these planes. SAWs with a frequency of ~1 GHz are generated using an interdigitated transducer. When a continuous radio frequency (RF) signal is used to excite the transducer, SAW-driven light emission from the p-n junction is demonstrated by peaks in the current/light emission at the resonant frequency of the transducer. To investigate the nature of the luminescence further, short RF pulses are used to drive the transducer. The short pulses temporally isolate the SAW-driven light emission from any emission due unwanted pick-up of the free space electromagnetic wave. In the final section the modulation of the emission energies of a single self-assembled quantum dot by a SAW is investigated. The compression and expansion of the crystal due to the strain wave causes the energy of the dot lines to oscillate around their equilibrium values. The shape of the SAW broadened emission lines was seen to depend on the nature of the transition in the dot offering an alternative way of identifying charged and neutral species in this sample. The modulation of the dot energy levels by the SAW is used to control the time of photon emission from the system.

There is increasing evidence for high magnitude dust storms in high latitude environments. Yet, Aeolian processes in these areas have been largely understudied and therefore our knowledge of these systems is limited. Understanding dust emission processes from the high latitudes regions is of increasing importance because future climate scenarios indicate a reduction in terrestrial ice masses and an expansion in glacial outwash plains which are the main dust sources in high latitude environments. Of these regions, Iceland is the most researched high latitude dust source region, however our understanding of processes which lead to dust events are still poorly understood. This thesis examines the interlinking relationship between dust source and dust particle sedimentology and the physical and meteorological drivers which promote or inhibit dust emission in Iceland. This is achieved through active aeolian monitoring at source during two monitoring periods at Markarfljot, South Iceland. These measurements are complimented using secondary data sources (e.g. meteorological and satellite data), sedimentological mapping and particle analysis and laboratory abrasion experiments. This thesis is the first high resolution multi event record of dust emissions in the high latitudes and concludes by showing that potential dust concentrations and dust particle size are driven by the interlinking relationship between wind speed, sediment texture and surface moisture. Factors that affect the potential sediment availability for dust events are more important in the high latitudes than in the subtropics in driving spatial and temporal variability in dust emission. Measurements presented in this thesis are required to verify and tune regional and global modelling attempts to quantify the potential contribution of high latitude dust in the Earth system. However, further measurements are required to fully understand seasonal changes in dust emissions, across a variety of dust source units within all high latitude dust source regions.

Thesis (S.M.)--Massachusetts Institute of Technology, School of Architecture and Planning, Program in Media Arts and Sciences, 2003.
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Includes bibliographical references (p. 78-79).
Homes in the future will contain many new and complex activities, becoming centers for work, commerce, learning, proactive health care, distributed energy production, etc.. The baby boomer and GenX population are demanding choice and tailored solutions in all products they buy, including homes. The combination of societal and market forces will require new ways of designing, building, and integrating technologies into places of living. The housing industry, however, is poorly prepared for this future, creating mostly generic low-grade, inflexible, disruptive-to-upgrade, and high-maintenance products. Few are tailored to the unique and changing needs of its occupants. The industry lacks a process that will lead to the customization of homes that respond to the unique values and needs of occupants, and architects/engineers play no significant role in the creation of most places of living. To address these problems, I propose that a new model for design and construction that places the consumer in the center of the design process. In this model, developers become integrators
(cont.) offering a process for customization; architects create design engines and computational critics rather than a single design; industry provides tailored product and service information directly to the consumer at the point of decision; and fabricators receive data to manufacture customized cabinetry-like components for just- in-time delivery and assembly. To demonstrate and test the viability of this approach, I have built a participative design platform for non-experts that could be used by consumers to drive informed customization of their home. Central to this process is an interface that allows consumers to access sophisticated design tools without requiring them to think like an expert designer - providing the information and visualization needed to make informed decisions about adjacencies, form, materials, appliances, etc.. This approach could be extended to include the configuration of customized technologies and services. If adopted by industry, such a strategy could create powerful incentives for innovation.
by Thomas John McLeish.
S.M.

Table-top high-harmonic sources of extreme ultraviolet (XUV) light are very attractive for applications in coherent diffractive imaging, spectroscopy, and lithography. When compared with synchrotrons and free electron lasers they have greatly reduced size and cost, so beam time would be more readily available to users. Increasing the repetition rate of table-top XUV sources is of interest as it enables faster data acquisition, but this cannot be achieved easily using traditional solid state sources, which require cryogenic cooling for average powers beyond ~5 W. The demonstrated ability of fibre chirpedpulse amplification (CPA) systems for average power and repetition rate scaling enabled by their inherent thermal stability and readily available, low-cost pump lasers will allow high average power high-harmonic generation systems to become widely available. A prototype fibre CPA system was developed by a previous student at the Optoelectronics Research Centre, and was subsequently demonstrated as a high-harmonic source. However, the system could not be power scaled beyond ~1 W because of a mismatch between the seed wavelength (1055 nm) and gain peak of the final amplifier (1040 nm). This thesis reports the development of a new, power scalable version with excellent stability due to a reduction in operating wavelength, an optimized amplification chain with grating stabilized pump diodes, and a realigned bulk stretcher and compressor. The system is shown to be capable of state of the art XUV generation efficiency, improving on previously reported values for equivalent systems by a factor of two. A new seed laser was required for the upgraded fibre CPA system, and during its development a novel multi-wavelength modelocking state was observed. New vectorial simulations of the cavity dynamics definitively identify the cause of this modelocking state and represent the first detailed theoretical description of the onset of multi-wavelength cavity dynamics in breathing pulse Yb-fibre lasers operated below the threshold for multi-pulsing. A novel XUV characterization method was also developed by extending a spatially resolved spectrometry technique to include radius of curvature measurements for full spatial XUV beam profiling from a single exposure. The method was used with the fibre CPA system, allowing for the spatial properties of a fibre laser high-harmonic source to be measured for the first time. A more exploratory, unrelated supercontinuum experiment was also performed, initially to exploit optical wavebreaking of picosecond pulses in all-normal dispersion photonic crystal fibre to generate octave-spanning coherent spectra. Unexpectedly, cascaded Raman scattering was observed for the first time under these conditions. An experimental and numerical investigation of the coherence properties of Raman-dominated supercontinuum in the normal dispersion regime was performed, and the mechanism causing supercontinua to become incoherent is conclusively identified for this dispersion regime.

Within this project, performance differences of 3.3 kV / 1500 A IGBT modules of the same type, but of different production batches are being investigated while the modules are being driven by the gate drive units of Bombardier Transportation. The results will be compared to measurements of a reference module. Devices of two different manufacturers were used. Results show that the deviations in terms of dI/dt, dV/dt and losses are generally very small. However, the IGBTs react differently if active snubbing during IGBT turn-off is applied at low temperatures. The variation in total switching losses is relatively small and may be neglected, if it is concerned with average converter loss estimations. The second part of this experimental project deals with paralleling of 1.2 kV / 600 A IGBTs. The experiments have been focused on IGBT turn-on. Three couples of IGBT modules have been combined in a parallel connection driven by either one gate drive unit or with decoupled gate drives (two separate gate drive units). In both cases the gate drive units are equipped with digitally controlled current source amplifiers.   Results show for all three combinations that driving with one common gate drive unit outperforms the decoupled uncorrected approach which in some cases may change the current sharing of the IGBTs severely to the worse. A sensitivity investigation regarding time shifts between the decoupled gate drives has been carried out. Subsequently, an iterative correction strategy to compensate for the differences in current sharing has been applied to the couples. Based on the results of these aforementioned experiments suggestions for requirements regarding a future gate drive unit design are being proposed.
Inom det här projektet har prestandaskillnader för 3.3 kV / 1500 A IGBT moduler av samma typ, men av olika produktionsserier studerats under styrning av gate drive units från Bombardier Transportation. Resultatet jämförs med mätningar från en referensmodul. IGBT moduler från två olika tillverkare studerades. Resultat visar att avvikelserna i termer av dI/dt, dV/dt och förluster är generellt relativt små. Emellertid så reagerar IGBTs olika om aktiv ”snubbing” under IGBT avstängning aktiveras vid låga temperaturer. Variationen i totala switchförlustser är relativt små och kan försummas, om de jämförs med uppskattad medelförlust för en hel strömriktare.  I andra delen i det här experimentella projektet behandlas parallellkoppling av 1.2 kV / 600A IGBTs. Experimentet har fokuserat på turn-on av IGBTs. Tre stycken par av IGBT moduler har kombinerats parallellt och drivs antingen av en gemensam gate drive unit eller med två separata gate drive units. I de båda fallen så är gate drive units utrustade med digitalt styrda strömförstärkare.  Resultat visar att för alla tre kombinationer, att styrning med en gemensam gate drive unit överträffar ansatsen med två separata okorrigerade gate drive units, vilken i flera fall kan förändra strömdelning mellan IGBTs till det sämre. En känslighetsanalys runt tidsskillnader mellan två separata gate drive units har gjorts. Därefter har en iterativ korrigeringsstrategi för att kompensera för förändringarna i strömdelning, blivit applicerad. Baserat på resultaten från de tidigare nämnda experimenten, så föreslås krav på hur en framtida gate drive unit bör konstrueras.

La problématique traitée dans la thèse s’inscrit dans le cadre de l’analyse d’usage dans les systèmes de recherche d’information. En effet, nous nous intéressons à l’utilisateur à travers l’historique de ses requêtes, utilisées comme support d’analyse pour l’extraction d'un profil d’usage. L’objectif est de caractériser l’utilisateur et les sources de données qui interagissent dans un réseau afin de permettre des comparaisons utilisateur-utilisateur, source-source et source-utilisateur. Selon une étude que nous avons menée sur les travaux existants sur les modèles de profilage, nous avons conclu que la grande majorité des contributions sont fortement liés aux applications dans lesquelles ils étaient proposés. En conséquence, les modèles de profils proposés ne sont pas réutilisables et présentent plusieurs faiblesses. Par exemple, ces modèles ne tiennent pas compte de la source de données, ils ne sont pas dotés de mécanismes de traitement sémantique et ils ne tiennent pas compte du passage à l’échelle (en termes de complexité). C'est pourquoi, nous proposons dans cette thèse un modèle d’utilisateur et de source de données basé sur l’analyse d’usage. Les caractéristiques de ce modèle sont les suivantes. Premièrement, il est générique, permettant de représenter à la fois un utilisateur et une source de données. Deuxièmement, il permet de construire le profil de manière implicite à partir de l’historique de requêtes de recherche. Troisièmement, il définit le profil comme un ensemble de centres d’intérêts, chaque intérêt correspondant à un cluster sémantique de mots-clés déterminé par un algorithme de clustering spécifique. Et enfin, dans ce modèle le profil est représenté dans un espace vectoriel. Les différents composants du modèle sont organisés sous la forme d’un Framework, la complexité de chaque composant y est évaluée. Le Framework propose : - une méthode pour la désambigüisation de requêtes; - une méthode pour la représentation sémantique des logs sous la forme d’une taxonomie ; - un algorithme de clustering qui permet l’identification rapide et efficace des centres d’intérêt représentés par des clusters sémantiques de mots clés ; - une méthode pour le calcul du profil de l’utilisateur et du profil de la source de données à partir du modèle générique. Le Framework proposé permet d'effectuer différentes tâches liées à la structuration d’un environnement distribué d’un point de vue usage. Comme exemples d’application, le Framework est utilisé pour la découverte de communautés d’utilisateurs et la catégorisation de sources de données. Pour la validation du Framework, une série d’expérimentations est menée en utilisant des logs du moteur de recherche AOL-search, qui ont démontrées l’efficacité de la désambigüisation sur des requêtes courtes, et qui ont permis d’identification de la relation entre le clustering basé sur une fonction de qualité et le clustering basé sur la structure
This thesis addresses a problem related to usage analysis in information retrieval systems. Indeed, we exploit the history of search queries as support of analysis to extract a profile model. The objective is to characterize the user and the data source that interact in a system to allow different types of comparison (user-to-user, source-to-source, user-to-source). According to the study we conducted on the work done on profile model, we concluded that the large majority of the contributions are strongly related to the applications within they are proposed. As a result, the proposed profile models are not reusable and suffer from several weaknesses. For instance, these models do not consider the data source, they lack of semantic mechanisms and they do not deal with scalability (in terms of complexity). Therefore, we propose a generic model of user and data source profiles. The characteristics of this model are the following. First, it is generic, being able to represent both the user and the data source. Second, it enables to construct the profiles in an implicit way based on histories of search queries. Third, it defines the profile as a set of topics of interest, each topic corresponding to a semantic cluster of keywords extracted by a specific clustering algorithm. Finally, the profile is represented according to the vector space model. The model is composed of several components organized in the form of a framework, in which we assessed the complexity of each component. The main components of the framework are: - a method for keyword queries disambiguation; - a method for semantically representing search query logs in the form of a taxonomy; - a clustering algorithm that allows fast and efficient identification of topics of interest as semantic clusters of keywords; - a method to identify user and data source profiles according to the generic model. This framework enables in particular to perform various tasks related to usage-based structuration of a distributed environment. As an example of application, the framework is used to the discovery of user communities, and the categorization of data sources. To validate the proposed framework, we conduct a series of experiments on real logs from the search engine AOL search, which demonstrate the efficiency of the disambiguation method in short queries, and show the relation between the quality based clustering and the structure based clustering

Energy demands are steadily increasing as the world's population continues to grow. Automobiles are primary transportation means in a large portion of the world. The combination of fuel consumption by automobiles along with the shrinking fossil fuel reserves makes the development of new more energy efficient technologies crucial. Electric vehicle technologies have been studied and are still being studied today as a means of improving fuel efficiency. To that end, this work studies the effect of switching frequency on the efficiency of a hybrid electric vehicle traction drive, which contains both an internal combustion engine as well as electric motor. Therefore improving the efficiency of the electric motor and its drive will help improve the viability of alternative vehicle technologies. Automobiles spend the majority of their operational time in the lower speed, lower torque region. This work focuses on efficiency improvements in that region. To estimate the efficiency trend, the system is modeled and then tested both electrically and thermally. The efficiency is shown to increase at lower switching frequencies. The experimental results show that there are some exceptions, but the basic trend is the same.
Master of Science

The aim of this work is to reduce the cost and size of a brushless dc motor (BLDC) drive as well as increase the reliability and ruggedness of that drive. Traditional BLDC drives use Voltage Source Inverters (VSI) that utilize hard switching, thereby generating switching losses and entail the use of large heatsinks. VSI needs a huge dc link capacitor that is inherently unreliable and is one of the most expensive components of a drive. Hence, a Current Source Inverter (CSI) is used to replace the hard switchings by natural turn-off, thereby eliminating the heatsinks as well as the large dc link capacitor. A controlled rectifier together with a large inductor act as the current source. The only disadvantage is the large value of the dc link inductor and the huge number of turns needed to achieve these values of the inductances lead to huge resistive losses. Therefore, it is shown that it is possible to replace the controlled rectifier and the large inductor with a suitable dc-dc converter based current source switching at high frequencies and a much smaller value of the dc link inductor. Switching at high frequencies makes it possible to reduce the value of the dc link inductor without increasing the current ripple. Hence, it is possible to have the advantages of using a CSI as well as reduce the value of the dc link inductor without a corresponding increase in the heat sink and snubber requirements.

碩士
國立暨南國際大學
電機工程學系
92
In this thesis, two types of source drivers for TFT-LCD applications are proposed. The first type is for the application of UXGA TFT-LCD and the second one is for the portable small-scale TFT-LCD. For the first source driver, two high-speed complementary differential buffer are proposed to driver a pair of data lines and to realize a rail-to-rail and high speed drive. The output buffer amplifier achieves a large driving capability by employing a simple comparator to sense the transients of the input to turn on an auxiliary driving transistor, which is statically off in the stable state. This increases the speed without the increasing static power consumption. In the second source driver, reference voltage buffers are turned on and off according to the selected number of colors, to achieve static power control. Also, the proposed source driver utilizes five-level seven-phase charge-recycling method to reduce the dynamic power consumption. A class-B buffer is also proposed to drive variable loads. Since the compensation resistor is not in the charge-recycling network, it will not reduce the speed of the charge-recycling operation.

碩士
國立臺灣科技大學
電子工程系
92
This thesis proposes a TFT-LCD output buffer circuit for large-scale TFT-LCD source driver applications. It achieved high speed and low power consumption requirements of large- scale TFT-LCD panel. This circuit consisted pre-amp by a high-speed CMOS differential amplifier; two repeaters and two push-pull Output Stages to drive load. We add a capacitor load to evaluate TFT-LCD column pixels operating situations, and simulate the circuit electrical characteristics by SPICE. The range of output voltage is between 0.2V and 4.8V at 100KHz frequency that fulfills UXGA TFT-LCD panel electronics characteristics requirements.

碩士
國立暨南國際大學
電機工程學系
98
In this thesis, two types of source drivers for TFT-LCD applications are proposed. The first one is designed for the UXGA specification which is used in a large TFT-LCD panel, and the second one is suitable for the portable small-scale TFT-LCD. For the first source driver, two channels share one DAC decoder, so that the number of DAC decoder can be reduced by half to save the chip area and costs. For the second source driver, a few buffers are added in front of the R-string, which stabilize the voltage of the R-string faster in order to drive the panel quickly. This structure can drive hundreds of channels, and relatively the power dissipation and chip area can be reduced.

碩士
國立暨南國際大學
電機工程學系
93
In this dissertation, a 10-bit source driver for the application of SXGA TFT-LCD is proposed. This source driver uses two complementary differential buffers in driving a pair of data lines to achieve the rail-to-rail driving. As for the 10-bit DAC, it is handled into two sections. At first, the electric voltage is fetched from R-string two group resistance string of DAC of 7-bit. Then, the corresponding voltage of the digit signal would be manifested through the 3-bit charge sharing DAC.

博士
國立暨南國際大學
電機工程學系
101
To improve the image quality of the display, high-resolution and high-color-depth source driver ICs are required. Achieving a higher resolution, more output channels of the source driver are needed. Extending color depth for the source driver requires high digital-to-analog converter’s (DAC’s) bit number, leading to an increase of DAC’s area. Since each output channel of the source driver needs one DAC, a source driver generally includes hundreds of DACs which occupy most silicon die size. Hence, there is a great demand for high-resolution, high-color-depth but low-cost source driver ICs. This study proposes three area-efficient DACs for LCD source driver ICs in different applications. For the small-size LCD panel, a quasi-pipeline DAC is proposed to implement a 9-bit source driver IC with high conversion rate. To minimize the charge injection error, we also utilize bootstrapped switches in the proposed DAC. Using 0.35-μm CMOS technology, a 30-channel source driver with quasi-pipeline DACs is implemented to validate the proposed DAC’s performance. The maximum DNL and INL are measured as 0.25 LSB and 0.33 LSB, respectively. The averaged data conversion time is 16 ns per channel. The Figure of Merit (FoM) of the proposed DAC is 0.2 pJ/bit-mm2, which is smaller (by a factor of 3-39) than that of prior arts. The measured results indicate that the proposed 9-bit quasi-pipeline DAC is highly suitable for small-format 16-million-color LCD source driver ICs. For the medium-size LCD application, we propose a 10-bit DAC with interpolation technique for compact LCD column driver ICs. The proposed DAC combines a 6-bit RDAC and a 4-bit DAC-embedded op with 1.6-bit current-mode interpolation cells. The 6-bit RDAC uses a one-voltage selector instead of a two-voltage selector; therefore, it requires a smaller silicon die area for the voltage selector than conventional ones. Fewer differential pairs are required for the voltage interpolation because the DAC-embedded op uses 1.6-bit interpolation cells with binary-weighted reference voltages. This reduces the silicon die area further. The 10-bit DAC prototype is realized in 0.35-μm CMOS technology with the worst DNL/INL of 0.45/0.93 LSB. The 10-bit DAC occupies only 64 % of the conventional 8-bit RDAC area. For the large-size LCD application, a 10-bit switched-capacitor voltage-summing DAC is introduced. This 10-bit DAC consists of a 3-bit RDAC and an 8-voltage switched-capacitor summer with high driving capability. The switched-capacitor summer adds up the output voltage of the 3-bit RDAC and the products of the input digital bit value and the corresponding binary-weighted voltage from bits 3 to 9. The 10-bit DAC prototype is realized using 0.35-μm/0.5-μm CMOS technology, with the worst-case DNL/INL at 0.76/1.56 LSB. The die area per channel is 35 μm × 410 μm, which is more compact than state-of-the-art circuits implemented with the same technology. The settling time to reach 0.2% tolerance of the final voltage is only 5 μs, smaller than that of previous switched-capacitor (cyclic) DACs.

碩士
國立暨南國際大學
電機工程學系
98
In the first part of the thesis, A 6-bit source driver circuit has been proposed. The architecture utilizes a set of nonlinear resister string to provide the reference voltages to all of the R-DACs (digital-to-analog converters). Each R-DAC is responsible for one LCD (liquid crystal display) channel. A few of gamma buffers are used to make the gamma voltages stable. In the new architecture, the number of buffers can be greatly reduced by using less gamma buffers in front of the resister string instead of buffering each output voltage of the channel with one output buffer. Hence, the low cost and low power consumption source driver can be realized. The second circuit in this thesis is suitable for the large panels. A new architecture of the source driver is presented to reduce the chip area. The DACs occupy the most part of the chip areas in the source driver. In our new architecture, one DAC decoder can be used in the two channels by the way of the elaborate arrangement. Then, the number of DAC decoder can be reduced by half, and chip can be save area close to a half. Besides, the charge recycling method is also be added in this circuit to reduce power consumption.

碩士
國立暨南國際大學
電機工程學系
94
In this thesis, a 10-bit source driver for the application of SXGA TFT-LCD is proposed. For the high resolution demand, two types of digital to analog converter are combined to realize a 10-bit resolution application. At first stage, a pair of neighboring voltages are fetched from 7-bit R-string DAC. At second stage, the corresponding voltage to input digital code can be obtained by the 3-bit charge sharing DAC. The circuit uses piecewise linear conversion to implement a column driver, and uses two complementary differential buffers which drive a pair of data line to achieve the rail-to-rail driving.

碩士
南台科技大學
電子工程系
90
Based on the market analysis, the TFT-LCD (Thin Film Transistor Liquid Crystal Display) has been applied in many consumer products. The market requirement result in many factories invests in producing the TFT-LCD. Because the driver IC is the most important component in the TFT-LCD, to develop a high performance driver IC has become a research topic. In this thesis, a digital source driver applicable to the color TFT-LCD (Thin Film Transistor Liquid Crystal Display) panel is presented. This mixed-signal circuit consists of three parts: the data controller, the non-linear DAC and the output buffer. In order to adjust the non-linear brightness characteristics of the TFT-LCD panels, a new non-linear DAC to facilitate the -correction is proposed. The non-linear DAC contains only (2p+2q) resistances and switches can up to p+q levels. For the output buffer, a high performance rail-to-rail output driver is designed for the high capacitive loads. This driver is implemented by the TSMC 1P4M 0.35um technology. The results of post layout simulation show that this circuit can be operated at the speed of 70MHz with 3.3V power supply. Thus it is applicable to the TFT-LCD panels with the VGA, SVGA, and XVGA standards.

碩士
國立成功大學
電機工程學系碩博士班
97
The area of a DAC and the offset of a buffer are the main issues to be resolved for high resolution source drivers. In this thesis, area-efficient R-C DACs with low-offset push-pull output buffers for a 10-bit source driver are proposed. The 10-bit R-C DAC adopts a two-stage structure, which composes of a R-string and a weighted capacitor array. Comparing to a conventional 10-bit R DAC, the 10-bit R-C DAC has a smaller area. The output buffer adopts a modified opamp, based on a conventional two-stage Class-A opamp. A conventional Class-A opamp only has a charge or a discharge ability according to its type of input differential pair so it is not suitable for a low power driving mode (e.g. two-dot inversion). Therefore, a positive current feedback path is used to improve the insufficient charge (discharge) ability of a conventional two-stage Class-A opamp so that it is suitable for a low power driving mode. An offset averaging method is used for the offset of the output buffer. By using several switches and a control signal, the polarity of the offset is reversed periodically so the offset is averaged at the output of the output buffer. The offset averaging method needs no extra capacitors so it is cost-effective. The chip is fabricated using the TSMC 0.35μm 2P4M CMOS process and its area is 1704 x 262 μm2. The measured settling time of the output buffer is under 7.8μs. The maximum offset after averaging is 0.57LSB. The maximum DNL and INL are 3.09LSB and 5.69LSB respectively.

碩士
國立臺灣大學
電子工程學研究所
101
Testing TFT-LCD source driver ICs incurs growing manufacturing test cost as the trend of higher color depths and more output channels continues. In this thesis, we develop an effective design-for-test(DfT) technique for short faults in the source driver IC digital-to-analog converters(DAC’s). By adding DfT multiplexers(DfT-MUX’s), the proposed technique detects the short faults by observing the voltage source current without having to probing all the output channels pins as the conventional approach does. Furthermore, by carefully placing the DfT-MUX’s, the short fault induced error current is maximized to improve observability. Spice simulation results on a 8-bit source driver IC shows that, with the proposed DfT technique, all the modeled short faults can be easily detected by the significant increase in voltage source currents.

碩士
國立成功大學
電機工程學系碩博士班
96
In the thesis, three types of output buffers are proposed. TypeⅠbuffer employs a simple comparator to sense the input transients and turn on an auxiliary P-type charging transistor (normally off in steady state) to enhance the output driving capability without increasing the quiescent power consumption. Type II buffer adopts both auxiliary P-type charging and N-type discharging transistors to achieve dual paths (P/N) of symmetrical driving.A self-bias circuit is also proposed for type II buffer to generate the required bias voltages for the P/N dynamic level shifter. Type III circuit which utilizes two complementary differential buffers is proposed to drive a pair of data lines. It employs dual paths of charging and discharging and a self-bias circuit to realize a rail-to-rail input range, high-speed driving capability and low-power dissipation. Finally, an 8-bit source driver composed of type III buffer and a resistor-to-resistor digital to analog converter is designed and presented. It has high-speed driving capability, low quiescent power consumption, small chip area, and is optimized for TFT-LCD TV application.

碩士
南台科技大學
電子工程系
94
This thesis is about source driver IC on TFT-LCD (Thin Film Transistor-Liquid Crystal Display, TFT-LCD), Regard implement TFT-LCD source driver IC as the purpose of studying, discuss the topical on gamma correction and have more precision driver IC. In order to compensate the physical characteristic of the liquid-crystal display (LCD), we must correct the luminance as a non-linear curve. The general method adopted by modern TFT-LCD source driver IC is to use non-linear digital-to-analog converter (DAC) to convert linear input data by using piece-wise linear algorithm. However, such a design is not easy to realize the non-linear DAC. It also requires multiple reference voltages to adjust gamma value. In addition, the resistors required are also varied in sizes to meet the goal of non-linear transformation which increases design complexity. Thus, we propose a refined design to process the mentioned gamma correction by using a novel digital circuit. The digital circuit proposed is capable to correct gamma values to fit NTSC gamma 2.5 specifications than the prior circuit. In our design, a linear DAC is used to replace the original non-linear DAC which makes the complexity of analog circuit is reduced as well as the area occupied by resistors is also minimized. Besides, only 2 external reference voltages are required in our design instead multiple reference voltages required in the prior designs. The resistors used in our design are the same in value which reduces design complexity and area. In short, the proposed design not only possesses the advantages of more accurate gamma correction but required less chip area than the prior design. Hence, our design can be a better alternative in LCD source driver design.

碩士
南台科技大學
電子工程系
93
Gamma correction is an essential function in every display device, such as CRTs, plasma TVs, and TFT LCDs. In this thesis, a new gamma correction architecture of the source drive IC used in the TFT LCD is proposed. Instead of using non-linear DAC architecture, a linear DAC architecture is used to reduce the number of resistors required. The complexity of our design is also reduced due to less resistors. Moreover, the proposed design is capable of supporting different gamma values from 2.2 to 2.5 without any extra cost. In short,the proposed gamma correction design possesses several advantages which make it a better alternative.

碩士
國立雲林科技大學
電子與資訊工程研究所
93
With the wide applications of the liquid crystal flat panel display, the flat panel displays are now everywhere in our daily life. High resolution and low power are very significant requirements such as notebook, mobile phones, PDAs, PC, TV screens and other consumer electronics. The source driver must drive one column source of TFT which output load is proportioned to the panel size, so the source driver must have large driving capability. However, the traditional source driver which driving capability has to be increased to satisfy the requirement of high resolution. One of the most common ways is increased the the output buffer width for enhancing the driving capability. In this way, although it increases the driving capability, it consumes much more power, and costs much more layout area. The thesis focures on the source driver of the TFT LCD flat panel displays, and finds out a solution that uses over-driving method to reduce the settling time. The thesis uses row inversion to drive the TFT LCD. Modulating common voltage driving method and the low power Class-B Rail-to-Rail output buffer are used to economize the power consumption. The source driver is suitable for XGA 1024×768 resolutions, 60 frames per second. The design of the over-driving source driver has been implemented with TSMC 0.35um CMOS 2P4M 5V process. When the output loads is 10 sets of 1kΩ resistance and the 15pF capacitance, the settling time is 4.7237 μs and the average power is 17.518mW, and DNL、INL is less then 1/2 LSB.

碩士
國立彰化師範大學
機電工程學系
95
Recent years, FTDs are widely used in display system for audio-video, which requires high resolution. Presently, source drivers on the market are mainly for 6bit and 8bit. According to the report[1]，the requirement of LCD will exceed 330 million/yr in the future. Similarly, the market of drivers for LCDs will increase, too. The only way to increase the profit is improving the performance and reducing the cost. The size of LCDs is getting larger in particular, it is essential to compromise the driving ability. So, source drivers with high performance, high resolution, and low power dissipation will achieve more additional value. In this thesis, we propose a TFT-LCD source driver for large loading, which provides over 100-million colors depth. With 5 order of RC ladder for 4kΩ/40pF, the settling time are within 10μs under the max voltage swing, which is suitable for the demands of HDTV 1080p. We used two kinds of DAC (Digital to Analog Converter) for the driver, and proposed a rail-to-rail output buffer with low offset and high driving ability. With the SPICE model of TSMC 0.35μm 2P4M 3.3V/5V process, the maximum offset is less than 2mV, and the input/output swing are nearly rail-to-rail.。Besides, this design uses a charge sharer without any external capacitor for reducing the power dissipation, which is suitable for portable display system with high resolution.