Literatura académica sobre el tema "Sequential logic circuits"
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Artículos de revistas sobre el tema "Sequential logic circuits"
JAHANIRAD, HADI y KARIM MOHAMMADI. "SEQUENTIAL LOGIC CIRCUITS RELIABILITY ANALYSIS". Journal of Circuits, Systems and Computers 21, n.º 05 (agosto de 2012): 1250040. http://dx.doi.org/10.1142/s0218126612500405.
Texto completoWatt, A. "Astables and sequential logic circuits". Electronics Education 1990, n.º 2 (1990): 7–8. http://dx.doi.org/10.1049/ee.1990.0021.
Texto completoAndrews, Lauren B., Alec A. K. Nielsen y Christopher A. Voigt. "Cellular checkpoint control using programmable sequential logic". Science 361, n.º 6408 (20 de septiembre de 2018): eaap8987. http://dx.doi.org/10.1126/science.aap8987.
Texto completoUpadhyay, Shipra, R. A. Mishra, R. K. Nagaria y S. P. Singh. "DFAL: Diode-Free Adiabatic Logic Circuits". ISRN Electronics 2013 (10 de febrero de 2013): 1–12. http://dx.doi.org/10.1155/2013/673601.
Texto completoBasu, Shaunak y Subhashree Basu. "Reversible Logic Synthesis of Sequential Circuits". International Journal of Computer Applications 129, n.º 11 (17 de noviembre de 2015): 29–32. http://dx.doi.org/10.5120/ijca2015906999.
Texto completoZhang, Li Min, Zhi Wei Yang, Yao Kun Pang, Tao Zhou, Chi Zhang y Zhong Lin Wang. "Tribotronic triggers and sequential logic circuits". Nano Research 10, n.º 10 (14 de junio de 2017): 3534–42. http://dx.doi.org/10.1007/s12274-017-1564-9.
Texto completoLevin, Iliya, Osnat Keren y Vladimir Ostrovsky. "Synthesis of sequential circuits by using linearization". Facta universitatis - series: Electronics and Energetics 20, n.º 3 (2007): 461–77. http://dx.doi.org/10.2298/fuee0703461l.
Texto completoJagadeesan, Neeraja, B. Saman, M. Lingalugari, P. Gogna y F. Jain. "Sequential Logic Circuits Using Spatial Wavefunction Switched (SWS) FETs". International Journal of High Speed Electronics and Systems 24, n.º 03n04 (septiembre de 2015): 1550011. http://dx.doi.org/10.1142/s0129156415500111.
Texto completoMONTEIRO, JOSÉ, SRINIVAS DEVADAS y ABHIJIT GHOSH. "RETIMING SEQUENTIAL CIRCUITS FOR LOW POWER". International Journal of High Speed Electronics and Systems 07, n.º 02 (junio de 1996): 323–40. http://dx.doi.org/10.1142/s0129156496000141.
Texto completoHudli, Anand V. y Raghu V. Hudli. "Temporal Logic Based Hierarchical Test Generation for Sequential VLSI Circuits". VLSI Design 2, n.º 1 (1 de enero de 1994): 69–80. http://dx.doi.org/10.1155/1994/94514.
Texto completoTesis sobre el tema "Sequential logic circuits"
Thulasi, Raman Sudheer Ram. "Logic Encryption of Sequential Circuits". University of Cincinnati / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1553251689992143.
Texto completoKasarabada, Yasaswy V. "Efficient Logic Encryption Techniques for Sequential Circuits". University of Cincinnati / OhioLINK, 2021. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1613752483402656.
Texto completoAli, Belgasem. "Evolutionary algorithms for synthesis and optimisation of sequential logic circuits". Thesis, Edinburgh Napier University, 2003. http://researchrepository.napier.ac.uk/Output/4338.
Texto completoHacker, Charles Hilton y n/a. "WinLogiLab - A Computer-Based Teaching Suite for Digital Logic Design". Griffith University. School of Engineering, 2001. http://www4.gu.edu.au:8080/adt-root/public/adt-QGU20050915.172404.
Texto completoHacker, Charles. "WinLogiLab - A Computer-Based Teaching Suite for Digital Logic Design". Thesis, Griffith University, 2001. http://hdl.handle.net/10072/367209.
Texto completoThesis (Masters)
Master of Philosophy (MPhil)
School of Engineering
Science, Environment, Engineering and Technology
Full Text
Duong, Khanh Viet. "On Enhancing Deterministic Sequential ATPG". Thesis, Virginia Tech, 2011. http://hdl.handle.net/10919/31283.
Texto completoMaster of Science
Yuan, Zeying. "Sequential Equivalence Checking of Circuits with Different State Encodings by Pruning Simulation-based Multi-Node Invariants". Thesis, Virginia Tech, 2015. http://hdl.handle.net/10919/56693.
Texto completoMaster of Science
Lee, Chris Y. "Full Custom VLSI Design of On-Line Stability Checkers". DigitalCommons@CalPoly, 2011. https://digitalcommons.calpoly.edu/theses/607.
Texto completoRyu, Hyeyeon. "Integrated Circuits Based on Individual Single-Walled Carbon Nanotube Field-Effect Transistors". Doctoral thesis, Universitätsbibliothek Chemnitz, 2012. http://nbn-resolving.de/urn:nbn:de:bsz:ch1-qucosa-98220.
Texto completoThema dieser Arbeit ist die Herstellung und Integration von Feldeffekt-Transistoren auf der Grundlage einzelner halbleitender Kohlenstoffnanoröhren. Solche Bauelemente sind zum Beispiel für die Realisierung integrierter Schaltungen mit hoher Integrationsdichte auf Glassubstraten oder auf flexiblen Kunststofffolien von Interesse. Zunächst wurde ein Herstellungsverfahren für die Anfertigung einer großen Anzahl solcher Transistoren auf Glas- oder Kunststoffsubstraten entwickelt, und deren elektrische Eigenschaften wurden gemessen und ausgewertet. Das Gate-Dielektrikum dieser Transistoren hat eine Schichtdicke von etwa 6 nm, so das die Versorgungsspannungen bei etwa 1.5 V liegen. Die Transistoren haben sehr gute elektrische Parameter, z.B. einen großen Durchgangsleitwert (bis zu 10 µS), ein großes Modulationsverhältnis (>10^4), einen steilen Unterschwellanstieg (65 mV/Dekade) und vernachlässigbar kleine Leckströme (~10^-13 A). Für die Realisierung unipolarer Logikschaltungen wurden monolithisch integrierte Lastwiderstände auf der Grundlage metallischer Kohlenstoffnanoröhren mit großem Widerstand oder mittels Vakuumabscheidung erzeugter Kohlenstoffschichten entwickelt und u. a. mittels Vierpunkt- und Transferlängen-Messungen analysiert. Eine Reihe kombinatorischer Schaltungen, z.B. Inverter, NAND-Gatter und NOR-Gatter, sowie eine sequentielle Logikschaltung wurden auf Glassubstraten hergestellt, und deren statische und dynamische Parameter wurden gemessen. Optimierte Inverter arbeiten bei Frequenzen von bis zu 2 MHz und haben Signalverzögerungen von lediglich 12 ns
Mohamed, Mohamed Hassan Wahba Ayman. "Diagnostic des erreurs de conception dans les circuits digitaux : le cas des erreurs simples". Grenoble 1, 1997. http://www.theses.fr/1997GRE10086.
Texto completoLibros sobre el tema "Sequential logic circuits"
Ashar, Pranav. Sequential logic synthesis. Boston: Kluwer Academic Publishers, 1992.
Buscar texto completoSrinivas, Devadas y Newton A. Richard 1951-, eds. Sequential logic testing and verification. Boston: Kluwer Academic, 1992.
Buscar texto completoVasyukevich, Vadim. Asynchronous Operators of Sequential Logic: Venjunction & Sequention: Digital Circuit Analysis and Design. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011.
Buscar texto completoMonteiro, José. Computer-aided design techniques for low power sequential logic circuits. Boston: Kluwer Academic, 1997.
Buscar texto completoMonteiro, Jose. Computer-Aided Design Techniques for Low Power Sequential Logic Circuits. Boston, MA: Springer US, 1997.
Buscar texto completoMonteiro, José y Srinivas Devadas. Computer-Aided Design Techniques for Low Power Sequential Logic Circuits. Boston, MA: Springer US, 1997. http://dx.doi.org/10.1007/978-1-4615-6319-8.
Texto completoMonteiro, José. Computer-aided design techniques for low power sequential logiccircuits. Boston, Mass: Kluwer, 1997.
Buscar texto completoComer, David J. Digital logic and state machine design. 2a ed. Philadelphia, Pa: Saunders College Pub, 1990.
Buscar texto completoComer, David J. Digital logic and state machine design. 3a ed. New York: Oxford University Press, 1995.
Buscar texto completoDigital logic and state machine design. 3a ed. Ft. Worth: Saunders College Pub., 1995.
Buscar texto completoCapítulos de libros sobre el tema "Sequential logic circuits"
Lewin, D. y D. Protheroe. "Sequential circuits". En Design of Logic Systems, 200–251. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4899-6856-2_6.
Texto completoPosthoff, Christian y Bernd Steinbach. "Sequential Circuits". En Logic Functions and Equations, 459–94. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-030-02420-8_10.
Texto completoSteinbach, Bernd y Christian Posthoff. "Sequential Circuits". En Logic Functions and Equations, 741–94. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-88945-6_12.
Texto completoTietze, Ulrich, Christoph Schenk y Eberhard Gamm. "Sequential Logic Systems". En Electronic Circuits, 659–88. Berlin, Heidelberg: Springer Berlin Heidelberg, 2008. http://dx.doi.org/10.1007/978-3-540-78655-9_9.
Texto completoHsu, John Y. "Sequential Logic Circuits". En Computer Logic, 143–84. New York, NY: Springer New York, 2002. http://dx.doi.org/10.1007/978-1-4613-0047-2_5.
Texto completoWaterworth, G. "Sequential Logic Circuits". En Work Out Electronics, 240–53. London: Macmillan Education UK, 1988. http://dx.doi.org/10.1007/978-1-349-10008-8_14.
Texto completoHajji, Bekkay, Adel Mellit y Loubna Bouselham. "Sequential Logic Circuits". En A Practical Guide for Simulation and FPGA Implementation of Digital Design, 119–73. Singapore: Springer Singapore, 2022. http://dx.doi.org/10.1007/978-981-19-0615-2_4.
Texto completoGroote, Jan Friso, Rolf Morel, Julien Schmaltz y Adam Watkins. "Sequential circuits". En Logic Gates, Circuits, Processors, Compilers and Computers, 53–72. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-68553-9_3.
Texto completoTaha, Saleem Mohammed Ridha. "Reversible Sequential Logic Circuits". En Studies in Systems, Decision and Control, 119–34. Cham: Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-319-23479-3_5.
Texto completoGhosh, Abhijit, Srinivas Devadas y A. Richard Newton. "Verification of Sequential Circuits". En Sequential Logic Testing and Verification, 123–51. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3646-8_5.
Texto completoActas de conferencias sobre el tema "Sequential logic circuits"
Kasarabada, Yasaswy, Sudheer Ram Thulasi Raman y Ranga Vemuri. "Deep State Encryption for Sequential Logic Circuits". En 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE, 2019. http://dx.doi.org/10.1109/isvlsi.2019.00068.
Texto completoLi, Ren, Reem Alhadrami y Hossein Fariborzi. "BEOL NEM Relay Based Sequential Logic Circuits". En 2019 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2019. http://dx.doi.org/10.1109/iscas.2019.8702123.
Texto completoDai, Jing, Jianping Hu, Weiqiang Zhang y Ling Wang. "Adiabatic CPL Circuits for Sequential Logic Systems". En 2006 49th IEEE International Midwest Symposium on Circuits and Systems. IEEE, 2006. http://dx.doi.org/10.1109/mwscas.2006.382162.
Texto completoLukac, Martin y Marek Perkowski. "Quantum Finite State Machines as Sequential Quantum Circuits". En 2009 39th International Symposium on Multiple-Valued Logic. IEEE, 2009. http://dx.doi.org/10.1109/ismvl.2009.46.
Texto completoSoeken, M., R. Wille, C. Otterstedt y R. Drechsler. "A Synthesis Flow for Sequential Reversible Circuits". En 2012 IEEE 42nd International Symposium on Multiple-Valued Logic (ISMVL). IEEE, 2012. http://dx.doi.org/10.1109/ismvl.2012.72.
Texto completoQiaoyan Yu y Drew Stock. "Collaborative error control method for sequential logic circuits". En 2013 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2013. http://dx.doi.org/10.1109/iscas.2013.6571964.
Texto completoErbakanov, Lenko, Krassimir Atanassov, Sotir Sotirov y Stanislav Simeonov. "Generalized net models of basic sequential logic circuits". En 2016 IEEE 8th International Conference on Intelligent Systems (IS). IEEE, 2016. http://dx.doi.org/10.1109/is.2016.7737483.
Texto completoRohini, H., S. Rajashekar y Priyatam Kumar. "Design of basic sequential circuits using reversible logic". En 2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT). IEEE, 2016. http://dx.doi.org/10.1109/iceeot.2016.7755062.
Texto completoMohammadi, Karim, Hadi Jahanirad y Pejman Attarsharghi. "Fast Reliability Analysis Method for Sequential Logic Circuits". En 2011 21st International Conference on Systems Engineering (ICSEng). IEEE, 2011. http://dx.doi.org/10.1109/icseng.2011.70.
Texto completoHsiao, Shen-Fu, Ming-Yu Tsai y Chia-Sheng Wen. "Efficient Pass-Transistor-Logic Synthesis for Sequential Circuits". En APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems. IEEE, 2006. http://dx.doi.org/10.1109/apccas.2006.342077.
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