Literatura académica sobre el tema "ReRAM 3D"
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Artículos de revistas sobre el tema "ReRAM 3D"
Hudec, Boris, I.-Ting Wang, Wei-Li Lai, Che-Chia Chang, Peter Jančovič, Karol Fröhlich, Matej Mičušík, Mária Omastová y Tuo-Hung Hou. "Interface engineered HfO2-based 3D vertical ReRAM". Journal of Physics D: Applied Physics 49, n.º 21 (29 de abril de 2016): 215102. http://dx.doi.org/10.1088/0022-3727/49/21/215102.
Texto completoLee, Edward, Daehyun Kim, Jinwoo Kim, Sung Kyu Lim y Saibal Mukhopadhyay. "A ReRAM Memory Compiler for Monolithic 3D Integrated Circuits in a Carbon Nanotube Process". ACM Journal on Emerging Technologies in Computing Systems 18, n.º 1 (31 de enero de 2022): 1–20. http://dx.doi.org/10.1145/3466681.
Texto completoWalden, Candace, Devesh Singh, Meenatchi Jagasivamani, Shang Li, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce Jacob y Donald Yeung. "Monolithically Integrating Non-Volatile Main Memory over the Last-Level Cache". ACM Transactions on Architecture and Code Optimization 18, n.º 4 (31 de diciembre de 2021): 1–26. http://dx.doi.org/10.1145/3462632.
Texto completoKim, Bokyung, Edward Hanson y Hai Li. "An Efficient 3D ReRAM Convolution Processor Design for Binarized Weight Networks". IEEE Transactions on Circuits and Systems II: Express Briefs 68, n.º 5 (mayo de 2021): 1600–1604. http://dx.doi.org/10.1109/tcsii.2021.3067840.
Texto completoSun, Chao, Kousuke Miyaji, Koh Johguchi y Ken Takeuchi. "A High Performance and Energy-Efficient Cold Data Eviction Algorithm for 3D-TSV Hybrid ReRAM/MLC NAND SSD". IEEE Transactions on Circuits and Systems I: Regular Papers 61, n.º 2 (febrero de 2014): 382–92. http://dx.doi.org/10.1109/tcsi.2013.2268111.
Texto completoHassanpour, Mehdi, Marc Riera y Antonio González. "A Survey of Near-Data Processing Architectures for Neural Networks". Machine Learning and Knowledge Extraction 4, n.º 1 (17 de enero de 2022): 66–102. http://dx.doi.org/10.3390/make4010004.
Texto completoGugnani, Shashank, Arjun Kashyap y Xiaoyi Lu. "Understanding the idiosyncrasies of real persistent memory". Proceedings of the VLDB Endowment 14, n.º 4 (diciembre de 2020): 626–39. http://dx.doi.org/10.14778/3436905.3436921.
Texto completoQolbi, M. Mahbub Jauhar y Mochammad Choirur Roziqin. "Desain Ruang Unit Kerja Rekam Medis Berdasarkan Aspek Ergonomi Di Puskesmas Senduro". J-REMI : Jurnal Rekam Medik dan Informasi Kesehatan 4, n.º 1 (29 de diciembre de 2022): 24–31. http://dx.doi.org/10.25047/j-remi.v4i1.3347.
Texto completoAmaral, Creusa Sayuri Tahara, Oreonnilda De Souza, Leiraud Hilkner de Souza, Gilson José da Silva y Lucas Noboru Fatori Trevizan. "Novos caminhos da biotecnologia: As inovações da indústria 4.0 na saúde humana". Revista Brasileira Multidisciplinar 23, n.º 3 (1 de septiembre de 2020): 203–31. http://dx.doi.org/10.25061/2527-2675/rebram/2020.v23i3.889.
Texto completoGomes Cardoso Gastaldi, Gabriela, Juliana Paula de Oliveira, Jorge Vicente Lopes da Silva, Rodrigo Alvarenga Rezende y André Capaldo Amaral. "PHOTOBIOMODULATORY EFFECT OF LOW-INTENSITY LASER RADIATION ON MULTICELLULAR SPHEROIDS". Revista Brasileira Multidisciplinar 24, n.º 2 (1 de mayo de 2021): 156–67. http://dx.doi.org/10.25061/2527-2675/rebram/2021.v24i2.1136.
Texto completoTesis sobre el tema "ReRAM 3D"
Ezzadeen, Mona. "Conception d'un circuit dédié au calcul dans la mémoire à base de technologie 3D innovante". Electronic Thesis or Diss., Aix-Marseille, 2022. http://theses.univ-amu.fr.lama.univ-amu.fr/221212_EZZADEEN_955e754k888gvxorp699jljcho_TH.pdf.
Texto completoWith the advent of edge devices and artificial intelligence, the data deluge is a reality, making energy-efficient computing systems a must-have. Unfortunately, classical von Neumann architectures suffer from the high cost of data transfers between memories and processing units. At the same time, CMOS scaling seems more and more challenging and costly to afford, limiting the chips' performance due to power consumption issues.In this context, bringing the computation directly inside or near memories (I/NMC) seems an appealing solution. However, data-centric applications require an important amount of non-volatile storage, and modern Flash memories suffer from scaling issues and are not very suited for I/NMC. On the other hand, emerging memory technologies such as ReRAM present very appealing memory performances, good scalability, and interesting I/NMC features. However, they suffer from variability issues and from a degraded density integration if an access transistor per bitcell (1T1R) is used to limit the sneak-path currents. This thesis work aims to overcome these two challenges. First, the variability impact on read and I/NMC operations is assessed and new robust and low-overhead ReRAM-based boolean operations are proposed. In the context of neural networks, new ReRAM-based neuromorphic accelerators are developed and characterized, with an emphasis on good robustness against variability, good parallelism, and high energy efficiency. Second, to resolve the density integration issues, an ultra-dense 3D 1T1R ReRAM-based Cube and its architecture are proposed, which can be used as a 3D NOR memory as well as a low overhead and energy-efficient I/NMC accelerator
Actas de conferencias sobre el tema "ReRAM 3D"
Fukuda, Natsuki, Yutaka Nishioka y Koukou Suu. "TaOx-based ReRAM stack with NbOx-based selector for 3D cross-point ReRAM application". En 2014 Silicon Nanoelectronics Workshop (SNW). IEEE, 2014. http://dx.doi.org/10.1109/snw.2014.7348604.
Texto completoLee, Edward, Daehyun Kim, Venkata Chaitanya Krishna Chekuri, Yun Long y Saibal Mukhopadhyay. "A ReRAM Memory Compiler with Layout-Precise Performance Evaluation". En 2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S). IEEE, 2019. http://dx.doi.org/10.1109/s3s46989.2019.9320750.
Texto completoYi-Chung Chen, Hai Li, Yiran Chen y R. E. Pino. "3D-ICML: A 3D bipolar ReRAM design with interleaved complementary memory layers". En 2011 Design, Automation & Test in Europe. IEEE, 2011. http://dx.doi.org/10.1109/date.2011.5763289.
Texto completoHuangfu, Wenqin, Shuangchen Li, Xing Hu y Yuan Xie. "RADAR: A 3D-ReRAM based DNA Alignment Accelerator Architecture". En 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC). IEEE, 2018. http://dx.doi.org/10.1109/dac.2018.8465882.
Texto completoAdam, Gina C., Bhaswar Chrakrabarti, Hussein Nili, Brian Hoskins, Miguel A. Lastras-Montano, Advait Madhavan, Melika Payvand et al. "3D ReRAM arrays and crossbars: Fabrication, characterization and applications". En 2017 IEEE 17th International Conference on Nanotechnology (IEEE-NANO). IEEE, 2017. http://dx.doi.org/10.1109/nano.2017.8117387.
Texto completoVelasquez, Alvaro y Sumit Kumar Jha. "Computation of Boolean matrix chain products in 3D ReRAM". En 2017 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2017. http://dx.doi.org/10.1109/iscas.2017.8050962.
Texto completoChien, W. C., F. M. Lee, Y. Y. Lin, M. H. Lee, S. H. Chen, C. C. Hsieh, E. K. Lai et al. "Multi-layer sidewall WOX resistive memory suitable for 3D ReRAM". En 2012 IEEE Symposium on VLSI Technology. IEEE, 2012. http://dx.doi.org/10.1109/vlsit.2012.6242507.
Texto completoHuang, Yu, Long Zheng, Xiaofei Liao, Hai Jin, Pengcheng Yao y Chuangyi Gui. "RAGra: Leveraging Monolithic 3D ReRAM for Massively-Parallel Graph Processing". En 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 2019. http://dx.doi.org/10.23919/date.2019.8715192.
Texto completoLiu, Bosheng, Zhuoshen Jiang, Jigang Wu, Xiaoming Chen, Yinhe Han y Peng Liu. "F3D: Accelerating 3D Convolutional Neural Networks in Frequency Space Using ReRAM". En 2021 58th ACM/IEEE Design Automation Conference (DAC). IEEE, 2021. http://dx.doi.org/10.1109/dac18074.2021.9586135.
Texto completoAmir, Mohammad Faisal y Saibal Mukhopadhyay. "3D Stacked High Throughput Pixel Parallel Image Sensor with Integrated ReRAM Based Neural Accelerator". En 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S). IEEE, 2018. http://dx.doi.org/10.1109/s3s.2018.8640151.
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