Artículos de revistas sobre el tema "Reconfigurable Hardware Accelerator"
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Xiong, Hao, Kelin Sun, Bing Zhang, Jingchuan Yang y Huiping Xu. "Deep-Sea: A Reconfigurable Accelerator for Classic CNN". Wireless Communications and Mobile Computing 2022 (2 de febrero de 2022): 1–23. http://dx.doi.org/10.1155/2022/4726652.
Texto completoAn, Fubang, Lingli Wang y Xuegong Zhou. "A High Performance Reconfigurable Hardware Architecture for Lightweight Convolutional Neural Network". Electronics 12, n.º 13 (27 de junio de 2023): 2847. http://dx.doi.org/10.3390/electronics12132847.
Texto completoNakasato, N., T. Hamada y T. Fukushige. "Galaxy Evolution with Reconfigurable Hardware Accelerator". EAS Publications Series 24 (2007): 291–92. http://dx.doi.org/10.1051/eas:2007043.
Texto completoEbrahim, Ali. "Finding the Top-K Heavy Hitters in Data Streams: A Reconfigurable Accelerator Based on an FPGA-Optimized Algorithm". Electronics 12, n.º 11 (24 de mayo de 2023): 2376. http://dx.doi.org/10.3390/electronics12112376.
Texto completoZhang, Xvpeng, Bingqiang Liu, Yaqi Zhao, Xiaoyu Hu, Zixuan Shen, Zhaoxia Zheng, Zhenglin Liu et al. "Design and Analysis of Area and Energy Efficient Reconfigurable Cryptographic Accelerator for Securing IoT Devices". Sensors 22, n.º 23 (25 de noviembre de 2022): 9160. http://dx.doi.org/10.3390/s22239160.
Texto completoMilik, Adam y Andrzej Pułka. "The Reconfigurable Hardware Accelerator for Searching Genome Patterns". IFAC Proceedings Volumes 42, n.º 1 (2009): 33–38. http://dx.doi.org/10.3182/20090210-3-cz-4002.00010.
Texto completoIbrahim, Atef, Hamed Elsimary, Abdullah Aljumah y Fayez Gebali. "Reconfigurable Hardware Accelerator for Profile Hidden Markov Models". Arabian Journal for Science and Engineering 41, n.º 8 (18 de mayo de 2016): 3267–77. http://dx.doi.org/10.1007/s13369-016-2162-y.
Texto completoVranjkovic, Vuk, Predrag Teodorovic y Rastislav Struharik. "Universal Reconfigurable Hardware Accelerator for Sparse Machine Learning Predictive Models". Electronics 11, n.º 8 (8 de abril de 2022): 1178. http://dx.doi.org/10.3390/electronics11081178.
Texto completoSchumacher, Tobias, Tim Süß, Christian Plessl y Marco Platzner. "FPGA Acceleration of Communication-Bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study". International Journal of Reconfigurable Computing 2011 (2011): 1–11. http://dx.doi.org/10.1155/2011/760954.
Texto completoPérez, Ignacio y Miguel Figueroa. "A Heterogeneous Hardware Accelerator for Image Classification in Embedded Systems". Sensors 21, n.º 8 (9 de abril de 2021): 2637. http://dx.doi.org/10.3390/s21082637.
Texto completoShi, Kaisheng, Mingwei Wang, Xin Tan, Qianghua Li y Tao Lei. "Efficient Dynamic Reconfigurable CNN Accelerator for Edge Intelligence Computing on FPGA". Information 14, n.º 3 (20 de marzo de 2023): 194. http://dx.doi.org/10.3390/info14030194.
Texto completoMelnyk, Viktor A. y Vladyslav V. Hamolia. "Investigation of reconfigurable hardware platforms for 5G protocol stack functions acceleration". Applied Aspects of Information Technology 6, n.º 1 (10 de abril de 2023): 84–99. http://dx.doi.org/10.15276/aait.06.2023.7.
Texto completoFerianc, Martin, Hongxiang Fan, Divyansh Manocha, Hongyu Zhou, Shuanglong Liu, Xinyu Niu y Wayne Luk. "Improving Performance Estimation for Design Space Exploration for Convolutional Neural Network Accelerators". Electronics 10, n.º 4 (23 de febrero de 2021): 520. http://dx.doi.org/10.3390/electronics10040520.
Texto completoIrmak, Hasan, Federico Corradi, Paul Detterer, Nikolaos Alachiotis y Daniel Ziener. "A Dynamic Reconfigurable Architecture for Hybrid Spiking and Convolutional FPGA-Based Neural Network Designs". Journal of Low Power Electronics and Applications 11, n.º 3 (17 de agosto de 2021): 32. http://dx.doi.org/10.3390/jlpea11030032.
Texto completoHuang, Xiaoying, Zhichuan Guo, Mangu Song y Yunfei Guo. "AccelSDP: A Reconfigurable Accelerator for Software Data Plane Based on FPGA SmartNIC". Electronics 10, n.º 16 (11 de agosto de 2021): 1927. http://dx.doi.org/10.3390/electronics10161927.
Texto completoDondo Gazzano, Julio, Francisco Sanchez Molina, Fernando Rincon y Juan Carlos López. "Integrating Reconfigurable Hardware-Based Grid for High Performance Computing". Scientific World Journal 2015 (2015): 1–19. http://dx.doi.org/10.1155/2015/272536.
Texto completoKuznar, Damian, Robert Szczygiel, Piotr Maj y Anna Kozioł. "Design of artificial neural network hardware accelerator". Journal of Instrumentation 18, n.º 04 (1 de abril de 2023): C04013. http://dx.doi.org/10.1088/1748-0221/18/04/c04013.
Texto completoZamacola, Rafael, Andrés Otero y Eduardo de la Torre. "Multi-grain reconfigurable and scalable overlays for hardware accelerator composition". Journal of Systems Architecture 121 (diciembre de 2021): 102302. http://dx.doi.org/10.1016/j.sysarc.2021.102302.
Texto completoBabecki, Christopher, Wenchao Qian, Somnath Paul, Robert Karam y Swarup Bhunia. "An Embedded Memory-Centric Reconfigurable Hardware Accelerator for Security Applications". IEEE Transactions on Computers 65, n.º 10 (1 de octubre de 2016): 3196–202. http://dx.doi.org/10.1109/tc.2015.2512858.
Texto completoKang, Sungho, Youngmin Hur y Stephen A. Szygenda. "A Hardware Accelerator for Fault Simulation Utilizing a Reconfigurable Array Architecture". VLSI Design 4, n.º 2 (1 de enero de 1996): 119–33. http://dx.doi.org/10.1155/1996/60318.
Texto completoLeon, Vasileios, Spyridon Mouselinos, Konstantina Koliogeorgi, Sotirios Xydis, Dimitrios Soudris y Kiamal Pekmestzi. "A TensorFlow Extension Framework for Optimized Generation of Hardware CNN Inference Engines". Technologies 8, n.º 1 (13 de enero de 2020): 6. http://dx.doi.org/10.3390/technologies8010006.
Texto completoCho, Jaechan, Yongchul Jung, Seongjoo Lee y Yunho Jung. "Reconfigurable Binary Neural Network Accelerator with Adaptive Parallelism Scheme". Electronics 10, n.º 3 (20 de enero de 2021): 230. http://dx.doi.org/10.3390/electronics10030230.
Texto completoManjith B.C. y Ramasubramanian N. "Securing AES Accelerator from Key-Leaking Trojans on FPGA". International Journal of Embedded and Real-Time Communication Systems 11, n.º 3 (julio de 2020): 84–105. http://dx.doi.org/10.4018/ijertcs.2020070105.
Texto completoTahir, Ahsen, Gordon Morison, Dawn A. Skelton y Ryan M. Gibson. "Hardware/Software Co-Design of Fractal Features Based Fall Detection System". Sensors 20, n.º 8 (18 de abril de 2020): 2322. http://dx.doi.org/10.3390/s20082322.
Texto completoGowda, Kavitha Malali Vishveshwarappa, Sowmya Madhavan, Stefano Rinaldi, Parameshachari Bidare Divakarachari y Anitha Atmakur. "FPGA-Based Reconfigurable Convolutional Neural Network Accelerator Using Sparse and Convolutional Optimization". Electronics 11, n.º 10 (22 de mayo de 2022): 1653. http://dx.doi.org/10.3390/electronics11101653.
Texto completoChen, Hui, Kai Chen, Kaifeng Cheng, Qinyu Chen, Yuxiang Fu y Li Li. "An Efficient Hardware Accelerator for the MUSIC Algorithm". Electronics 8, n.º 5 (8 de mayo de 2019): 511. http://dx.doi.org/10.3390/electronics8050511.
Texto completoLu, Anni, Xiaochen Peng, Yandong Luo, Shanshi Huang y Shimeng Yu. "A Runtime Reconfigurable Design of Compute-in-Memory–Based Hardware Accelerator for Deep Learning Inference". ACM Transactions on Design Automation of Electronic Systems 26, n.º 6 (28 de junio de 2021): 1–18. http://dx.doi.org/10.1145/3460436.
Texto completoLiu, Bing, Danyin Zou, Lei Feng, Shou Feng, Ping Fu y Junbao Li. "An FPGA-Based CNN Accelerator Integrating Depthwise Separable Convolution". Electronics 8, n.º 3 (3 de marzo de 2019): 281. http://dx.doi.org/10.3390/electronics8030281.
Texto completoYan, Tianwei, Ning Zhang, Jie Li, Wenchao Liu y He Chen. "Automatic Deployment of Convolutional Neural Networks on FPGA for Spaceborne Remote Sensing Application". Remote Sensing 14, n.º 13 (29 de junio de 2022): 3130. http://dx.doi.org/10.3390/rs14133130.
Texto completoIBRAHIM, Atef, Hamed ELSIMARY y Abdullah ALJUMAH. "Novel Reconfigurable Hardware Accelerator for Protein Sequence Alignment Using Smith-Waterman Algorithm". IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E99.A, n.º 3 (2016): 683–90. http://dx.doi.org/10.1587/transfun.e99.a.683.
Texto completoMüller, Jan, Dirk Fimmel, Renate Merker y Rainer Schaffer. "A Hardware–Software System for Tomographic Reconstruction". Journal of Circuits, Systems and Computers 12, n.º 02 (abril de 2003): 203–29. http://dx.doi.org/10.1142/s021812660300074x.
Texto completoBarrios, Yubal, Alfonso Rodríguez, Antonio Sánchez, Arturo Pérez, Sebastián López, Andrés Otero, Eduardo de la Torre y Roberto Sarmiento. "Lossy Hyperspectral Image Compression on a Reconfigurable and Fault-Tolerant FPGA-Based Adaptive Computing Platform". Electronics 9, n.º 10 (26 de septiembre de 2020): 1576. http://dx.doi.org/10.3390/electronics9101576.
Texto completoRashid, Muhammad, Omar S. Sonbul, Muhammad Yousuf Irfan Zia, Muhammad Arif, Asher Sajid y Saud S. Alotaibi. "Throughput/Area-Efficient Accelerator of Elliptic Curve Point Multiplication over GF(2233) on FPGA". Electronics 12, n.º 17 (26 de agosto de 2023): 3611. http://dx.doi.org/10.3390/electronics12173611.
Texto completoTan, Yonghao, Mengying Sun, Huanshihong Deng, Haihan Wu, Minghao Zhou, Yifei Chen, Zhuo Yu et al. "A Reconfigurable Visual–Inertial Odometry Accelerated Core with High Area and Energy Efficiency for Autonomous Mobile Robots". Sensors 22, n.º 19 (9 de octubre de 2022): 7669. http://dx.doi.org/10.3390/s22197669.
Texto completoA, Sasikumar, Logesh Ravi, Ketan Kotecha, Indragandhi V y Subramaniyaswamy V. "Reconfigurable and hardware efficient adaptive quantization model-based accelerator for binarized neural network". Computers and Electrical Engineering 102 (septiembre de 2022): 108302. http://dx.doi.org/10.1016/j.compeleceng.2022.108302.
Texto completoGuo, Shuaizhi, Tianqi Wang, Linfeng Tao, Teng Tian, Zikun Xiang y Xi Jin. "RP-Ring: A Heterogeneous Multi-FPGA Accelerator". International Journal of Reconfigurable Computing 2018 (2018): 1–14. http://dx.doi.org/10.1155/2018/6784319.
Texto completoGhani, Arfan, Rawad Hodeify, Chan H. See, Simeon Keates, Dah-Jye Lee y Ahmed Bouridane. "Computer Vision-Based Kidney’s (HK-2) Damaged Cells Classification with Reconfigurable Hardware Accelerator (FPGA)". Electronics 11, n.º 24 (19 de diciembre de 2022): 4234. http://dx.doi.org/10.3390/electronics11244234.
Texto completoSestito, Cristian, Fanny Spagnolo y Stefania Perri. "Design of Flexible Hardware Accelerators for Image Convolutions and Transposed Convolutions". Journal of Imaging 7, n.º 10 (12 de octubre de 2021): 210. http://dx.doi.org/10.3390/jimaging7100210.
Texto completoKalomiros, John y John Lygouras. "Robotic Mapping and Localization with Real-Time Dense Stereo on Reconfigurable Hardware". International Journal of Reconfigurable Computing 2010 (2010): 1–17. http://dx.doi.org/10.1155/2010/480208.
Texto completoZhang, Peiheng. "An Implementation of Reconfigurable Computing Accelerator Card Oriented Bioinformatics". Journal of Computer Research and Development 42, n.º 6 (2005): 930. http://dx.doi.org/10.1360/crad20050605.
Texto completoChen, Yupeng, Bertil Schmidt y Douglas L. Maskell. "Reconfigurable Accelerator for the Word-Matching Stage of BLASTN". IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21, n.º 4 (abril de 2013): 659–69. http://dx.doi.org/10.1109/tvlsi.2012.2196060.
Texto completoKurdi, Aous H., Janos L. Grantner y Ikhlas M. Abdel-Qader. "Fuzzy Logic Based Hardware Accelerator with Partially Reconfigurable Defuzzification Stage for Image Edge Detection". International Journal of Reconfigurable Computing 2017 (2017): 1–13. http://dx.doi.org/10.1155/2017/1325493.
Texto completoSugiarto, Indar, Cristian Axenie y Jörg Conradt. "FPGA-Based Hardware Accelerator for an Embedded Factor Graph with Configurable Optimization". Journal of Circuits, Systems and Computers 28, n.º 02 (12 de noviembre de 2018): 1950031. http://dx.doi.org/10.1142/s0218126619500312.
Texto completoYazdani, Samar, Joël Cambonie y Bernard Pottier. "Coordinated concurrent memory accesses on a reconfigurable multimedia accelerator". Microprocessors and Microsystems 33, n.º 1 (febrero de 2009): 13–23. http://dx.doi.org/10.1016/j.micpro.2008.08.005.
Texto completoSchmitt, Christian, Moritz Schmid, Sebastian Kuckuk, Harald Köstler, Jürgen Teich y Frank Hannig. "Reconfigurable Hardware Generation of Multigrid Solvers with Conjugate Gradient Coarse-Grid Solution". Parallel Processing Letters 28, n.º 04 (diciembre de 2018): 1850016. http://dx.doi.org/10.1142/s0129626418500160.
Texto completoLopes, Alba y Monica Pereira. "Fast DSE of reconfigurable accelerator systems via ensemble machine learning". Analog Integrated Circuits and Signal Processing 108, n.º 3 (28 de mayo de 2021): 495–509. http://dx.doi.org/10.1007/s10470-021-01885-0.
Texto completoYang, Ruiheng, Zhikun Chen, Bin’an Wang, Yunfei Guo y Lingtong Hu. "A Lightweight Detection Method for Remote Sensing Images and Its Energy-Efficient Accelerator on Edge Devices". Sensors 23, n.º 14 (18 de julio de 2023): 6497. http://dx.doi.org/10.3390/s23146497.
Texto completoMehdipour, Farhad, Hiroaki Honda, Koji Inoue, Hiroshi Kataoka y Kazuaki Murakami. "A design scheme for a reconfigurable accelerator implemented by single-flux quantum circuits". Journal of Systems Architecture 57, n.º 1 (enero de 2011): 169–79. http://dx.doi.org/10.1016/j.sysarc.2010.07.009.
Texto completoChien, Shao-Yi y Liang-Gee Chen. "Reconfigurable Morphological Image Processing Accelerator for Video Object Segmentation". Journal of Signal Processing Systems 62, n.º 1 (18 de noviembre de 2008): 77–96. http://dx.doi.org/10.1007/s11265-008-0311-6.
Texto completoTan, Cheng, Chenhao Xie, Tong Geng, Andres Marquez, Antonino Tumeo, Kevin Barker y Ang Li. "ARENA: Asynchronous Reconfigurable Accelerator Ring to Enable Data-Centric Parallel Computing". IEEE Transactions on Parallel and Distributed Systems 32, n.º 12 (1 de diciembre de 2021): 2880–92. http://dx.doi.org/10.1109/tpds.2021.3081074.
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