Libros sobre el tema "Power hardware in loop"

Hardware-in-the-Loop simulation: A scalable, component-based, time-triggered hardware-in-the-loop simulation framework. Saarbrücken: VDM Verl. Dr. Müller, 2008.

D, Sable y Goddard Space Flight Center, eds. Space platform power system hardware testbed: Final report. Greenbelt, MD: NASA Goddard Space Flight Center, 1991.

Stepp, Ronald K. Electronic combat hardware-in-the-loop testing in an open air environment. Monterey, Calif: Naval Postgraduate School, 1994.

hler, Christian Ko. Enhancing embedded systems simulation: A Chip-Hardware-in-the-loop simulation framework. Wiesbaden: Vieweg + Teubner, 2011.

Tripathi, Saurabh Mani y Francisco M. Gonzalez-Longatt, eds. Real-Time Simulation and Hardware-in-the-Loop Testing Using Typhoon HIL. Singapore: Springer Nature Singapore, 2023. http://dx.doi.org/10.1007/978-981-99-0224-8.

The power of assertions in SystemVerilog. New York: Springer, 2010.

Karimi-Ghartemani, Masoud. Enhanced Phase-Locked Loop Structures for Power and Energy Applications. Hoboken, NJ: John Wiley & Sons, Inc, 2014. http://dx.doi.org/10.1002/9781118795187.

Karimi-Ghartemani, Masoud. Enhanced phase-locked loop structures for power and energy applications. Hoboken, New Jersey: IEEE Press/Wiley, 2014.

Singh, Gaurav y Sandeep K. Shukla. Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications. New York, NY: Springer New York, 2010. http://dx.doi.org/10.1007/978-1-4419-6481-6.

Shafique, Muhammad y Jörg Henkel. Hardware/Software Architectures for Low-Power Embedded Multimedia Systems. New York, NY: Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4419-9692-3.

Singh, Gaurav. Low power hardware synthesis from concurrent action-oriented specifications. New York: Springer, 2010.

Shafique, Muhammad. Hardware/Software Architectures for Low-Power Embedded Multimedia Systems. New York, NY: Springer Science+Business Media, LLC, 2011.

Machin, James R. An analysis of the Longbow HELLFIRE hardware in the loop lot acceptance plan. Monterey, Calif: Naval Postgraduate School, 1994.

Lee, Murrer Robert y Society of Photo-optical Instrumentation Engineers., eds. Technologies for synthetic environments: Hardware-in-the-loop testing : 9-11 April 1996, Orlando, Florida. Bellingham, Wash: SPIE, 1996.

Badorf, Michael G. Power electronic building block network simulation testbed stability criteria and hardware validation studies. Monterey, Calif: Naval Postgraduate School, 1997.

Murrer, Robert Lee. Technologies for synthetic environments: Hardware-in-the-loop testing XII : 10 April 2007, Orlando, Florida, USA. Bellingham, Wash: SPIE, 2007.

Lee, Murrer Robert y Society of Photo-optical Instrumentation Engineers., eds. Technologies for synthetic environments: Hardware-in-the-loop testing III : 13-15 April 1998, Orlando, Florida. Bellingham, Wash., USA: SPIE, 1998.

Lee, Murrer Robert y Society of Photo-optical Instrumentation Engineers., eds. Technologies for synthetic environments: Hardware-in-the-loop testing II : 21-23 April 1997, Orlando, Florida. Bellingham, Wash., USA: SPIE, 1997.

Lee, Murrer Robert y Society of Photo-optical Instrumentation Engineers., eds. Technologies for synthetic environments: Hardware-in-the-loop testing IV : 5-7 April 1999, Orlando, Florida. Bellingham, Wash., USA: SPIE, 1999.

Murrer, Robert Lee. Technologies for synthetic environments: Hardware-in-the-loop testing XII : 10 April 2007, Orlando, Florida, USA. Editado por Society of Photo-optical Instrumentation Engineers. Bellingham, Wash: SPIE, 2007.

Calif.) Technologies for Synthetic Evironments: Hardware-in-the-Loop (Conference) (18th 2013 Burlingame. Technologies for Synthetic Evironments: Hardware-in-the-Loop XVIII: 2 May 2013, Baltimore, Maryland, United States. Editado por Buford James A. Jr, Murrer Robert Lee Jr, Ballard Gary H y SPIE (Society). Bellingham, Washington, USA: SPIE, 2013.

Osakeyhtio, Imatran Voima y U.S. Nuclear Regulatory Commission. Office of Nuclear Regulatory Research., eds. Assessment study of RELAP5/MOD2 against IVO loop seal tests. Washington, DC: U.S. Nuclear Regulatory Commission, 1992.

Hillberg, Seppo. Full scale loop seal experiments with TRACE V5 Patch 1. Washington, DC: U.S. Nuclear Regulatory Commission, 2011.

Osakeyhtiö, Imatran Voima y U.S. Nuclear Regulatory Commission. Office of Nuclear Regulatory Research, eds. Assessment study of RELAP5/MOD2 against IVO loop seal tests. Washington, DC: U.S. Nuclear Regulatory Commission, 1992.

Buford, James A. y Robert Lee Murrer. Technologies for synthetic environments: Hardware-in-the-loop testing XIV : 13 April 2009, Orlando, Florida, United States. Bellingham, Wash: SPIE, 2009.

Buford, James A. Technologies for synthetic environments: Hardware-in-the-loop, XVII : 25-26 April 2012, Baltimore, Maryland, United States. Bellingham, Washington: SPIE, 2012.

(Society), SPIE, ed. Technologies for synthetic environments: Hardware-in-the-loop XVI : 27-28 April 2011, Orlando, Florida, United States. Bellingham, Wash: SPIE, 2011.

Lee, Murrer Robert y Society of Photo-optical Instrumentation Engineers., eds. Technologies for synthetic environments: Hardware-in-the-loop testing V : 24-26 April, 2000, Orlando, [Florida] USA. Bellingham, Wash: SPIE, 2000.

Lee, Murrer Robert y Society of Photo-optical Instrumentation Engineers., eds. Technologies for synthetic environments: Hardware-in-the-loop testing VI : 16-18 April, 2001, Orlando, [Florida] USA. Bellingham, Washington: SPIE, 2001.

Lee, Murrer Robert y Society of Photo-optical Instrumentation Engineers., eds. Technologies for synthetic environments: Hardware-in-the-loop testing IX : 13-14 April, 2004, Orlando, Florida, USA. Bellingham, Wash: SPIE, 2004.

Murrer, Robert Lee. Technologies for synthetic environments: Hardware-in-the-loop testing XIII : 17-18 March 2008, Orlando, Florida, USA. Editado por Society of Photo-optical Instrumentation Engineers. Bellingham, Wash: SPIE, 2008.

Murrer, Robert Lee y Scott B. Mobley. Technologies for synthetic environments: Hardware-in-the-loop XVI : 27-28 April 2011, Orlando, Florida, United States. Editado por SPIE (Society). Bellingham, Wash: SPIE, 2011.

Lee, Murrer Robert y Society of Photo-optical Instrumentation Engineers., eds. Technologies for synthetic environments: Hardware-in-the-loop testing VII : 1-2 April, 2002, Orlando, [Florida] USA. Bellingham, Wash: SPIE, 2002.

Lee, Murrer Robert, Society of Photo-optical Instrumentation Engineers. y Ball Aerospace & Technologies Corporation (USA), eds. Technologies for synthetic environments: Hardware-in-the-loop testing X : 29-30 March, 2005, Orlando, Florida, USA. Bellingham, Wash: SPIE, 2005.

Buford, James A. y Robert Lee Murrer. Technologies for synthetic environments: Hardware-in-the-loop testing XV : 7-8 April 2010, Orlando, Florida, United States. Editado por SPIE (Society). Bellingham, Wash: SPIE, 2010.

Holman, Garry S. Application of reliability techniques to prioritize BWR recirculation loop welds for in-service inspection. Washington, DC: Division of Engineering, Office of Nuclear Regulatory Research, U.S. Nuclear Regulatory Commission, 1989.

M, Haraburda Francis y United States. National Aeronautics and Space Administration., eds. Space Station Freedom electrical power system hardware commonality with the United States Polar Platform. [Washington, DC]: National Aeronautics and Space Administration, 1989.

service), SpringerLink (Online, ed. Designing embedded processors: A low power perspective. Dordrecht: Springer, 2007.

L, Auflick J., Haney L. N, U.S. Nuclear Regulatory Commission. Division of Safety Issue Resolution., Idaho National Engineering Laboratory y EG & G Idaho., eds. Assessment of ISLOCA risk-methodology and application to a Westinghouse four-loop ice condenser plant. Washington, DC: Division of Safety Issue Resolution, Office of Nuclear Regulatory Research, U.S. Nuclear Regulatory Commission, 1992.

Nora, O'Neill-Rood y Dryden Flight Research Facility, eds. The Aerospace Energy Systems Laboratory: Hardware and software implementation. Edwards, Calif: National Aeronautics and Space Administration, Ames Research Center, Dryden Flight Research Facility, 1989.

1949-, Bradley David J., ed. Exploring the IBM PC Power Series: The instant insider's guide to IBM's revolutionary new personal computers. Gulf Breeze, FL: Maximum Press, 1996.

Frankel, Justin. MP3 Power: With Winamp. Cincinnati: Muska & Lipman Publishing, 1999.

Tuijl, Ed A. J. M. van., ed. Power trade-offs and low-power in analog CMOS ICs. Boston: Kluwer Academic Publishers, 2002.

Cramond, Wallis R. Shutdown decay heat removal analysis of a combustion engineering 2-loop pressurized water reactor: Case study. Washington, DC: Division of Reactor and Plant Systems, Office of Nuclear Regulatory Research, U.S. Nuclear Regulatory Commission, 1987.

Young, Cynthia Y. Power PC Hardware Guide. Pearson Education, Limited, 2000.

Preve, Francis. Power Tools: Software for Loop Music. Backbeat Books, 2004.

Joshi, Adit. Automotive Applications of Hardware-in-the-Loop (HIL) Simulation. SAE International, 2019. http://dx.doi.org/10.4271/9781468600070.

Automotive Applications of Hardware-In-the-Loop (HIL) Simulation. SAE International, 2019.

NPSAT1 Attitude Control Subsystem Hardware-in-the-Loop Simulation. Storming Media, 2003.

Joshi, Adit. Automotive Applications of Hardware-In-the-Loop (HIL) Simulation. SAE International, 2019.