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1

Giovanardi, Fabio <1984&gt. "Analysis of charge-transport properties in GST materials for next generation phase-change memory devices". Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2013. http://amsdottorato.unibo.it/5583/4/giovanardi_fabio_tesi.pdf.

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The quest for universal memory is driving the rapid development of memories with superior all-round capabilities in non-volatility, high speed, high endurance and low power. The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. To resolve this issue the industry is improving existing technologies such as Flash and exploring new ones. Among those new technologies is the Phase Change Memory (PCM), which overcomes some of the shortcomings of the Flash such as durability and scalability. This alternative non-volatile memory technology, which uses resistance contrast in phase-change materials, offers more density relative to DRAM, and can help to increase main memory capacity of future systems while remaining within the cost and power constraints. Chalcogenide materials can suitably be exploited for manufacturing phase-change memory devices. Charge transport in amorphous chalcogenide-GST used for memory devices is modeled using two contributions: hopping of trapped electrons and motion of band electrons in extended states. Crystalline GST exhibits an almost Ohmic I(V) curve. In contrast amorphous GST shows a high resistance at low biases while, above a threshold voltage, a transition takes place from a highly resistive to a conductive state, characterized by a negative differential-resistance behavior. A clear and complete understanding of the threshold behavior of the amorphous phase is fundamental for exploiting such materials in the fabrication of innovative nonvolatile memories. The type of feedback that produces the snapback phenomenon is described as a filamentation in energy that is controlled by electron–electron interactions between trapped electrons and band electrons. The model thus derived is implemented within a state-of-the-art simulator. An analytical version of the model is also derived and is useful for discussing the snapback behavior and the scaling properties of the device.
Lo sviluppo dei sistemi di memoria di futura generazione è guidato principalmente dalla ricerca di una tecnologia in grado di superare quelle attuali in ogni loro specifica di funzionamento, dalla ritenzione di dato alla velocità di accesso, migliorandone la durata e riducendo il dispendio energetico. Il sottosistema delle memorie assorbe una parte significativa delle risorse del macro sistema costituito dal calcolatore, tanto da aver quasi raggiunto il limite tecnologico nel caso delle odierne memorie di tipo DRAM. La soluzione più promettente sembra essere quella delle memorie a cambiamento di fase (PCM), in grado di colmare anche i limiti mostrati dalla tecnologia Flash nell’ambito della durata e scalabilità. I materiali che consentono di realizzare dispostivi a cambiamento di fase pilotato elettricamente appartengono alla famiglia dei calcogenuri. Tra i diversi composti calcogenuri quello attualmente identificato come soluzione più promettente è il Ge2Sb2Te5 (GST). Il trasporto di carica all’interno di dispositivi di memoria realizzati con tali materiali è stato modellato considerando l’azione di due contributi differenti: hopping di cariche intrappolate e moto di elettroni liberi in stati estesi. Il GST mostra un comportamento elettrico pressoché Ohmico in fase cristallina mentre, in fase amorfa, risulta essere poco conduttivo per basse correnti fino al superamento di una tensione di soglia oltre la quale si assiste al passaggio da uno stato altamente resistivo ad uno altamente conduttivo, caratterizzato da un andamento a resistenza differenziale negativa (NDR). Il meccanismo retroattivo che induce il fenomeno di snapback viene descritto come filamentazione in energia controllata dalle interazioni tra elettroni liberi ed elettroni intrappolati. Il modello fisico ricavato è stato implementato all’interno di un simulatore di dispositivi di ultima generazione ed è stato in seguito riprodotto in una versione analitica semplificata in grado, però, di permettere una prima analisi del comportamento elettrico del dispositivo e delle sue proprietà di scaling.
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2

Giovanardi, Fabio <1984&gt. "Analysis of charge-transport properties in GST materials for next generation phase-change memory devices". Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2013. http://amsdottorato.unibo.it/5583/.

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The quest for universal memory is driving the rapid development of memories with superior all-round capabilities in non-volatility, high speed, high endurance and low power. The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. To resolve this issue the industry is improving existing technologies such as Flash and exploring new ones. Among those new technologies is the Phase Change Memory (PCM), which overcomes some of the shortcomings of the Flash such as durability and scalability. This alternative non-volatile memory technology, which uses resistance contrast in phase-change materials, offers more density relative to DRAM, and can help to increase main memory capacity of future systems while remaining within the cost and power constraints. Chalcogenide materials can suitably be exploited for manufacturing phase-change memory devices. Charge transport in amorphous chalcogenide-GST used for memory devices is modeled using two contributions: hopping of trapped electrons and motion of band electrons in extended states. Crystalline GST exhibits an almost Ohmic I(V) curve. In contrast amorphous GST shows a high resistance at low biases while, above a threshold voltage, a transition takes place from a highly resistive to a conductive state, characterized by a negative differential-resistance behavior. A clear and complete understanding of the threshold behavior of the amorphous phase is fundamental for exploiting such materials in the fabrication of innovative nonvolatile memories. The type of feedback that produces the snapback phenomenon is described as a filamentation in energy that is controlled by electron–electron interactions between trapped electrons and band electrons. The model thus derived is implemented within a state-of-the-art simulator. An analytical version of the model is also derived and is useful for discussing the snapback behavior and the scaling properties of the device.
Lo sviluppo dei sistemi di memoria di futura generazione è guidato principalmente dalla ricerca di una tecnologia in grado di superare quelle attuali in ogni loro specifica di funzionamento, dalla ritenzione di dato alla velocità di accesso, migliorandone la durata e riducendo il dispendio energetico. Il sottosistema delle memorie assorbe una parte significativa delle risorse del macro sistema costituito dal calcolatore, tanto da aver quasi raggiunto il limite tecnologico nel caso delle odierne memorie di tipo DRAM. La soluzione più promettente sembra essere quella delle memorie a cambiamento di fase (PCM), in grado di colmare anche i limiti mostrati dalla tecnologia Flash nell’ambito della durata e scalabilità. I materiali che consentono di realizzare dispostivi a cambiamento di fase pilotato elettricamente appartengono alla famiglia dei calcogenuri. Tra i diversi composti calcogenuri quello attualmente identificato come soluzione più promettente è il Ge2Sb2Te5 (GST). Il trasporto di carica all’interno di dispositivi di memoria realizzati con tali materiali è stato modellato considerando l’azione di due contributi differenti: hopping di cariche intrappolate e moto di elettroni liberi in stati estesi. Il GST mostra un comportamento elettrico pressoché Ohmico in fase cristallina mentre, in fase amorfa, risulta essere poco conduttivo per basse correnti fino al superamento di una tensione di soglia oltre la quale si assiste al passaggio da uno stato altamente resistivo ad uno altamente conduttivo, caratterizzato da un andamento a resistenza differenziale negativa (NDR). Il meccanismo retroattivo che induce il fenomeno di snapback viene descritto come filamentazione in energia controllata dalle interazioni tra elettroni liberi ed elettroni intrappolati. Il modello fisico ricavato è stato implementato all’interno di un simulatore di dispositivi di ultima generazione ed è stato in seguito riprodotto in una versione analitica semplificata in grado, però, di permettere una prima analisi del comportamento elettrico del dispositivo e delle sue proprietà di scaling.
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3

Hernandez, Gerardo Rodriguez. "Study of mixed mode electro-optical operations of Ge2Sb2Te5". Thesis, University of Oxford, 2017. https://ora.ox.ac.uk/objects/uuid:5bb8c1f5-2f4b-4eb0-a61a-3978af04211f.

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Chalcogenide based Phase Change Materials are currently of great technological interest in the growing field of optoelectronics. Ge2Sb2Te5 (GST) is the most widely studied phase change material, and it has been commercially used in both optical and electronic data storage applications, due to its ability to switch between two different atomic configurations, at high speed and with low power consumption, as well as its high optical and electrical contrast between amorphous and crystalline states. Despite its well-known optical and electrical properties, the operation in combination of optical and electrical domains has not yet been fully investigated. This work studies the operation of GST nano-devices exposed to a combination of optical and electrical stimuli or mixed mode by asking, is it possible to electrically measure an optically induced phase change, or vice versa? If so, how do the optical and electrical responses relate to each other, and is it possible to operate GST with a combination of optical and electrical signals? What are the technical constraints that need to be considered in order to fabricate GST devices that could be operated either optically or electrically? In order to answer these questions, experiments that characterized the optical and electrical responses of GST based nano-devices were performed. It was found that different crystallization mechanisms may have influence in the response, and that the thermal and optical design characteristics of the device play a key role in its operation. Finally a proof of principle, of an opto-electonic memory device that can be read electrically, reset optically and write electrically, is presented. This opens up possibilities for the development of new opto-eloectronic applications such as non-volatile interfaces between future photonics and electronics, high speed optical communication detectors, high speed cameras, artificial retinas and many more.
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4

Kiouseloglou, Athanasios. "Caractérisation et conception d' architectures basées sur des mémoires à changement de phase". Thesis, Université Grenoble Alpes (ComUE), 2015. http://www.theses.fr/2015GREAT128/document.

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Les mémoires à base de semi-conducteur sont indispensables pour les dispositifs électroniques actuels. La demande croissante pour des dispositifs mémoires fortement miniaturisées a entraîné le développement de mémoires non volatiles fiables qui sont utilisées dans des systèmes informatiques pour le stockage de données et qui sont capables d'atteindre des débits de données élevés, avec des niveaux de dissipation d'énergie équivalents voire moindres que ceux des technologies mémoires actuelles.Parmi les technologies de mémoires non-volatiles émergentes, les mémoires à changement de phase (PCM) sont le candidat le plus prometteur pour remplacer la technologie de mémoire Flash conventionnelle. Les PCM offrent une grande variété de fonctions, comme une lecture et une écriture rapide, un excellent potentiel de miniaturisation, une compatibilité CMOS et des performances élevées de rétention de données à haute température et d'endurance, et peuvent donc ouvrir la voie à des applications non seulement pour les dispositifs mémoires, mais également pour les systèmes informatiques à hautes performances. Cependant, certains problèmes de fiabilité doivent encore être résolus pour que les PCM se positionnent comme un remplacement concurrentiel de la mémoire Flash.Ce travail se concentre sur l'étude de mémoires à changement de phase intégrées afin d'optimiser leurs performances et de proposer des solutions pour surmonter les principaux points critiques de la technologie, ciblant des applications à hautes températures. Afin d'améliorer la fiabilité de la technologie, la stœchiométrie du matériau à changement de phase a été conçue de façon appropriée et des dopants ont été ajoutés, optimisant ainsi la stabilité thermique. Une diminution de la vitesse de programmation est également rapportée, ainsi qu'un drift résiduel de la résistance de l'état de faiblement résistif vers des valeurs de résistance plus élevées au cours du temps.Une nouvelle technique de programmation est introduite, permettant d'améliorer la vitesse de programmation des dispositifs et, dans le même temps, de réduire avec succès le phénomène de drift en résistance. Par ailleurs, un algorithme de programmation des PCM multi-bits est présenté. Un générateur d'impulsions fournissant des impulsions avec la tension souhaitée en sortie a été conçu et testé expérimentalement, répondant aux demandes de programmation d'une grande variété de matériaux innovants et en permettant la programmation précise et l’optimisation des performances des PCM
Semiconductor memory has always been an indispensable component of modern electronic systems. The increasing demand for highly scaled memory devices has led to the development of reliable non-volatile memories that are used in computing systems for permanent data storage and are capable of achieving high data rates, with the same or lower power dissipation levels as those of current advanced memory solutions.Among the emerging non-volatile memory technologies, Phase Change Memory (PCM) is the most promising candidate to replace conventional Flash memory technology. PCM offers a wide variety of features, such as fast read and write access, excellent scalability potential, baseline CMOS compatibility and exceptional high-temperature data retention and endurance performances, and can therefore pave the way for applications not only in memory devices, but also in energy demanding, high-performance computer systems. However, some reliability issues still need to be addressed in order for PCM to establish itself as a competitive Flash memory replacement.This work focuses on the study of embedded Phase Change Memory in order to optimize device performance and propose solutions to overcome the key bottlenecks of the technology, targeting high-temperature applications. In order to enhance the reliability of the technology, the stoichiometry of the phase change material was appropriately engineered and dopants were added, resulting in an optimized thermal stability of the device. A decrease in the programming speed of the memory technology was also reported, along with a residual resistivity drift of the low resistance state towards higher resistance values over time.A novel programming technique was introduced, thanks to which the programming speed of the devices was improved and, at the same time, the resistance drift phenomenon could be successfully addressed. Moreover, an algorithm for programming PCM devices to multiple bits per cell using a single-pulse procedure was also presented. A pulse generator dedicated to provide the desired voltage pulses at its output was designed and experimentally tested, fitting the programming demands of a wide variety of materials under study and enabling accurate programming targeting the performance optimization of the technology
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5

Sevison, Gary Alan. "Silicon Compatible Short-Wave Infrared Photonic Devices". University of Dayton / OhioLINK, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1523553057993197.

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6

Aboujaoude, Andrea E. "Nanopatterned Phase-Change Materials for High-Speed, Continuous Phase Modulation". University of Dayton / OhioLINK, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1538243834791942.

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7

Seong, Nak Hee. "A reliable, secure phase-change memory as a main memory". Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/50123.

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The main objective of this research is to provide an efficient and reliable method for using multi-level cell (MLC) phase-change memory (PCM) as a main memory. As DRAM scaling approaches the physical limit, alternative memory technologies are being explored for future computing systems. Among them, PCM is the most mature with announced commercial products for NOR flash replacement. Its fast access latency and scalability have led researchers to investigate PCM as a feasible candidate for DRAM replacement. Moreover, the multi-level potential of PCM cells can enhance the scalability by increasing the number of bits stored in a cell. However, the two major challenges for adopting MLC PCM are the limited write endurance cycle and the resistance drift issue. To alleviate the negative impact of the limited write endurance cycle, this thesis first introduces a secure wear-leveling scheme called Security Refresh. In the study, this thesis argues that a PCM design not only has to consider normal wear-out under normal application behavior, most importantly, it must take the worst-case scenario into account with the presence of malicious exploits and a compromised OS to address the durability and security issues simultaneously. Security Refresh can avoid information leak by constantly migrating their physical locations inside the PCM, obfuscating the actual data placement from users and system software. In addition to the secure wear-leveling scheme, this thesis also proposes SAFER, a hardware-efficient multi-bit stuck-at-fault error recovery scheme which can function in conjunction with existing wear-leveling techniques. The limited write endurance leads to wear-out related permanent failures, and furthermore, technology scaling increases the variation in cell lifetime resulting in early failures of many cells. SAFER exploits the key attribute that a failed cell with a stuck-at value is still readable, making it possible to continue to use the failed cell to store data; thereby reducing the hardware overhead for error recovery. Another approach that this thesis proposes to address the lower write endurance is a hybrid phase-change memory architecture that can dynamically classify, detect, and isolate frequent writes from accessing the phase-change memory. This proposed architecture employs a small SRAM-based Isolation Cache with a detection mechanism based on a multi-dimensional Bloom filter and a binary classifier. The techniques are orthogonal to and can be combined with other wear-out management schemes to obtain a synergistic result. Lastly, this thesis quantitatively studies the current art for MLC PCM in dealing with the resistance drift problem and shows that the previous techniques such as scrubbing or error correction schemes are incapable of providing sufficient level of reliability. Then, this thesis proposes tri-level-cell (3LC) PCM and demonstrates that 3LC PCM can be a viable solution to achieve the soft error rate of DRAM and the performance of single-level-cell PCM.
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8

Huang, Bolong. "Theoretical study on phase change memory materials". Thesis, University of Cambridge, 2012. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.609986.

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9

Almoric, Jean. "Développement d'un nouvel instrument couplant FIB/SEM UHV et OTOF-SIMS à haute résolution spatiale pour la microélectronique et ses applications". Electronic Thesis or Diss., Aix-Marseille, 2021. http://www.theses.fr/2021AIXM0368.

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La spectrométrie de masse d’ion secondaire (SIMS) est probablement la technique d'analyse chimique la plus largement utilisée en science des semi-conducteurs et en métallurgie en raison de sa sensibilité ultime à tous les éléments notamment au plus légers. Avec la réduction de la taille des systèmes, l'imagerie chimique 3D haute résolution devient une condition préalable au développement de nouveaux matériaux. Dans cette thèse, nous rapportons le développement et l’optimisation d'un SIMS innovant implémenté dans un microscope électronique à balayage. L'équipement permet d’obtenir une cartographie chimique élémentaire à très haute résolution (~25nm). La capacité de la technique est démontrée avec la caractérisation à l'échelle nanométrique d’une part de superalliages métalliques nécessaire à la fabrication de pièces moteurs pour l’aviation et d’autre part d’alliages chalcogénures utilisés dans les mémoires à changement de phase de dernière génération développées en microélectronique
Secondary Ion Mass Spectrometry (SIMS) is probably the most widely used chemical analysis technique in semiconductor science and metallurgy because of its ultimate sensitivity to all elements, especially the lighter ones. With systems downsizing, high-resolution 3D chemical imaging is becoming a prerequisite for the development of new materials. In this thesis, we report the development and optimization of an innovative SIMS implemented in a scanning electron microscope. The equipment makes it possible to obtain elementary chemical mapping at very high resolution (~25nm). The capacity of the technique is demonstrated with the characterization at the nanometric scale on the one hand of metallic superalloys necessary for the manufacture of aircraft engine parts and on the other hand of chalcogenide alloys used in the latest generation phase change memories developed in microelectronics
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10

Huang, Ruomeng. "Confined nanoscale chalcogenide phase change material and memory". Thesis, University of Southampton, 2015. https://eprints.soton.ac.uk/379321/.

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The miniaturization of memory devices has been one of the major driving forces in the exploration of ever faster, smaller and more efficient memory concepts. Among all the competitors for the next generation of non-volatile memory, phase change materials based random access memory has emerged as a leading candidate. A better understanding of nanoscale properties of phase change materials and the ability of selective depositing them into confined nanostructures are substantially important in the long march towards smaller more densely packed memory bits. A novel top-down spacer etch technique has been developed for fabricating sub hundred nanometre phase change Ge2Sb2Te5 nanowires. Taking advantage of this technique which allows precise control over nanowire position and geometries, the contact properties between phase change material and metallic electrode in nanoscale can be quantitatively investigated. The results reveal a specific contact resistance of 7.56 x 10-5.
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11

Gao, Shen. "Transaction logging and recovery on phase-change memory". HKBU Institutional Repository, 2013. http://repository.hkbu.edu.hk/etd_ra/1549.

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12

Soares, Bruno Flavio Nogueira de Sousa. "Nanoparticle phase change functionality for photonic switching and optical memory". Thesis, University of Southampton, 2007. https://eprints.soton.ac.uk/427052/.

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Nanoscale photonic functionalities based on light-induced structural transitions in nanoparticles have been investigated, and it hag been experimentally shown that nanoparticles can act as both low power nanoscale optical switches and as resonator-less optical memory elements. A system for in-situ growth and characterization of gallium nanoparticles, which combined technologies including atomic-beam deposition, ultra-high vacuum, cryogenics, and sophisticated fibre instrumentation including diode and ultra-fast laaers, has been developed. Optica,l switching has been observed in a gallium nanoparticle film on the end of a single mode optical fibre simultaneously in rejection and transmission, and under different regimes of excitation, for the first time. Measurements of the sub-microsecond dynamics of such light-by-light control allowed the first study of the fast kinetics of solid-solid and solid-hquid structural transformations in gallium nanoparticles to be performed. Single gallium nanoparticles have been grown from an atomic beam in the nanoaperture at the tip of a tapered optical fibre for the first time. Reversible light-induced reflectivity changes associated with a sequence of transformations between different structural forms (both solid-solid and solid-liquid) stimulated by optical excitation at nanowatt power levels, have been observed in such particles for the first time. The complex temperature hysteresis of the narioparticle's nonlinear response has been observed and it has been discovered that the extent of overcooling can be controlled by varying the optical pumping regime. The first demonstration of nanoscale all-optical resonator-less memory functionality baaed on phase transformations has been performed using a film of gallium nanoparticles. It has been shown that single 1 μs optical pulses of a few mW peak power can be used to 'write' information to the memory by converting the particles from a lower energy phase (logic state 0) to a higher energy phase (logic state 1). A high contrast method for 'reading' the state of the particle memory, based on measurements of the reflectivity change induced by a modulated pump beam, has been developed. Both volatile and non-volatile modes of memory operation have been demonstrated. For the 6rst time, an optical memory element based on a single particle has been demonstrated. It has been shown that an 80 nm gallium nanoparticle can act as a fourlevel nanoscale optical memory. Information is encoded on the particle by switching it between phases using single optical pulses with energies as low as 1.5 pJ, and by varying the pulse energy different states can be directly accessed from both ground and intermediate states, A closely packed array of such particles could provide a storage density of about 0.2Tb/in^. The experimental work has been underpinned by the development of appropriate qualitative physical models of the processes involved, so as to describe the relationships between excitation controlled phase coexistence in nanoparticles, their optical properties and the demonstrated functionalities.
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13

El, Hassan Nemat Hassan Ahmed. "Development of phase change memory cell electrical circuit model for non-volatile multistate memory device". Thesis, University of Nottingham, 2017. http://eprints.nottingham.ac.uk/39646/.

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Phase change memory (PCM) is an emerging non-volatile memory technology that demonstrates promising performance characteristics. The presented research aims to study the feasibility of using resistive non-volatile PCM in embedded memory applications, and in bridging the performance gap in traditional memory hierarchy between volatile and non-volatile memories. The research studies the operation dynamics of PCM, including its electrical, thermal and physical properties; in order to determine its behaviour. A PCM cell circuit model is designed and simulated with the aid of SPICE tools (LTSPICE IV). The first step in the modelling process was to design a single-level PCM (SLPCM) cell circuit model that stores a single bit of data. To design the PCM circuit model; crystallization theory and heat transfer equation were utilized. The developed electrical circuit model evaluates the physical transformations that a PCM cell undergoes in response to an input pulse. Furthermore, the developed model accurately simulated the temperature profile, the crystalline fraction, and the resistance of the cell as a function of the programming pulse. The circuit model is then upgraded into a multilevel phase change memory (MLPCM) cell circuit model. The upgraded MLPCM circuit model stores two bits of data, and incorporates resistance drift with time. The multiple resistance levels were achieved by controlling the programming pulse width in the range of 10ns to 200ns. Additionally, the drift behaviour was precisely evaluated; by using statistical data of drift exponents, and evaluating the exact drift duration. Moreover, the simulation results for the designed SLPCM and MLPCM cell models were found to be in close agreement with experimental data. The simulated I-V characteristics for both SLPCM and MLPCM mimicked the experimentally produced I-V curves. Furthermore, the simulated drift resistance levels matched the experimental data for drift durations up to 103 seconds; which is the available experimental data duration in technical literature. Furthermore, the simulation results of MLPCM showed that the deviation between the programmed and drifted resistance can reach 6x106Ω in less than 1010 seconds. This resistance deviation leads to reading failures in less than 100 seconds after programming, if standard fixed sensing thresholds method was used. Therefore, to overcome drift reliability issues, and retain the density advantage offered by multilevel operation; a time-aware sensing scheme is developed. The designed sensing scheme compensates for the drift caused resistance deviation; by using statistical data of drift coefficients to forecast adaptive sensing thresholds. The simulation results showed that the use of adaptive time-aware sensing thresholds completely eliminated drift reliability issues and read errors. Furthermore, PCM based nanocrossbar memory structure performance in terms of delay and energy consumption is studied in simulation environment. The nanocrossbar is constructed with a grid of connecting wires; and the designed PCM cell circuit model is used as memory element and placed at junction points of the grid. Then the effect of connecting nanowires resistance in PCM nanocrossbar performance is studied in passive crossbars. The resistance of a connecting wire segment was evaluated with physical formulas that calculate nanoscaled conductors’ resistance. Then a resistor that is equivalent to each wire segment resistance is placed in the tested crossbar structure. Simulation results showed that due to connecting wires resistance; the PCM cells are not truly biased to programming voltage and ground. This leads to 40% deviation in the programed low resistive state from the targeted levels. Thus, affecting PCM reliability and decreasing the high to low resistance ratio by 90%. Therefore, programming and architectural solutions to wire resistance related reliability issue ar presented. Where dissipated power across wire resistance is compensated for; by controlling programming pulse duration. The programming solution retained reliability however; it increased programming energy consumption and delay by an average of 40pJ and 60ns respectively per operation. Additionally, the effects of leakage energy in PCM based nanocrossbars were studied in simulation environment. Then, a structural solution was developed and designed. In the designed structure; leakage sneak paths are eliminated by introducing individual word lines to each memory element. This method led to 30% reduction in reading delay, and consumed only about sixth the leakage energy consumed by the standard structure. Moreover, a sensing scheme that aims to reduce energy consumption in PCM based nanocrossbars during reading process was explored. The sensing method is developed using AC current in contrast to the standard DC current reading circuits. In the designed sensing circuit, a low pass filter is utilized. Accordingly, the filter attenuation of the applied AC reading signal indicates the stored state. The proposed circuit design of the AC sensing scheme was constructed and studied in simulation environment. Simulation results showed that AC sensing has reduced reading energy consumption by over 50%; compared to standard DC sensing scheme. Furthermore, the use of SLPCM and MLPCM in memory applications as crossbar memory elements, and in logic applications i.e. PCM based LUTs was explored and tested in simulation environment. The PCM performance in crossbar memory was then compared to current Static Random Access Memory (SRAM) technology and against one of the main emerging resistive non-volatile memory technologies i.e. Memristors. Simulation results showed that programming and reading energy consumption of PCM based crossbars were five orders of magnitude more than SRAM based crossbars. And reading delay of SRAM based crossbars was only 38% of reading delay of PCM based counterparts. However, PCM cells occupies less than 60% of the area required by SRAM and can store multiple bit in a single cell. Moreover, Memristor based nanocrossbars outperformed PCM based ones; in terms of delay and energy consumption. With PCM consuming 2 orders of magnitude more energy during programming and reading. PCM also required 10 times the programming delay. However, PCM crossbars offered higher switching resistance range i.e. 170kΩ compared to the 20kΩ offered by memristors; which support PCM multibit storage capability and higher density.
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14

Carria, Egidio. "Amorphous-Crystal Phase Transitions in Ge2Sb2Te5 and GexTe1-x alloys". Doctoral thesis, Università di Catania, 2012. http://hdl.handle.net/10761/933.

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Aim of this work was the investigation of the phase transitions in Ge2Sb2Te5 and GexTe1-x thin films. These alloys are of interest since they exhibit an excellent combination of electrical-optical and phase changing characteristics for memory applications. In particular we have focused our attention on the amorphous-crystal transition. We have then discussed the correlation between the local order in the amorphous network and the crystallization kinetics. To this aim we have modified the properties of the amorphous phase by laser and ion irradiation looking to the consequent variation in the phase transition speed.
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15

Barclay, Martin Jared. "Electrical switching properties of ternary and layered chalcogenide phase-change memory devices". [Boise, Idaho] : Boise State University, 2009. http://scholarworks.boisestate.edu/td/67/.

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16

Wang, Lei. "A study of terabit per square inch scanning probe phase change memory". Thesis, University of Exeter, 2009. http://hdl.handle.net/10036/87279.

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Scanning electrical probe-based storage using phase change materials is considered as a promising data storage technology due to its potential to meet future needs for ultra-high areal density, low-power, non-volatility, and rewritability. It is therefore important to understand and model the write, read and erase processes of this new technology, so that likely performance limits can be predicted and recording media and recording systems designed. Thus, this thesis presents a theoretical framework and associated computational model for write, read, and erase processes in electrical probe storage on phase change materials (Ge2Sb2Te5). Investigations of the write performance in this thesis are mainly focused on writing crystalline bits in an amorphous background, which is investigated using a parametric approach to assess the role of the electrical, thermal, and thickness properties of the media stack and probe tip on the size and shape of recorded bits, and on the write voltage and power required. In addition, advanced modeling techniques including heterogeneous nucleation, threshold switching, contact resistance and surface roughness are also introduced into the writing simulation in order to mimic more closely a practical recording environment. Based on these investigations, the design of an optimal media stack is proposed, which comprises a thin Ge2Sb2Te5 layer sandwiched by a thin capping layer with fairly high electrical conductivity and low thermal conductivity and a thick underlayer with a high electrical conductivity and fairly low thermal conductivity. Readout performance is evaluated in this thesis by extending the previous 2-D model to 3D, aiming to pursue a realistic read current and understand effects of the noise on the read process. It is found that isolated crystalline bits extending through the amorphous matrix exhibits a better reading contrast than either crystalline bits embedded in the amorphous matrix or amorphous bits on top portion of the crystalline matrix. Isolated amorphous bits on the crystalline matrix give the narrowest read pulse width, the largest peak-peak readout signal, and the least noise effect, but the writing of amorphous bits is difficult due to the high field and temperature in the capping/underlayer. This thesis also investigated the erasure of both crystalline bits and amorphous bits in a scanning probe phase change memory. The amorphous bit in a crystalline matrix can be easily erased (re-crystallized), but the erasing of crystalline bits in an amorphous matrix is problematic and always accompanied by the formation of an unwanted crystalline ‘ring’ surrounding the originally recorded bit. Two novel approaches, i.e. patterned Ge2Sb2Te5 media in an SiO2 matrix and slow ‘growth’ material are proposed in order to overcome such a ‘ring’ effect. It was found that patterned Ge2Sb2Te5 media can entirely remove the ‘ring’, but the thermal conductivity of the capping/underlayer needs to be chosen carefully to avoid high temperature appearing in these two layers. The fabrication of such patterned media on the nanoscale dimensions needed for ultra-high density storage is however problematic. The use of ‘slow-growth’ material improves the erase performance of continuous (i.e. unpatterned) Ge2Sb2Te5 films, but without a complete removal of the ‘ring’. Finally, using the optimized design of media stack and a suitable probe tip the feasibility of writing and reading at an areal density of 10Tbit/inch2 has been demonstrated, with a much lower power/energy (1.08pJ/bit) than in any previous work.
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17

Simões, Patrício Manuel Vieira. "The influence of phase change on learning and memory in desert locusts". Thesis, University of Cambridge, 2012. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.610895.

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18

Hosseini, Peiman. "Phase-change and carbon based materials for advanced memory and computing devices". Thesis, University of Exeter, 2013. http://hdl.handle.net/10871/10122.

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The aggressive scaling of CMOS technology, to reduce device size while also increasing device performance, has reached a point where continuing improvement is becoming increasingly problematic and alternative routes for the development of future memory and processing devices may be necessary; in this thesis the use of phase-change and carbon based materials as one such alternative route is investigated. As pointed out by Ovshinsky [1, 2] some phase-change material should be capable of non-binary arithmetic processing, multi-value logic and biological (neuromorphic) type processing. In this thesis, generic, nanometre-sized, phase-change pseudodevices were fabricated and utilised to perform various types of computational operations for the first time, including addition, subtraction, division, parallel factorization and logic using a novel resistive switching accumulator-type regime in the electrical domain. The same accumulator response is also shown to provide an electronic mimic of an integrate-and-fire type neuron. The accumulator-type regime uses fast electrical pulses to gradually crystallize a phase-change device in a finite number of steps and does not require a multilevel detection scheme. The phase-change materials used in this study were protected by a capping layer of sputtered amorphous carbon. It was found that this amorphous carbon layer also underwent a form of resistive switching when subjected to electrical pulses. In particular, sputtered amorphous carbon layers were found to switch from an initially high resistivity state to a low resistivity state when a voltage pulse was locally applied using a Conductive Atomic Force Microscope (CAFM) tip. Further experiments on amorphous carbon vertical pseudo-devices and lithographically defined planar devices showed that it has potential as a new material for Resistive Random Access Memory (ReRam) applications. The switching mechanism was identified as clustering of the sp2 hybridized carbon sites induced by Joule heating. It was not possible to reset the devices back to their initial high resistivity state presumably due to the highly conductive nature of sputtered amorphous carbon.
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19

Balasubramanian, Mahesh. "Phase change memory : array development and sensing circuits using delta-sigma modulation /". [Boise, Idaho] : Boise State University, 2009. http://scholarworks.boisestate.edu/td/44/.

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20

Lu, Chih-Yuan. "Group III-selenides : new silicon compatible semiconducting materials for phase change memory applications /". Thesis, Connect to this title online; UW restricted, 2007. http://hdl.handle.net/1773/10610.

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21

Li, Jiayin. "ENERGY-AWARE OPTIMIZATION FOR EMBEDDED SYSTEMS WITH CHIP MULTIPROCESSOR AND PHASE-CHANGE MEMORY". UKnowledge, 2012. http://uknowledge.uky.edu/ece_etds/7.

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Over the last two decades, functions of the embedded systems have evolved from simple real-time control and monitoring to more complicated services. Embedded systems equipped with powerful chips can provide the performance that computationally demanding information processing applications need. However, due to the power issue, the easy way to gain increasing performance by scaling up chip frequencies is no longer feasible. Recently, low-power architecture designs have been the main trend in embedded system designs. In this dissertation, we present our approaches to attack the energy-related issues in embedded system designs, such as thermal issues in the 3D chip multiprocessor (CMP), the endurance issue in the phase-change memory(PCM), the battery issue in the embedded system designs, the impact of inaccurate information in embedded system, and the cloud computing to move the workload to remote cloud computing facilities. We propose a real-time constrained task scheduling method to reduce peak temperature on a 3D CMP, including an online 3D CMP temperature prediction model and a set of algorithm for scheduling tasks to different cores in order to minimize the peak temperature on chip. To address the challenging issues in applying PCM in embedded systems, we propose a PCM main memory optimization mechanism through the utilization of the scratch pad memory (SPM). Furthermore, we propose an MLC/SLC configuration optimization algorithm to enhance the efficiency of the hybrid DRAM + PCM memory. We also propose an energy-aware task scheduling algorithm for parallel computing in mobile systems powered by batteries. When scheduling tasks in embedded systems, we make the scheduling decisions based on information, such as estimated execution time of tasks. Therefore, we design an evaluation method for impacts of inaccurate information on the resource allocation in embedded systems. Finally, in order to move workload from embedded systems to remote cloud computing facility, we present a resource optimization mechanism in heterogeneous federated multi-cloud systems. And we also propose two online dynamic algorithms for resource allocation and task scheduling. We consider the resource contention in the task scheduling.
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22

Saleh, Subaie Jaffar. "High-throughput synthesis and screening of chalcogenide thin films for phase-change memory". Thesis, University of Southampton, 2017. https://eprints.soton.ac.uk/417809/.

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The limitations of Flash memory as an electronic storage medium have driven the development of newtechnologies. Amongst these, Phase-Change Random Access Memory (PCRAM) has emerged as a viable replacement for Flash due to its greater number of write cycles and faster write speeds. However, while phase-change materials have been known for over 50 years interest has only picked up over the past decade. This has created a gap in understanding of the structural and functional properties of these materials, which is only now being addressed one material at a time. The research presented here introduces a high-throughput (HT), combinatorial approach to the synthesis and screening of phase-change chalcogenide glasses. This approach focused on the screening of properties relevant to the use of chalcogenides as potential PCRAM materials. Starting with the seminal Ge:Sb:Te system, a HT workflow was developed that utilised Raman spectroscopy and X-ray diffraction to study the structure of both its amorphous and crystalline phases. The crystallisation temperature and electrical resistivity were chosen as pertinent functional properties to be evaluated under this approach. Using HT physical vapour deposition, thin film libraries of the largest reported Ge:Sb:Te compositional space were synthesised, covering the majority of the ternary space. HT software tools enabled the analysis of the film’s structural evolution before and after crystallisation, revealing the formation of 5 distinct phases after annealing at 200 ◦C. These tools also facilitated the analysis of functional properties along six pseudobinary lines, four of which are novel to the literature. Specifically, the GeTe–Sb and GeSb–Te lines were most useful towards understanding the relationship between the structure and function in the Ge:Sb:Te system. The HT approach was applied to the less studied N-doped Ge:Sb:Te system, for which the most extensive compositional space yet was also synthesised. After annealing at 300 ◦C two types of materials, related to N-Sb2Te3 and N-Ge2Sb2Te5, were identified through the first systematic Raman and XRD analyses of this system. Their functional properties were studied along pseudobinary lines and the results contrasted to those of Ge:Sb:Te. This led to the conclusion that N-Ge:Sb:Te materials would be more suitable for PCRAM use than Ge:Sb:Te in high temperature applications. A novel parametric testing platform, the Integrated Microelectrode Testing System (IMTS), was developed in order to characterise the electrical threshold switching field of both Ge:Sb:Te and N-Ge:Sb:Te materials, resulting in the first systematic analysis of this parameter on both systems. In the process, a model to calculate the dielectric constant of Ge2Sb2Te5 using I-V data from the IMTS was derived. Overall, the results of these experiments established the validity of the high-throughput approach as a means to produce and evaluate phase-change chalcogenides more quickly and as reliably as traditional materials research techniques.
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23

Nguyen, Huu tan. "Thermal Characterization of In-Sb-Te thin films for Phase Change Memory Application". Thesis, Bordeaux, 2015. http://www.theses.fr/2015BORD0112/document.

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Les matériaux à changement de phase (PCM) sont utilisés pour la réalisation de mémoire non volatile. Ces matériaux possèdent la particularité de passer d’un état cristallin à un état amorphe à l’aide d’une impulsion de chaleur, créant ainsi un processus propre au stockage de l’information. Les PCMs sont généralement basés sur des composés ternaires de type Ge-Sb-Te (GST) avec une température de transition de l’ordre de 125°C, rendent ces matériaux inutilisable dans le domaine de l’automobile et pour des applications militaires. Pour contourner cette limitation, le GST est remplacé par le composé In-Sb-Te (IST) possèdent une température de transition plus élevé et un temps de transition beaucoup plus rapide (nanoseconde). Les propriétés thermiques de l’IST et de ses interfaces au sein de la cellule PCM peuvent influencer la température de transition. C’est pourquoi la mesure de la conductivité thermique nous donnera une estimation de la valeur de cette transition.Différentes techniques ont été misent en oeuvre pour mesurer la conductivité thermique des couches minces d’IST en fonction de la concentration en Te, à savoir ; la radiométrie photo-thermique modulée (MPTR) et la méthode 3ω dans une gamme de température allant de l’ambiant jusqu'à 550°C.Les résultats obtenus par les deux techniques de caractérisation thermiques démontrent que la conductivité thermique de l'IST diminue lorsque l'on augmente la teneur en Te. L'augmentation de la teneur en Te pourrait donc conduire à un alliage thermiquement plus résistif, qui est censé apporter l'avantage d'un flux de chaleur plus confiné et limiter la cross-talk thermique dans le dispositif de mémoire à changement de phase
Phase change memories (PCM) are typically based on compounds of the Ge-Sb-Te (GST) ternary system. Nevertheless, a major drawback of PCM devices is the failure to fulfill automotive-level or military-grade requirements (125°C continuous operation), due to the low crystallization temperature of GST. To overcome this limitation, alloys belonging to the In-Sb-Te (IST) system have been proposed, which have demonstrated high crystallization temperature, and fast switching. Thermal properties of the chalcogenide alloy and of its interfaces within the PCM cell can influence the programming current, reliability and optimized scaling of PCM devices. The two methods, namely: 3ω and Modulated Photothermal Radiometry (MPTR) technique was implemented to measure the thermal conductivity of IST thin films as well as the thermal boundary resistance at the interface with other surrounding materials (a metal and a dielectric). The experiment was carried outin situ from room temperature up to 550oC in order to investigate the intrinsic thermal properties at different temperatures and the significant structural rearrangement upon the phase transition.The results obtained from the two thermal characterization techniques demonstrate that the thermal conductivity of IST decreases when increasing the Te content. Increasing the Te content could thus lead to a more thermally resistive alloy, which is expected to bring the advantage of a more confined heat flow and limiting the thermal cross-talk in the phase change memory device
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24

NGUYEN, HUU TAN. "Thermal Characterization of In-Sb-Te thin films for phase change memory application". Doctoral thesis, Università degli Studi di Milano-Bicocca, 2015. http://hdl.handle.net/10281/98985.

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The aim of the present work is to measure the thermal conductivity of In-Sb-Te alloy (IST) with a varying quantity of Te. The material is deposited as a thin film using the Metal-Organic Chemical Vapour Deposition (MOCVD) technique. Changing slightly the deposition parameters leads to achieve the Te variation within the alloy. We measured also the thermal boundary resistances at the interfaces between the IST layer with dielectric (SiO2, Al2O3) and metallic (Pt) layers. The measurement of the thermal conductivity and TBR is performed in a broad temperature range from room temperature (RT) up to 550°C in order to have the phase change occurring at the expected temperature and to obverse related variations of the measured quantities.
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25

SELMO, SIMONE. "Functional analysis of In-based nanowires for low power phase change memory applications". Doctoral thesis, Università degli Studi di Milano-Bicocca, 2017. http://hdl.handle.net/10281/153247.

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Phase change memories (PCMs), based on chalcogenide alloys (mainly Ge2Sb2Te5), are the most promising candidate for the realization of “Storage Class Memories”, which would fill the gap between ‘‘operation’’ and ‘‘storage’’ memories. PCMs are also one of the few currently available technologies for the implementation of nanoeletronic synapses in high density neuromorphic systems. The main improvements needed in order to exploit the full potential of PCMs in these innovative applications are the reduction of the programming currents and power consumption, and further cell downscaling. Thanks to their nano-sized active volume to be programmed and self-heating behavior, phase change nanowires (NWs) are expected to exhibit improved memory performances with respected to commonly used thin-film/heater-based structures. The Ph. D. Thesis of the candidate reports the study of the phase change properties of ultra-thin In-based NWs for low power consuming PCMs, exploring the more promising features of this class of materials with respect to the commonly considered Ge-Sb-Te alloys. In particular, the self-assembly of In-Sb-Te, In-doped Sb and In-Ge-Te NWs was successfully achieved by Metal Organic Chemical Vapour Deposition (MOCVD), coupled to vapour-liquid-solid mechanism, catalysed by catalyst nanoparticles. The parameters influencing the NW self-assembly were studied and the compositional, morphological and structural analysis of the grown structures was performed. In all cases, NWs of several μm in length and with diameters as small as 15 nm were obtained. The experimental contribution of the Ph. D. candidate to the NWs growth study was mainly related to the substrates preparation, catalyst deposition and, morphological and elemental analysis of the grown samples. Moreover, the Ph. D. candidate has performed the functional analysis of In3Sb1Te2 and In-doped Sb NW-based PCM devices. To conduct that analysis, a suitable fabrication procedure of the devices and an appropriate electrical measuring set-up have been identified. Reversible and well reproducible phase change memory switching was demonstrated for In3Sb1Te2 and In-doped Sb NW devices, showing low working parameters, such as “RESET” voltage, current and power. The obtained results support the conclusion that In-based ultra-thin NWs are potential building blocks for the realization of ultra-scaled, high performance PCM devices.
Phase change memories (PCMs), based on chalcogenide alloys (mainly Ge2Sb2Te5), are the most promising candidate for the realization of “Storage Class Memories”, which would fill the gap between ‘‘operation’’ and ‘‘storage’’ memories. PCMs are also one of the few currently available technologies for the implementation of nanoeletronic synapses in high density neuromorphic systems. The main improvements needed in order to exploit the full potential of PCMs in these innovative applications are the reduction of the programming currents and power consumption, and further cell downscaling. Thanks to their nano-sized active volume to be programmed and self-heating behavior, phase change nanowires (NWs) are expected to exhibit improved memory performances with respected to commonly used thin-film/heater-based structures. The Ph. D. Thesis of the candidate reports the study of the phase change properties of ultra-thin In-based NWs for low power consuming PCMs, exploring the more promising features of this class of materials with respect to the commonly considered Ge-Sb-Te alloys. In particular, the self-assembly of In-Sb-Te, In-doped Sb and In-Ge-Te NWs was successfully achieved by Metal Organic Chemical Vapour Deposition (MOCVD), coupled to vapour-liquid-solid mechanism, catalysed by catalyst nanoparticles. The parameters influencing the NW self-assembly were studied and the compositional, morphological and structural analysis of the grown structures was performed. In all cases, NWs of several μm in length and with diameters as small as 15 nm were obtained. The experimental contribution of the Ph. D. candidate to the NWs growth study was mainly related to the substrates preparation, catalyst deposition and, morphological and elemental analysis of the grown samples. Moreover, the Ph. D. candidate has performed the functional analysis of In3Sb1Te2 and In-doped Sb NW-based PCM devices. To conduct that analysis, a suitable fabrication procedure of the devices and an appropriate electrical measuring set-up have been identified. Reversible and well reproducible phase change memory switching was demonstrated for In3Sb1Te2 and In-doped Sb NW devices, showing low working parameters, such as “RESET” voltage, current and power. The obtained results support the conclusion that In-based ultra-thin NWs are potential building blocks for the realization of ultra-scaled, high performance PCM devices.
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26

ABOU, EL KHEIR OMAR. "Atomistic simulations of Ge-rich GeSbTe alloys for phase change memories". Doctoral thesis, Università degli Studi di Milano-Bicocca, 2023. https://hdl.handle.net/10281/403657.

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Prototypical phase change compounds, typically based on GeSbTe (GST) alloys, display a crystallization temperature not suitable for embedded Phase Change Memories (ePCM) of interest for applications in the automotive sector. The search for an alternative material is thus a very active research field. Ge-rich GST alloys are emerging as promising materials for ePCM thanks to the higher thermal stability of their amorphous phase. Upon crystallization, Ge-rich GST alloys undergo a phase separation into Ge and other GST alloys. The segregation phenomena enhance the crystallization temperature (Tx), but it comes also with several drawbacks such as a high cell-to-cell variability and a drift of the electrical resistance with time in the set state. The details regarding the decomposition process are largely unknown and are a matter of debate. During my PhD studies, I investigated the phase separation by means of high-throughput Density Functional theory (DFT) calculations based on thermodynamical analysis. We computed the formation free energy of all GST alloys in the central part of the ternary phase diagram modelled in the rocksalt metastable phase, which is the phase relevant to the operation of the memory. Then, we computed all possible decomposition reactions for each GST alloy. We summarized all our thermochemical data in one descriptor called "decomposition propensity", which measures the tendency of an alloy to undergo phase separation. I also studied the structural properties of the amorphous phase of Ge-rich GST alloys as a function of the Ge content. We found that by increasing the Ge content the local structure of the amorphous phase becomes more and more dissimilar from the crystalline phase which might hinder the crystallization kinetic. These results suggest a possible strategy to minimize the phase separation (low decomposition propensity) and still keep high Tx (crystallization might be hindered due to the dissimilarity). Aside the thermodynamic analysis discussed above, we should however address kinetics effects that could be modelled for instance by molecular dynamics (MD) simulations. To this end, one should enlarge the scope of DFT framework by developing a Neural Network interatomic potential (NNIP) by fitting a large DFT database. This scheme allows to perform large-scale simulations with a close to DFT accuracy and the speed of classical force fields. As a first step towards the generation of NNIP for Ge-rich GST alloys, we developed a NNIP for Ge2Sb2Te5 compound (the prototypical GST compound) which was used to directly simulate the crystallization process by MD.
Prototypical phase change compounds, typically based on GeSbTe (GST) alloys, display a crystallization temperature not suitable for embedded Phase Change Memories (ePCM) of interest for applications in the automotive sector. The search for an alternative material is thus a very active research field. Ge-rich GST alloys are emerging as promising materials for ePCM thanks to the higher thermal stability of their amorphous phase. Upon crystallization, Ge-rich GST alloys undergo a phase separation into Ge and other GST alloys. The segregation phenomena enhance the crystallization temperature (Tx), but it comes also with several drawbacks such as a high cell-to-cell variability and a drift of the electrical resistance with time in the set state. The details regarding the decomposition process are largely unknown and are a matter of debate. During my PhD studies, I investigated the phase separation by means of high-throughput Density Functional theory (DFT) calculations based on thermodynamical analysis. We computed the formation free energy of all GST alloys in the central part of the ternary phase diagram modelled in the rocksalt metastable phase, which is the phase relevant to the operation of the memory. Then, we computed all possible decomposition reactions for each GST alloy. We summarized all our thermochemical data in one descriptor called "decomposition propensity", which measures the tendency of an alloy to undergo phase separation. I also studied the structural properties of the amorphous phase of Ge-rich GST alloys as a function of the Ge content. We found that by increasing the Ge content the local structure of the amorphous phase becomes more and more dissimilar from the crystalline phase which might hinder the crystallization kinetic. These results suggest a possible strategy to minimize the phase separation (low decomposition propensity) and still keep high Tx (crystallization might be hindered due to the dissimilarity). Aside the thermodynamic analysis discussed above, we should however address kinetics effects that could be modelled for instance by molecular dynamics (MD) simulations. To this end, one should enlarge the scope of DFT framework by developing a Neural Network interatomic potential (NNIP) by fitting a large DFT database. This scheme allows to perform large-scale simulations with a close to DFT accuracy and the speed of classical force fields. As a first step towards the generation of NNIP for Ge-rich GST alloys, we developed a NNIP for Ge2Sb2Te5 compound (the prototypical GST compound) which was used to directly simulate the crystallization process by MD.
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27

Rausch, Pascal [Verfasser]. "Investigations of binary and ternary phase change alloys for future memory applications / Pascal Rausch". Aachen : Hochschulbibliothek der Rheinisch-Westfälischen Technischen Hochschule Aachen, 2013. http://d-nb.info/1036240533/34.

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28

Skelton, Jonathan Michael. "Exploring computational modelling for the study of phase-change materials for digital-memory applications". Thesis, University of Cambridge, 2013. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.648375.

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29

Hayat, Hasan. "A study of the scaling and advanced functionality potential of phase change memory devices". Thesis, University of Exeter, 2016. http://hdl.handle.net/10871/26596.

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As traditional volatile and non-volatile data storage and memory technologies such as SRAM, DRAM, Flash and HDD face fundamental scaling challenges, scientists and engineers are forced to search for and develop alternative technologies for future electronic and computing systems that are relatively free from scaling issues, have lower power consumptions, higher storage densities, faster speeds, and can be easily integrated on-chip with microprocessor cores. This thesis focuses on the scaling and advanced functionality potential of one such memory technology i.e. Phase Change Memory (PCM), which is a leading contender to complement or even replace the above mentioned traditional technologies. In the first part of the thesis, a physically-realistic Multiphysics Cellular Automata PCM device modelling approach was used to study the scaling potential of conventional and commercially-viable PCM devices. It was demonstrated that mushroom-type and patterned probe PCM devices can indeed be scaled down to ultrasmall (single-nanometer) dimensions, and in doing so, ultralow programming currents (sub-20 μA) and ultrahigh storage densities (~10 Tb/in2) can be achieved via such a scaling process. Our sophisticated modelling approach also provided a detailed insight into some key PCM device characteristics, such as amorphization (Reset) and crystallization (Set) kinetics, thermal confinement, and the important resistance window i.e. difference in resistances between the Reset and Set states. In the second part of the thesis, the aforementioned modelling approach was used to assess the feasibility of some advanced functionalities of PCM devices, such as neuromorphic computing and phase change metadevices. It was demonstrated that by utilizing the accumulation mode of operation inherent to phase change materials, we can combine a physical PCM device with an external comparator-type circuit to deliver a ‘self-resetting spiking phase change neuron’, which when combined with phase change synapses can potentially open a new route for the realization of all-phase change neuromorphic computers. It was further shown that it is indeed feasible to design and ‘electrically’ switch practicable phase change metadevices (for absorber and modulator applications, and suited to operation in the technologically important near-infrared range of the spectrum). Finally, it was demonstrated that the Gillespie Cellular Automata (GCA) phase change model is capable of exhibiting ‘non-Arrhenius kinetics of crystallization’, which were found to be in good agreement with reported experimental studies.
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30

Vázquez, Diosdado Jorge Alberto. "A cellular automata approach for the simulation and development of advanced phase change memory devices". Thesis, University of Exeter, 2012. http://hdl.handle.net/10036/4141.

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Phase change devices in both optical and electrical formats have been subject of intense research since their discovery by Ovshinsky in the early 1960’s. They have revolutionized the technology of optical data storage and have very recently been adopted for non-volatile semiconductor memories. Their great success relies on their remarkable properties enabling high-speed, low power consumption and stable retention. Nevertheless, their full potential is still yet to be realized. Operations in electrical phase change devices rely on the large resistivity contrast between the crystalline (low resistance) and amorphous (high resistance) structures. The underlying mechanisms of phase transformations and the relation between structural and electrical properties in phase change materials are quite complex and need to be understood more deeply. For this purpose, we compare different approaches to mathematical modelling that have been suggested to realistically simulate the crystallization and amorphization of phase change materials. In this thesis the recently introduced Gillespie Cellular Automata (GCA) approach is used to obtain direct simulation of the structural phases and the electrical states of phase change materials and devices. The GCA approach is a powerful technique to understand the nanostructure evolution during the crystallization (SET) and amorphization (RESET) processes in phase change devices over very wide length scales. Using this approach, a detailed study of the electrical properties and nanostructure dynamics during SET and RESET processes in a PCRAM cell is presented. Besides the possibility of binary storage in phase change memory devices, there is a wider and far-reaching potential for using them as the basis for new forms of arithmetic and cognitive computing. The origin of such potential lies in a previously under-explored property, namely accumulation which has the potential to implement basic arithmetic computations. We exploit and explore this accumulative property in films and devices. Furthermore, we also show that the same accumulation property can be used to mimic a simple integrate and fire neuron. Thus by combining both a phase change cell operating in the accumulative regime for the neural body and a phase change cell in the multilevel regime for the synaptic weighting an artificial neuromorphic system can be obtained. This may open a new route for the realization of phase change based cognitive computers. This thesis also examines the relaxation oscillations observed under suitable bias conditions in phase change devices. The results presented are performed through a circuit analysis in addition with a generation and recombination mechanism driven by the electric field and carrier densities. To correctly model the oscillations we show that it is necessary to include a parasitic inductance. Related to the electrical states of phase change materials and devices is the threshold switching of the amorphous phase at high electric fields and recent work has suggested that such threshold switching is the result of field-induced nucleation. An electric field induced nucleation mechanism is incorporated into the GCA approach by adding electric field dependence to the free energy of the system. Using results for a continuous phase change thin films and PCRAM devices we show that a purely electronic explanation of threshold switching, rather than field-induced nucleation, provides threshold fields closer to experimentally measured values.
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31

Balasubramanian, Sanchayeni. "Improving Hard Disk Drive Write IO Performance with Phase Change Memory as a Buffer Cache". University of Cincinnati / OhioLINK, 2017. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1511881125562903.

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32

Betti, Beneventi Giovanni. "Characterization and modeling of phase-change memories". Thesis, Grenoble, 2011. http://www.theses.fr/2011GRENT089/document.

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La thèse de Giovanni BETTI BENEVENTI portes sur la caractérisation électrique et la modélisationphysique de dispositifs de mémoire non-volatile à changement de phase. Cette thèse a été effectuée dans le cadre d’une cotutelle avec l’Università degli Studi di Modena e Reggio Emilia (Italie).Le manuscrit en anglais comporte quatre chapitres précédés d’une introduction et terminés par uneconclusion générale.Le premier chapitre présent un résumé concernant l’état de l’art des mémoires a changement de phase. Le deuxième chapitre est consacré aux résultats de caractérisation matériau et électrique obtenus sur déposition blanket et dispositifs de mémoire à changement de phase (PCM) basées sur le nouveau matériau GeTe dopé carbone (GeTeC).Le chapitre trois s’intéresse à l’implémentation et à la caractérisation expérimentale d’un setup demesure de bruit a basse fréquence sur dispositifs électroniques a deux terminaux développé auxlaboratoires de l’Università degli Studi di Modena e Reggio Emilia en Italie.Enfin, dans le dernier chapitre est présentée une analyse rigoureuse de l’effet d’auto-chauffage Joulesur la caractéristique I-V des mémoires a changement de phase intégrant le matériau dans la phase polycristalline
Within this Ph.D. thesis work new topics in the field of Non-Volatile Memories technologies have been investigated, with special emphasis on the study of novel materials to be integrated in Phase-Change Memory (PCM) devices, namely:(a) Investigation of new phase-change materialsWe have fabricated PCM devices integrating a novel chalcogenide material: Carbon-doped GeTe (or simply, GeTeC). We have shown that C doping leads to very good data retention performances: PCM cells integrating GeTeC10% can guarantee a 10 years fail temperature of about 127°C, compared to the 85°C of GST. Furthermore, C doping reduces also fail time dispersion. Then our analysis has pointed out the reduction of both RESET current and power for increasing carbon content. In particular, GeTeC10% PCM devices yield about a 30% of RESET current reduction in comparison to GST and GeTe ones, corresponding to about 50% of RESET energy decrease.Then, resistance window and programming time of GeTeC devices are comparable to those of GST.(b) Advanced electrical characterization techniquesWe have implemented, characterized and modeled a measurement setup for low-frequency noise characterization on two-terminal semiconductor devices.(c) Modeling for comprehension of physical phenomenaWe have studied the impact of Self-induced Joule-Heating (SJH) effect on the I-V characteristics of fcc polycrystalline-GST-based PCM cells in the memory readout region. The investigation has been carried out by means of electrical characterization and electro-thermal simulations
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33

Bornhöfft, Manuel [Verfasser], Joachim [Akademischer Betreuer] Mayer y Matthias [Akademischer Betreuer] Wuttig. "TEM/STEM investigations of phase change materials for non-volatile memory applications / Manuel Bornhöfft ; Joachim Mayer, Matthias Wuttig". Aachen : Universitätsbibliothek der RWTH Aachen, 2017. http://d-nb.info/1162498234/34.

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34

Simon, Mark Alexander. "Second Phase Filamentation and Bulk Conduction in Amorphous Thin Films". University of Toledo / OhioLINK, 2011. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1302207950.

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35

Garbin, Daniele. "Etude de la variabilité des technologies PCM et OxRAM pour leur utilisation en tant que synapses dans les systèmes neuromorphiques". Thesis, Université Grenoble Alpes (ComUE), 2015. http://www.theses.fr/2015GREAT133/document.

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Le cerveau humain est composé d’un grand nombre de réseaux neuraux interconnectés, dont les neurones et les synapses en sont les briques constitutives. Caractérisé par une faible consommation de puissance, de quelques Watts seulement, le cerveau humain est capable d’accomplir des tâches qui sont inaccessibles aux systèmes de calcul actuels, basés sur une architecture de type Von Neumann. La conception de systèmes neuromorphiques vise à réaliser une nouvelle génération de systèmes de calcul qui ne soit pas de type Von Neumann. L’utilisation de mémoire non-volatile innovantes en tant que synapses artificielles, pour application aux systèmes neuromorphiques, est donc étudiée dans cette thèse. Deux types de technologies de mémoires sont examinés : les mémoires à changement de phase (Phase-Change Memory, PCM) et les mémoires résistives à base d’oxyde (Oxide-based resistive Random Access Memory, OxRAM). L’utilisation des dispositifs PCM en tant que synapses de type binaire et probabiliste est étudiée pour l’extraction de motifs visuels complexes, en évaluant l’impact des conditions de programmation sur la consommation de puissance au niveau du système. Une nouvelle stratégie de programmation, qui permet de réduire l’impact du problème de la dérive de la résistance des dispositifs PCM est ensuite proposée. Il est démontré qu’en utilisant des dispositifs de tailles réduites, il est possible de diminuer la consommation énergétique du système. La variabilité des dispositifs OxRAM est ensuite évaluée expérimentalement par caractérisation électrique, en utilisant des méthodes statistiques, à la fois sur des dispositifs isolés et dans une matrice complète de mémoire. Un modèle qui permets de reproduire la variabilité depuis le niveau faiblement résistif jusqu’au niveau hautement résistif est ainsi développé. Une architecture de réseau de neurones de type convolutionnel est ensuite proposée sur la base de ces travaux éxperimentaux. La tolérance du circuit neuromorphique à la variabilité des OxRAM est enfin démontrée grâce à des tâches de reconnaissance de motifs visuels complexes, comme par exemple des caractères manuscrits ou des panneaux de signalisations routières
The human brain is made of a large number of interconnected neural networks which are composed of neurons and synapses. With a low power consumption of only few Watts, the human brain is able to perform computational tasks that are out of reach for today’s computers, which are based on the Von Neumann architecture. Neuromorphic hardware design, taking inspiration from the human brain, aims to implement the next generation, non-Von Neumann computing systems. In this thesis, emerging non-volatile memory devices, specifically Phase-Change Memory (PCM) and Oxide-based resistive memory (OxRAM) devices, are studied as artificial synapses in neuromorphic systems. The use of PCM devices as binary probabilistic synapses is studied for complex visual pattern extraction applications, evaluating the impact of the PCM programming conditions on the system-level power consumption.A programming strategy is proposed to mitigate the impact of PCM resistance drift. It is shown that, using scaled devices, it is possible to reduce the synaptic power consumption. The OxRAM resistance variability is evaluated experimentally through electrical characterization, gathering statistics on both single memory cells and at array level. A model that allows to reproduce OxRAM variability from low to high resistance state is developed. An OxRAM-based convolutional neural network architecture is then proposed on the basis of this experimental work. By implementing the computation of convolution directly in memory, the Von Neumann bottleneck is avoided. Robustness to OxRAM variability is demonstrated with complex visual pattern recognition tasks such as handwritten characters and traffic signs recognition
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36

Wrachien, Nicola. "ADVANCED MEMORIES TO OVERCOME THE FLASH MEMORY WEAKNESSES: A RADIATION VIEWPOINT RELIABILITY STUDY". Doctoral thesis, Università degli studi di Padova, 2010. http://hdl.handle.net/11577/3426884.

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Currently the large majority of commercial Flash memories are based on the floating gate MOSFET. Over the last years, the continuous scaling of nonvolatile memories has pushed the Flash technology toward its limits, which affect both the functionality and the reliability of the memory cell. Several alternatives are currently being explored as possible replacements for floating gate memories (FGM). On one hand there are the ferroelectric memories, the phase change memories, and the magnetoresistive memories, which follow a completely new approach, integrating new materials, such as ferroelectrics, chalcogenides, and ferromagnetics. On the other hand, several efforts are being investigated to improve the scalability and the reliability of the FGM technology, by adopting the discrete storage approach. The discrete storage concept consists in replacing the monolithic floating gate of the conventional Flash with a layer of many discrete storage nodes. NROM™, SONOS, and nanocrystal memories are some examples of this novel concept. This thesis analyzes the reliability of three types of advanced nonvolatile memories (nanocrystal, phase-change, and ferroelectric memories) from a radiation tolerance viewpoint. The main results highlight that these new memory concepts bring significant improvement over the conventional floating-gate based memories.
La maggior parte delle memorie non volatili attuali si basa sul transistor a gate flottante. Nel corso degli anni, la dimensione della cella elementare è stata sempre più ridotta per far fronte alle crescenti richieste in termini di densità di memoria. Tuttavia, il transistor a floating gate sta raggiungendo i suoi limiti fisici intrinseci e le dimensioni della cella non possono più essere facilmente ridotte a meno di non compromettere la funzionalità o l’affidabilità del dispositivo stesso. Per far fronte a questi problemi, diverse alternative sono in fase di studio. Tra di esse, si possono annoverare le memorie ferroelettriche, le memorie a cambiamento di fase, e le memorie a nanocristalli. Questi tre tipi di memorie sono oggetto di studio di questa tesi. In particolare, viene analizzata la robustezza alle radiazioni ionizzanti di questi nuovi concetti di memoria. I risultati evidenziano che le memorie non volatili avanzate portano significativi miglioramenti in termini di tolleranza alle radiazioni ionizzanti.
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37

Xu, Min. "Study of the Crystallization Dynamics and Threshold Voltage of Phase Change Materials for Use in Reconfigurable RF Switches and Non-volatile Memories". Research Showcase @ CMU, 2017. http://repository.cmu.edu/dissertations/803.

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Chalcogenide phase change (PC) materials can be reversibly transformed between the high resistivity (~ 1 Ω∙m) amorphous state (OFF-state) and low resistivity (~ 10-6 Ω∙m) crystalline state (ON-state) thermally, both are stable at the room temperature. This makes them well suited as reconfigurable RF switches and non-volatile memories. This work will present the understandings of two key characteristics of PC materials, the crystallization dynamics and the threshold voltage (Vth), as they determine performance limitations in these applications. Crystallization dynamics describe the correlations of the states, temperature and time; the Vth is the trigger of the threshold switching which leads to the “break down” of PC materials from OFF-state to ON-state. The four-terminal indirectly-heated RF switches with high cut-off frequency (> 5 THz) has advantages over other technologies but its programming power (~ 1.5 W) is yet to be reduced. Measuring the maximum allowed RESET quench time in the crystallization dynamics is critical for designing low power switches. As a major contribution, this work provides a universal methodology for accurate heater thermometry and in-situ crystallization measurements for this study. On the other hand, understanding the Vth is essential for high power handling applications as it determines the maximum power that an OFF-state switch can withstand without being spontaneously turned on. This work will discuss new observations and learnings from Vth measurements including the geometry dependent Vth variations which provide insights into the threshold switching mechanism. Unlike RF switches, faster crystallization is desired for memories to improve the write speed. The non-Arrhenius crystallization needs to be explored to achieve short crystallization time (< 10 ns) at high temperature (> 700 K). As another major contribution, this work will present a nano-scale (~ 100 nm) high-speed (thermal time constant < 5 ns) PC device for assessing the crystallization time in this regime, and provide a comprehensive learning for the crystallization dynamics from 300 K to 1000 K by developing a unified framework based on the fragility model and growth-dominated crystallization. This can be used to accurately simulate the crystallization process for any device geometry and estimate the RF switches power and Vth.
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38

Cappella, Andrea. "Caractérisation thermique à haute température de couches minces pour mémoires à changement de phase depuis l'état solide jusqu'à l'état liquide". Thesis, Bordeaux 1, 2012. http://www.theses.fr/2012BOR14500/document.

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Ces travaux de thèse portent sur la caractérisation thermique à l’échelle micrométrique d’un alliage à base de tellure lorsque ce matériau se trouve à l’état fondu, à haute température. À cette fin, une cellule innovante d’emprisonnement du matériau fondu a été conçue, et mise en place. Des structures de tellure au volume du microlitre ont été déposées sur un substrat de silicium et recouverts par la suite d’une couche de protection capable de les emprisonner dans une matrice : silice amorphe et alumine amorphe. La technique de la Radiométrie Photothermique Modulée a été utilisée pour étudier les propriétés thermiques de ce type de cellules et de ces constituants. La résistance thermique de dépôt a été ainsi estimée en utilisant un modèle d’étude des transferts de la chaleur utilisant le formalisme des impédances thermiques. Ceci nous a permit dans le cas de l’alumine amorphe de déterminer sa conductivité thermique et la résistance thermique de contact avec le substrat jusqu’à 600°C. Un long processus de conception, de mesure et d’analyse a été nécessaire afin d’obtenir une cellule capable de résister aux contraintes des hautes températures. À l’heure actuelle seule la caractérisation thermique jusqu’à 300°C a été possible à cause de l’instabilité mécanique de ce dépôt hétérogène. Ceci a été confirmé par des caractérisations physico-chimiques par techniques XRR, XRD et SEM
This thesis is devoted to the thermal characterization of molten materials, namely chalcogenide glass-type tellurium alloys, at the micrometer scale. An experimental setup of Photothermal Radiometry (PTR), formerly developed for solid state measurements, has been adapted for this purpose. Using MOCVD technique, a random lattice of sub-micrometric tellurium alloy structures is grown on a thermally oxidized silicon substrate. These structures are then embedded in a protective layer (silica or alumina) to prevent evaporation during melting. Measurements are then performed from room temperature up to 650°C. SEM and XRD measurements performed after annealing show that these samples withstand thermal stress only up to 300°C. The coating’s thermal boundary resistance is estimated by a heat transfer model based on the thermal impedance formalism. Moreover, the thermal conductivity and thermal boundary resistance of thin amorphous alumina by low temperature ALD are measured from the room temperature to 600°C
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39

Prasai, Binay K. "Theory and Experiment of Chalcogenide Materials". Ohio University / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1374002400.

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40

Green, Craig Elkton. "Composite thermal capacitors for transient thermal management of multicore microprocessors". Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/44772.

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While 3D stacked multi-processor technology offers the potential for significant computing advantages, these architectures also face the significant challenge of small, localized hotspots with very large heat fluxes due to the placement of asymmetric cores, heterogeneous devices and performance driven layouts. In this thesis, a new thermal management solution is introduced that seeks to maximize the performance of microprocessors with dynamically managed power profiles. To mitigate the non-uniformities in chip temperature profiles resulting from the dynamic power maps, solid-liquid phase change materials (PCMs) with an embedded heat spreader network are strategically positioned near localized hotspots, resulting in a large increase in the local thermal capacitance in these problematic areas. Theoretical analysis shows that the increase in local thermal capacitance results in an almost twenty-fold increase in the time that a thermally constrained core can operate before a power gating or core migration event is required. Coupled to the PCMs are solid state coolers (SSCs) that serve as a means for fast regeneration of the PCMs during the cool down periods associated with throttling events. Using this combined PCM/SSC approach allows for devices that operate with the desirable combination of low throttling frequency and large overall core duty cycles, thus maximizing computational throughput. The impact of the thermophysical properties of the PCM on the device operating characteristics has been investigated from first principles in order to better inform the PCM selection or design process. Complementary to the theoretical characterization of the proposed thermal solution, a prototype device called a "Composite Thermal Capacitor (CTC)" that monolithically integrates micro heaters, PCMs and a spreader matrix into a Si test chip was fabricated and tested to validate the efficacy of the concept. A prototype CTC was shown to increase allowable device operating times by over 7X and address heat fluxes of up to ~395 W/cm2. Various methods for regenerating the CTC have been investigated, including air, liquid, and solid state cooling, and operational duty cycles of over 60% have been demonstrated.
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41

Bayle, Raphaël. "Simulation des mécanismes de changement de phase dans des mémoires PCM avec la méthode multi-champ de phase". Thesis, Institut polytechnique de Paris, 2020. http://www.theses.fr/2020IPPAX035.

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Les mémoires à changement de phases ont basées sur la variation de résistance d’un petit volume de matériau à changement de phase, l'information binaire étant codée à travers la phase amorphe ou cristalline du matériau. Le changement de phase permettant leur programmation est induit par effet Joule sous l’application d’un courant électrique. L’alliageGe2Sb2Te5 est largement utilisé pour les mémoires à changement de phase, car il cristallise rapidement et sans changement de composition. Cependant, pour obtenir la fiabilité requise pour certaines applications à haute température, notamment dans le secteur automobile, un alliage Ge-Sb-Te enrichi en Geest utilisé par la société STMicroelectronics. La cristallisation de cet alliage s’accompagne d’une ségrégation des espèces et de la formation d’une nouvelle phase cristalline. La répartition spatiale des phases et espèces est décisive pour le bon fonctionnement du point mémoire ; il est ainsi très important de pouvoir la prédire.Les modèles de champ de phase permettent,notamment aux échelles de temps et d’espace impliquées dans l’étude des mémoires à changement de phase, le suivi d’interface entre plusieurs domaines occupés par des phases différentes. Dans ce travail de thèse, un modèle multi-champ de phase permettant de simuler l’évolution de la répartition des phases et des espèces dans ce nouvel alliage a été développé.Les paramètres du modèle ont été déterminés à partir des données disponibles sur l’alliage.Deux types de simulations ont été réalisées :d’une part, celle de la cristallisation, lors d’un recuit, d’une couche mince de matériau initialement déposé amorphe ; d’autre part, celle portant sur les changements de phase qui se produisent lors de l’application de champs de température typiques des opérations d’écriture des mémoires. La comparaison entre les résultats de simulations et expériences révèle que les caractéristiques principales des microstructures observées dans les expériences sont bien mises en évidence par le modèle
Phase change memories (PCM) exploit the variation of resistance of a small volume of phase change material: the binary information is coded through the amorphous or crystalline phase of the material. The phase change is induced by an electrical current, which heats the material by the Joule effect. Because of its fast and congruent crystallization, theGe2Sb2Te5 alloy is widely used for PCM. Nevertheless, to get a better reliability at high temperatures, which is required e.g. for automotive applications, STMicroelectronics uses a Ge-rich GeSbTe alloy. In this alloy, chemical segregation and appearance of a new crystalline phase occur during crystallization. The distribution of phases and alloy components are critical for the proper functioning of the memory cell; thus, predictive simulations would be extremely useful. Phase field models are used for tracking interfaces between areas occupied by different phases. In this work, a multi-phase field model allowing simulating the distribution of phases and species in Ge-rich GeSbTe has been developed. The parameters of the model have been determined using available data on this alloy. Two types of simulations have been carried out, firstly to describe crystallization during annealing of initially amorphous deposited thin layer; secondly to follow the evolution of phase distribution during memory operation using temperature fields that are typical for those operations. Comparisons between simulations and experiments show that they both exhibit the same features
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42

Pigot, Corentin. "Caractérisation électrique et modélisation compacte de mémoires à changement de phase". Electronic Thesis or Diss., Aix-Marseille, 2019. http://www.theses.fr/2019AIXM0185.

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La mémoire à changement de phase (ou PCM) est considérée actuellement comme la plus mature des technologies émergentes susceptibles de pallier les limitations de la mémoire Flash-NOR pour le futur des applications embarquées. Afin de permettre la conception de circuits à base de PCM, l’utilisation d’outils tels que la simulation SPICE est nécessaire, impliquant le besoin de modèles compacts de PCM. Ces modèles doivent être rapides, continus, et précis ; à ce jour aucun modèle de la littérature ne remplit l’ensemble de ces exigences.L’objectif de cette thèse est de proposer un nouveau modèle compact de PCM, permettant la conception de circuits à base de PCM. Le modèle que nous avons développé est entièrement continu, validé sur une large gamme de tension, courant, temps et température. Construit à partir de connaissances physiques sur le fonctionnement du dispositif, il utilise un emballement thermique dans le mécanisme de Poole-Frenkel pour modéliser le seuil de commutation de la phase amorphe. L’introduction d’une variable de fraction fondue, dépendante uniquement de la température, ainsi que d’une vitesse de cristallisation dépendante de la fraction amorphe, permet la bonne modélisation de l’ensemble des dynamiques temporelles de changement d’état. De plus, une méthodologie d’extraction optimisée de la carte modèle est proposée à la suite de la validation du modèle, reposant sur une étude de sensibilité des paramètres de la carte modèle et un ensemble simple de caractérisations électriques, autorisant l’adaptation du modèle à chaque variation des procédés de fabrication pour garantir l’utilité du modèle à toutes les étapes du développement des technologies PCM
Phase-change memory (PCM) is arguably the most mature emerging nonvolatile memory, foreseen for the replacement of the mainstream NOR-Flash memory for the future embedded applications. To allow the design of new PCM-based products, SPICE simulations, thus compact models, are needed. Those models need to be fast, robust and accurate; nowadays, no published model is able to fill all these requirements.The goal of this thesis is to propose a new compact model of PCM, enabling PCM-based circuit design. The model that we have developed is entirely continuous, and is validated on a wide range of voltage, current, time and temperature. Built on physical insights of the device, a thermal runaway in the Poole-Frenkel mechanism is used to model the threshold switching of the amorphous phase. Besides, the introduction of a new variable representing the melted fraction, depending only on the internal temperature, along with a crystallization speed depending on the amorphous fraction, allow the accurate modeling of all the temporal dynamics of the phase transitions. Moreover, an optimized model card extraction flow is proposed following the model validation, relying on a sensibility analysis of the model card parameters and a simple set of electrical characterizations. It enables the adjustment of the model to any process variation, and thus ensures its accuracy for the design modeling at every step of the technology development
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43

Schick, Vincent. "Caractérisation d’une mémoire à changement de phase : mesure de propriétés thermiques de couches minces à haute température". Thesis, Bordeaux 1, 2011. http://www.theses.fr/2011BOR14280/document.

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Les mémoires à changement de phase (PRAM) développées par l’industrie de la microélectronique utilisent la capacité d’un materiau chalcogénure à passer rapidement et de façon réversible d’une phase amorphe à une phase cristalline. Le passage de la phase amorphe à la phase cristalline s’accompagne d’un changement de la résistance électrique du matériau. La transition amorphe vers cristallin est obtenue par un chauffage qui porte la cellule mémoires au delà de la température de transition du verre. Le verre ternaire de chalcogène Ge2Sb2Te5 (GST-225) est probablement le matériau amené à être le plus utilisé dans la prochaine génération de dispositifs de stockage de masse. La thermoréflectométrie résolue en temps (TDTR) et la radiométrie photothermique modulée (MPTR) sont utilisées ici pour étudier les propriétés thermiques des constituants des PRAM déposés sous forme de couche mince sur des substrats de silicium. Les diffusivités thermiques et les résistances thermiques de contact des films PRAM sont estimées. Ces paramètres sont identifiés en utilisant un modèle d’étude des transferts de chaleur basé sur la loi de Fourier et utilisant le formalisme des impédances thermiques. Ces mesures ont été effectuées pour des températures allant de 25 à 400°C. Les modifications de structure et de compositions chimiques causées par les hautes températures au cours des expériences sont aussi étudiées via des analyses par les techniques de DRX, MEB, TOF-SIMS et ellipsométrie.Les propriétés thermiques des GST - 225, isolants, électrodes de chauffage et électrodes métalliques mise en œuvre dans ce type de dispositif de stockage sont ainsi mesuré a l’échelle submicrométrique
The Phase change Random Access Memories (PRAM), developed by semiconductor industry are based on rapid and reversible change from amorphous to crystalline stable phase of chalcogenide materials. The switching between the amorphous and the crystalline phase leads to change of the electrical resistance of material. The amorphous-to-crystalline transition is performed by heating the memory cell above the glass transition temperature (~130°C). The chalcogenide ternary compound glass Ge2Sb2Te5 (GST-225) is probably the candidate to become the most exploited material in the next generation of mass storage architectures. The Time Domain ThermoReflectance (TDTR) and the Modulated PhotoThermal Radiometry (MPTR) have been implemented to study the thermal properties of constituting element of PRAM deposited as thin layer (~100 nm) on silicon substrate. The thermal diffusivity and the Thermal Boundary Resistance of the PRAM film are retrieved. These parameters are identified using a model of heat transfer based on Fourier’s Law and the thermal impedance formalism. The measurements were performed in function of temperature from 25°C to 400°C. Structural and chemical changes due to the high temperature during the experimentation have been also investigated by using XRD, SEM, TOF-SIMS and ellipsometry techniques. The thermal properties of GST-225, insulator, heating and metallic electrode involved in these kind of storage devices were thus measured at a sub micrometric scale
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44

Navarro, Gabriele. "Analyse de la fiabilité de mémoires à changement de phase embarquées basées sur des matériaux innovants". Phd thesis, Université de Grenoble, 2013. http://tel.archives-ouvertes.fr/tel-01061792.

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Les Mémoires ont de plus en plus importance à l'époque actuelle, et sont fondamentales pour la définition de tous les systèmes électroniques avec lesquels nous entrons en contact dans notre vie quotidienne. Les mémoires non-volatiles (NVM), représentées par la technologie Flash, ont pu suivre jusqu'à présent l'effort à la miniaturisation pour satisfaire la demande croissante de densité de mémoire exigée par le marché. Cependant, la réduction de la taille du dispositif de mémoire est de plus en plus difficile et la complexité technologique demandé a augmenté le coût par octet. Dans ce contexte, les technologies de mémoire innovantes deviennent non seulement une alternative, mais la seule solution possible pour fournir une densité plus élevée à moindre coût, une meilleure fonctionnalité et une faible consommation d'énergie. Les Mémoires à Changement de Phase (PCM) sont considérées comme la solution de pointe pour la future génération de mémoires non-volatiles, grâce à leur non-volatilité , scalabilité, "bit-alterability", grande vitesse de lecture et d'écriture, et cyclabilité élevée. Néanmoins, certains problèmes de fiabilité restent à surmonter afin de rendre cette technologie un remplacement valable de la technologie Flash dans toutes les applications. Plus en détail, la conservation des données à haute température, est l'une des principales exigences des applications embarquées industrielles et automobiles. Cette thèse se concentre sur l'étude des mémoires à changement de phase pour des applications embarquées, dans le but d'optimiser le dispositif de mémoire et enfin de proposer des solutions pour surmonter les principaux obstacles de cette technologie, en abordant notamment les applications automobiles. Nous avons conçu, fabriqué et testé des dispositifs PCM basés sur des structures reconnues et innovantes, en analysant leurs avantages et inconvénients, et en évaluant l'impact de la réduction de la taille. Notre analyse de fiabilité a conduit au développement d'un système de caractérisation dédié à caractériser nos cellules PCM avec des impulsions de l'ordre de la nanoseconde, et à la mise en oeuvre d'un outil de simulation basé sur un solveur thermoélectrique et sur l'approche numérique "Level Set", pour comprendre les différentes mécanismes qui ont lieu dans nos cellules pendant les opérations de programmation. Afin de répondre aux spécifications du marché des mémoires non-volatiles embarquées, nous avons conçu le matériau à changement de phase intégré dans le dispositif PCM avec deux principales approches: la variation de la stoechiométrie et l'ajout de dopants. Nous avons démontré et expliqué comment la rétention des données dans les dispositifs PCM à base de GeTe peut être améliorée avec l'augmentation de la concentration de Te, et comment les inclusions de SiO2 peuvent réduire les défauts causés par la tension de lecture à températures de fonctionnement élevées. En outre, nous avons présenté les avantages sur la réduction de la puissance de programmation du dopage de carbone dans les dispositifs à base de GST. Enfin, nous avons étudié les effets de l'enrichissement en Ge dans le GST, combiné avec le dopage N et C, intégré dans des cellules PCM à l'état de l'art. Grâce à l'introduction d'une nouvelle technique de programmation, nous avons démontré la possibilité d'augmenter la vitesse de programmation de ces dispositifs, caractérisés par des performances de rétention des données parmi les meilleurs rapportés dans la littérature, et de réduire le phénomène de la dérive de la résistance qui affecte la stabilité de l'état programmé des cellules PCM. Nous avons donc prouvé, avec ces derniers résultats, la validité de la technologie PCM pour les applications embarquées.
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45

Rosen, Gregory Todd. "X-ray Absorption Fine Spectroscopy of Amorphous Selenium Nanowires". Ohio University Honors Tutorial College / OhioLINK, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=ouhonors1294448896.

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46

Gasperin, Alberto. "Advanced Non-Volatile Memories: Reliability and Ionizing Radiation Effects". Doctoral thesis, Università degli studi di Padova, 2008. http://hdl.handle.net/11577/3425599.

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Reliability study and investigation of ionizing radiation effects on advanced non-volatile memories. The memories addressed in this thesis are: nanocrystal memories, Phase Change Memories (PCM), and the Oxide-Nitride-Oxide stack. In the thesis there is also a brief description of the major interaction mechanisms between ionizing particles and electronic devices.
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47

Canvel, Yann. "Etude du procédé de gravure de l'alliage Ge-Sb-Te pour les mémoires à changement de phase". Thesis, Université Grenoble Alpes, 2020. http://www.theses.fr/2020GRALY017.

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Les mémoires ont très largement gagné en notoriété ces dernières années et sont désormais incontournables dans tous les systèmes électroniques avec lesquels nous interagissons dans la vie quotidienne. Pour pallier les limitations technologiques des mémoires traditionnelles, de nombreux acteurs industriels ont orienté leur développement vers les Mémoires à Changement de Phase (PCM). Le fonctionnement de cette technologie émergente repose principalement sur les propriétés d’un alliage chalcogénure type Ge-Sb-Te (GST). Selon la composition chimique du matériau GST, les caractéristiques de la mémoire adressent différents marchés. Il est donc impératif que le matériau GST demeure intègre au cours des étapes d’élaboration de la cellule mémoire afin de satisfaire aux performances attendues. C’est un point critique à prendre en compte dans le procédé de fabrication du composant.L’objectif de cette thèse est de comprendre les interactions matériau – environnement susceptibles de menacer la stabilité chimique du GST et de proposer des solutions pour s’opposer aux effets les plus néfastes. Dans un premier temps, nous nous sommes intéressés à l’impact de la gravure plasma sur le matériau GST par l’étude comparative de trois chimies halogènes à base de HBr, Cl2 et CF4. Grâce aux résultats complémentaires des techniques XPS, PP-TOFMS et AFM, nous avons montré que la gravure HBr permet de minimiser les modifications chimiques et morphologiques de la surface du GST. Dans un second temps, nous avons cherché à comprendre comment le matériau GST réagissait aux différents procédés intervenant après l’étape de gravure. Il a été démontré que l’exposition du GST à un environnement oxydant (plasma O2 ou air) induit une oxydation critique détériorant les propriétés de changement de phase du matériau. De plus, le traitement chimique utilisé pour nettoyer les flancs de la structure PCM élimine sélectivement l’oxyde de GST et peut, en conséquence, altérer la morphologie des cellules mémoires. Pour éviter ces effets, nous avons proposé plusieurs solutions de procédé plasma capables de préserver la composition chimique du GST au cours du procédé d’élaboration de la structure PCM. En particulier, nous avons pu tirer profit des avantages que constitue l’ajout de CH4 dans le plasma. Il contribue à créer une couche de passivation lors de la gravure du GST ou est utilisé comme précurseur d’un dépôt de protection. Le développement d’une chimie de gravure alternative en H2-N2-Ar a également été abordé et représente une perspective intéressante
Memories have gained a lot of influence through these last years and are present in all electronic systems used in our daily life. To address the limitations of the traditional memory technologies, many industries are dedicating their researches to the development of the Phase-Change Memories (PCM). This emerging technology mainly uses the properties of a Ge-Sb-Te based-chalcogenide alloy (GST). The memory characteristics may change according to the GST chemical composition. This is a critical point to carefully consider for the manufacturing process of the component. Indeed, it is crucial to preserve as much as possible the GST integrity all along the patterning steps of the memory cell in order to preserve the device performances.This thesis work aims at understanding the material – environment interactions likely to impact the GST chemical stability and propose some improvements to the processes that are detrimental for the material. Firstly, we have focused on the plasma etching effects on the GST alloy through the comparative study of three halogen chemistries, HBr, Cl2 et CF4. Thanks to the complementary results from XPS, PP-TOFMS and AFM measurements, the HBr chemistry was identified as the best etching strategy for limiting damages at the GST surface. Secondly, we have investigated the GST interactions with the different environments implemented during the subsequent fabrication processes. The GST exposition to an oxidizing environment (O2 based-plasma or air) induces a critical oxidation damaging the phase-change properties. Besides, the chemical treatment used to clean the PCM sidewalls removes selectively the GST oxide and, consequently, can modify the memory cell morphology. To prevent these effects, several plasma solutions are suggested in order to maintain the chemical stability of the GST material during the PCM patterning process. In particular, knowing the benefits of a CH4 plasma, we propose to either integrate it into a passivating etching process or to use it as a precursor promoting a protection layer. The development of an alternative etching chemistry in H2-N2-Ar has also been discussed and opens an interesting perspective
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48

Aoukar, Manuela. "Dépôt de matériaux à changement de phase par PE-MOCVD à injection liquide pulsée pour des applications mémoires PCRAM". Thesis, Université Grenoble Alpes (ComUE), 2015. http://www.theses.fr/2015GREAT075/document.

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Les mémoires résistives PCRAM sont basées sur le passage rapide et réversible entre un état amorphe hautement résistif et un état cristallin faiblement résistif d’un matériau à changement de phase (PCM). Ces mémoires constituent un des candidats les plus prometteurs pour la nouvelle génération de mémoires non-volatiles grâce à un large éventail de propriétés uniques comme une vitesse de fonctionnement élevée, une capacité de stockage multi-niveaux sur plusieurs bits, une bonne endurance et une possibilité de miniaturisation poussée. Cependant, la nécessité d’utiliser des courants d’effacement (IRESET) importants pour l’étape d’amorphisation du PCM représente l’un des principaux freins à l’explosion de la technologie PCRAM sur le marché des mémoires non volatiles. Dans ce contexte, il a été démontré que le confinement du PCM dans des structures possédant des facteurs de forme élevés permet d’améliorer l’efficacité du chauffage nécessaire au changement de phase du PCM et donc de réduire les courants d’amorphisation. Afin d’incorporer des matériaux PCM dans de telles structures, il est alors nécessaire de développer un procédé de dépôt très conforme. C’est pourquoi un procédé de dépôt PE-MOCVD (Plasma Enhanced- Metal Organic Chemical Vapor deposition) à injection liquide pulsée a été développé dans ce travail. Dans un premier temps des films amorphes et homogènes du composé binaire GeTe ont été déposés à partir des précurseurs organométalliques TDMAGe et DIPTe. Les analyses XPS révèlent que les couches de GeTe déposées sont stoechiométriques mais présentent une forte contamination en carbone. Ainsi, un des objectifs de cette thèse a été de réduire le taux de carbone dans les couches afin d’optimiser leurs propriétés de changement de phase. Une étude de l’impact des paramètres de dépôt tel que la puissance, la pression, la nature et le débit des gaz utilisés est alors présentée. En étudiant et en optimisant les paramètres de dépôt, des couches de GeTe contenant seulement 2 % at. de carbone ont pu être obtenues. Dans un second temps, des films du composé ternaire GeSbTe ont été déposés en injectant simultanément les trois précurseurs TDMAGe, TDMASb et DIPTe dans le plasma de dépôt. Une large gamme de composition peut alors être obtenue en variant les paramètres d’injection et de dépôt. L’un des principaux avantages de ce procédé est la capacité de couvrir une large gamme de compositions permettant d’obtenir des films possédant des propriétés de changement de phase très variées. L’impact des paramètres plasma sur la conformité du dépôt a aussi été étudié. Il est montré que l’ajout d’une composante BF à la puissance RF du plasma permet d’améliorer le remplissage des structures possédant des facteurs de forme élevés. Enfin, l’intégration dans des dispositifs mémoires PCRAM tests de matériaux PCM obtenus par ce procédé PE-MOCVD a mis en évidence des propriétés électriques proches de celles obtenues avec des matériaux déposés par les procédés de dépôt conventionnels de type PVD
Phase change random access memories PCRAM are based on the fast and reversible switch between the high resistive amorphous state and the low resistive crystalline state of a phase change material (PCM). These memories are considered to be one of the most promising candidates for the next generation of non volatile memories thanks to their unique set of features such as fast programming speed, multi-level storage capability, good endurance and high scalability. However, high power consumption during the RESET operation (IRESET) is the main challenge that PCRAM has to face in order to explode the non volatile memory market. In this context, it has been demonstrated that by integrating the phase change material (PCM) in high aspect ratio lithographic structures, the heating efficiency is improved leading to a reduced reset current. In order to fill such confined structures with the phase change material, a highly conformal deposition process is required. Therefore, a pulsed liquid injection Plasma Enhanced-Metal Organic Chemical Vapor Deposition process (PE-MOCVD) was developed in this work. First, amorphous and homogeneous GeTe films were deposited using the organometallic precursors TDMAGe and DIPTe as Ge and Te precursors. XPS measurements revealed a stoichiometric composition of GeTe but with high carbon contamination. Thus, one of the objectives of this work was to reduce the carbon contamination and to optimize the phase change properties of the deposited PCMs. The effect of deposition parameters such as plasma power, pressure and gas rate on the carbon contamination is then presented. By tuning and optimizing deposition parameters, GeTe films with carbon level as low at 2 at. % were obtained. Thereafter, homogeneous films of GeSbTe were deposited by injecting simultaneously the organometallic precursors TDMAGe, TDMASb and DiPTe in the plasma. A wide range of compositions was obtained by varying the injection and deposition operating parameters. Indeed, one of the main advantages of this process is the ability of varying films composition, which results in varying phase change characteristics of the deposited PCM. The impact of plasma parameters on the conformity of the process was also studied. It was shown that by adding a low frequency power component to the radio frequency power of the plasma, structures with high aspect ratio were successfully filled with the phase change material. Finally, electrical characterization of PCRAM test devices integrating phase change materials deposited by PE-MOCVD as active material have presented electrical properties similar to the ones obtained for materials deposited by conventional physical vapor deposition (PVD) process
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49

Coué, Martin. "Caractérisation électrique et étude TEM des problèmes de fiabilité dans les mémoires à changement de phase enrichis en germanium". Thesis, Université Grenoble Alpes (ComUE), 2016. http://www.theses.fr/2016GREAT018/document.

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Dans cette thèse, nous proposons une étude détaillée des mécanismes responsables de la perte de données dans les mémoires à changement de phase enrichies en germanium (Ge-rich PRAMs), à savoir la dérive de la résistance au cours du temps et la recristallisation de la phase amorphe. Nous commençons par une présentation du contexte dans lequel s'inscrit cette étude an donnant un aperçu rapide du marché des mémoires à semiconducteur et une comparaison des mémoires non volatiles émergentes. Les principes de fonctionnement de la technologie PRAM sont introduits, avec ses avantages, ses inconvénients, ainsi que la physique régissant le processus de cristallisation dans les matériaux à changement de phase, avant de décrire les problèmes de fiabilité qui nous intéressent.Une caractérisation électrique complète de dispositifs intégrant des alliages de GST enrichi en germanium est ensuite proposée, en commençant par la caractérisation des matériaux utilisés dans nos cellules, introduisant alors les avantages des alliages enrichis en Ge sur le GST standard. Les performances électriques des dispositifs intégrant ces matériaux sont analysées, avec une étude statistique des caractéristiques SET & RESET, de la fenêtre de programmation, de l'endurance et de la vitesse de cristallisation. Nous nous concentrons ensuite sur le thème principal de cette thèse en analysant la dérive en résistance de l'état SET de nos dispositifs Ge-rich, ainsi que les performances de rétention de l'état RESET.Dans la dernière partie, nous étudions les mécanismes physiques impliqués dans ces phénomènes en fournissant une étude détaillée de la structure des cellules, grâce à l'utilisation de la Microscopie Électronique en Transmission (MET). Les conditions et configurations expérimentales sont décrites, avant de présenter les résultats qui nous ont permis d'aller plus loin dans la compréhension de la dérive en résistance et de la recristallisation de la phase amorphe dans les dispositifs Ge-rich. Une discussion est finalement proposée, reliant les résultats des caractérisations électriques avec ceux des analyses TEM, conduisant à de nouvelles perspectives pour l'optimisation des dispositifs PRAMs
In this thesis we provide a detailed study of the mechanisms responsible for data loss in Ge-rich Ge2Sb2Te5 Phase-Change Memories, namely resistance drift over time and recrystallization of the amorphous phase. The context of this work is first presented with a rapid overview of the semiconductor memory market and a comparison of emerging non-volatile memories. The working principles of PRAM technology are introduced, together with its advantages, its drawbacks, and the physics governing the crystallization process in phase-change materials, before describing the reliability issues in which we are interested.A full electrical characterization of devices integrating germanium-enriched GST alloys is then proposed, starting with the characterization of the materials used in our PCM cells and introducing the benefits of Ge-rich GST alloys over standard GST. The electrical performances of devices integrating those materials are analyzed, with a statistical study of the SET & RESET characteristics, programming window, endurance and crystallization speed. We then focus on the main topic of this thesis by analyzing the resistance drift of the SET state of our Ge-rich devices, as well as the retention performances of the RESET state.In the last part, we investigate on the physical mechanisms involved in these phenomena by providing a detailed study of the cells' structure, thanks to Transmission Electron Microscopy (TEM). The experimental conditions and setups are described before presenting the results which allowed us to go deeper into the comprehension of the resistance drift and the recrystallization of the amorphous phase in Ge-rich devices. A discussion is finally proposed, linking the results of the electrical characterizations with the TEM analyses, leading to new perspectives for the optimization of PRAM devices
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50

Gasquez, Julien. "Conception de véhicules de tests pour l’étude de mémoires non-volatiles émergentes embarquées". Electronic Thesis or Diss., Aix-Marseille, 2022. http://www.theses.fr/2022AIXM0419.

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La mémoire à changement de phase (PCM) s’inscrit dans la stratégie de développement de mémoires non-volatiles embarquées sur les nœuds technologiques avancés (sub 28nm). En effet, la mémoire Flash-NOR devient de plus en plus onéreuse à intégrer dans les technologies avec des diélectriques à forte permittivité et des grilles métalliques. Cette thèse a donc pour objectif principal de réaliser des véhicules de tests afin d’étudier un point mémoire novateur PCM + OTS et de proposer des solutions afin de combler ses lacunes et ses limites suivant les applications envisagées. L’étude a pour support deux technologies différentes le HCMOS9A et le P28FDSOI. La première sert de support pour le développement d’un véhicule de validation technologique du point mémoire OTS+PCM. La deuxième est, quant à elle, utilisée pour démontrer la surface obtenu avec un dimensionnement agressif du point mémoire. Enfin, un circuit de lecture optimisé pour ce point mémoire a été réalisé permettant la compensation des courants de fuites ainsi que la régulation des tensions de polarisations de la matrice au cours de la lecture
Phase change memory (PCM) is part of the strategy to develop non-volatiles memories embedded in advanced technology nodes (sub 28nm). Indeed, Flash-NOR memory is becoming more and more expensive to integrate in technologies with high permittivity dielectrics and metallic gates. The main objective of this thesis is therefore to realize tests vehicles in order to study an innovative PCM + OTS memory point and to propose solutions to fill its gaps and limitations according to the envisaged applications. The study is based on two different technologies: HCMOS9A and P28FDSOI. The first one is used as support for the development of a technological validation vehicle of the OTS+PCM memory point. The second one is used to demonstrate the surface obtained with an aggressive sizing of the memory point. Finally, an optimized readout circuit for this memory point has been realized allowing the compensation of leakage currents as well as the regulation of the bias voltages of the matrix during the reading
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