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Tesis sobre el tema "Neural network accelerator"

Autor: Grafiati

Publicado: 25 de mayo de 2024

Última modificación: 31 de julio de 2025

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1

Tianxu, Yue. "Convolutional Neural Network FPGA-accelerator on Intel DE10-Standard FPGA." Thesis, Linköpings universitet, Elektroniska Kretsar och System, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-178174.

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Convolutional neural networks (CNNs) have been extensively used in many aspects, such as face and speech recognition, image searching and classification, and automatic drive. Hence, CNN accelerators have become a trending research. Generally, Graphics processing units (GPUs) are widely applied in CNNaccelerators. However, Field-programmable gate arrays (FPGAs) have higher energy and resource efficiency compared with GPUs, moreover, high-level synthesis tools based on Open Computing Language (OpenCL) can reduce the verification and implementation period for FPGAs. In this project, PipeCNN[1] is

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2

Oudrhiri, Ali. "Performance of a Neural Network Accelerator Architecture and its Optimization Using a Pipeline-Based Approach." Electronic Thesis or Diss., Sorbonne université, 2023. https://accesdistant.sorbonne-universite.fr/login?url=https://theses-intra.sorbonne-universite.fr/2023SORUS658.pdf.

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Ces dernières années, les réseaux de neurones ont gagné en popularité en raison de leur polyvalence et de leur efficacité dans la résolution d'une grande variété de tâches complexes. Cependant, à mesure que les réseaux neuronaux continuent de trouver des applications dans une gamme toujours croissante de domaines, leurs importantes exigences en matière de calcul deviennent un défi pressant. Cette demande en calcul est particulièrement problématique lors du déploiement de réseaux neuronaux sur des dispositifs embarqués aux ressources limitées, en particulier dans le contexte du calcul en périph

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3

Maltoni, Pietro. "Progetto di un acceleratore hardware per layer di convoluzioni depthwise in applicazioni di Deep Neural Network." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2021. http://amslaurea.unibo.it/24205/.

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Il progressivo sviluppo tecnologico e il costante monitoraggio, controllo e analisi della realtà circostante ha condotto allo sviluppo di dispositivi IoT sempre più performanti, per questo si è iniziato a parlare di Edge Computing. In questi dispositivi sono presenti le risorse per elaborare i dati dai sensori direttamente in locale. Questa tecnologia si adatta bene alle CNN, reti neurali per l'analisi e il riconoscimento di immagini. Le Separable Convolution rappresentano una nuova frontiera perchè permettono di diminuire in modo massiccio la quantità di operazioni da eseguire su tensori di d

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4

Xu, Hongjie. "Energy-Efficient On-Chip Cache Architectures and Deep Neural Network Accelerators Considering the Cost of Data Movement." Doctoral thesis, Kyoto University, 2021. http://hdl.handle.net/2433/263786.

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付記する学位プログラム名: 京都大学卓越大学院プログラム「先端光・電子デバイス創成学」<br>京都大学<br>新制・課程博士<br>博士(情報学)<br>甲第23325号<br>情博第761号<br>京都大学大学院情報学研究科通信情報システム専攻<br>(主査)教授小野寺秀俊, 教授大木英司, 教授佐藤高史<br>学位規則第4条第1項該当<br>Doctor of Informatics<br>Kyoto University<br>DFAM

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5

Pradels, Léo. "Efficient CNN inference acceleration on FPGAs : a pattern pruning-driven approach." Electronic Thesis or Diss., Université de Rennes (2023-....), 2024. http://www.theses.fr/2024URENS087.

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Les modèles d'apprentissage profond basés sur les CNNs offrent des performances de pointe dans les tâches de traitement d'images et de vidéos, en particulier pour l'amélioration ou la classification d'images. Cependant, ces modèles sont lourds en calcul et en empreinte mémoire, ce qui les rend inadaptés aux contraintes de temps réel sur des FPGA embarqués. Il est donc essentiel de compresser ces CNNs et de concevoir des architectures d'accélérateurs pour l'inférence qui intègrent la compression dans une approche de co-conception matérielle et logicielle. Bien que des optimisations logicielles

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6

Riera, Villanueva Marc. "Low-power accelerators for cognitive computing." Doctoral thesis, Universitat Politècnica de Catalunya, 2020. http://hdl.handle.net/10803/669828.

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Deep Neural Networks (DNNs) have achieved tremendous success for cognitive applications, and are especially efficient in classification and decision making problems such as speech recognition or machine translation. Mobile and embedded devices increasingly rely on DNNs to understand the world. Smartphones, smartwatches and cars perform discriminative tasks, such as face or object recognition, on a daily basis. Despite the increasing popularity of DNNs, running them on mobile and embedded systems comes with several main challenges: delivering high accuracy and performance with a small memory an

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7

Khan, Muhammad Jazib. "Programmable Address Generation Unit for Deep Neural Network Accelerators." Thesis, KTH, Skolan för elektroteknik och datavetenskap (EECS), 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-271884.

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The Convolutional Neural Networks are getting more and more popular due to their applications in revolutionary technologies like Autonomous Driving, Biomedical Imaging, and Natural Language Processing. With this increase in adoption, the complexity of underlying algorithms is also increasing. This trend entails implications for the computation platforms as well, i.e. GPUs, FPGA, or ASIC based accelerators, especially for the Address Generation Unit (AGU), which is responsible for the memory access. Existing accelerators typically have Parametrizable Datapath AGUs, which have minimal adaptabili

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8

Jalasutram, Rommel. "Acceleration of spiking neural networks on multicore architectures." Connect to this title online, 2009. http://etd.lib.clemson.edu/documents/1252424720/.

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9

Han, Bing. "ACCELERATION OF SPIKING NEURAL NETWORK ON GENERAL PURPOSE GRAPHICS PROCESSORS." University of Dayton / OhioLINK, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1271368713.

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10

Chen, Yu-Hsin Ph D. Massachusetts Institute of Technology. "Architecture design for highly flexible and energy-efficient deep neural network accelerators." Thesis, Massachusetts Institute of Technology, 2018. http://hdl.handle.net/1721.1/117838.

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Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2018.<br>This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.<br>Cataloged from student-submitted PDF version of thesis.<br>Includes bibliographical references (pages 141-147).<br>Deep neural networks (DNNs) are the backbone of modern artificial intelligence (AI). However, due to their high computational complexity and diverse shapes and sizes, dedicated accelerators that can achieve high

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11

Gaura, Elena Ioana. "Neural network techniques for the control and identification of acceleration sensors." Thesis, Coventry University, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.313132.

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12

Anderson, Thomas. "Built-In Self Training of Hardware-Based Neural Networks." University of Cincinnati / OhioLINK, 2017. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1512039036199393.

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13

Wijekoon, Jayawan. "Mixed signal VLSI circuit implementation of the cortical microcircuit models." Thesis, University of Manchester, 2011. https://www.research.manchester.ac.uk/portal/en/theses/mixed-signal-vlsi-circuit-implementation-of-the-cortical-microcircuit-models(6deb2d34-5811-42ec-a4f1-e11cdb6816f1).html.

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This thesis proposes a novel set of generic and compact biologically plausible VLSI (Very Large Scale Integration) neural circuits, suitable for implementing a parallel VLSI network that closely resembles the function of a small-scale neocortical network. The proposed circuits include a cortical neuron, two different long-term plastic synapses and four different short-term plastic synapses. These circuits operate in accelerated-time, where the time scale of neural responses is approximately three to four orders of magnitude faster than the biological-time scale of the neuronal activities, prov

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14

Ngo, Kalle. "FPGA Hardware Acceleration of Inception Style Parameter Reduced Convolution Neural Networks." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-205026.

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Some researchers have noted that the growth rate in the number of network parameters of many recently proposed state-of-the-art CNN topologies is placing unrealistic demands on hardware resources and limits the practical applications of Neural Networks. This is particularly apparent when considering many of the projected applications (IoT, autonomous vehicles, etc) utilize embedded systems with even greater restrictions on computation and memory bandwidth than the typical research-class computer cluster that the CNN was designed on. The GoogLeNet CNN in 2014 proposed a new level of organizatio

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15

Reiche, Myrgård Martin. "Acceleration of deep convolutional neural networks on multiprocessor system-on-chip." Thesis, Uppsala universitet, Avdelningen för datorteknik, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-385904.

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In this master thesis some of the most promising existing frameworks and implementations of deep convolutional neural networks on multiprocessor system-on-chips (MPSoCs) are researched and evaluated. The thesis’ starting point was a previousthesis which evaluated possible deep learning models and frameworks for object detection on infra-red images conducted in the spring of 2018. In order to fit an existing deep convolutional neural network (DCNN) on a Multiple-Processor-System on Chip it needs modifications. Most DCNNs are trained on Graphic processing units (GPUs) with a bit width of 32 bit.

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16

Silfa, Franyell. "Energy-efficient architectures for recurrent neural networks." Doctoral thesis, Universitat Politècnica de Catalunya, 2021. http://hdl.handle.net/10803/671448.

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Deep Learning algorithms have been remarkably successful in applications such as Automatic Speech Recognition and Machine Translation. Thus, these kinds of applications are ubiquitous in our lives and are found in a plethora of devices. These algorithms are composed of Deep Neural Networks (DNNs), such as Convolutional Neural Networks and Recurrent Neural Networks (RNNs), which have a large number of parameters and require a large amount of computations. Hence, the evaluation of DNNs is challenging due to their large memory and power requirements. RNNs are employed to solve sequence to sequ

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17

Torcolacci, Veronica. "Implementation of Machine Learning Algorithms on Hardware Accelerators." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2020.

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Nowadays, cutting-edge technology, innovation and efficiency are the cornerstones on which industries are based. Therefore, prognosis and health management have started to play a key role in the prevention of crucial faults and failures. Recognizing malfunctions in a system in advance is fundamental both in economic and safety terms. This obviously requires a lot of data – mainly information from sensors or machine control - to be processed, and it’s in this scenario that Machine Learning comes to the aid. This thesis aims to apply these methodologies to prognosis in automatic machines and

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18

Tran, Ba-Hien. "Advancing Bayesian Deep Learning : Sensible Priors and Accelerated Inference." Electronic Thesis or Diss., Sorbonne université, 2023. https://accesdistant.sorbonne-universite.fr/login?url=https://theses-intra.sorbonne-universite.fr/2023SORUS280.pdf.

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Au cours de la dernière décennie, l'apprentissage profond a connu un succès remarquable dans de nombreux domaines, révolutionnant divers domaines grâce à ses performances sans précédent. Cependant, une limitation fondamentale des modèles d'apprentissage profond réside dans leur incapacité à quantifier avec précision l'incertitude des prédictions, ce qui pose des défis pour les applications qui nécessitent une évaluation robuste des risques. Heureusement, l'apprentissage profond Bayésien offre une solution prometteuse en adoptant une formulation Bayésienne pour les réseaux neuronaux. Malgré des

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19

CARRERAS, MARCO. "Acceleration of Artificial Neural Networks at the edge: adapting flexibly to emerging devices and models." Doctoral thesis, Università degli Studi di Cagliari, 2022. http://hdl.handle.net/11584/333521.

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Convolutional Neural Networks (CNNs) are nowadays ubiquitously used in a wide range of applications. While usually CNNs are designed to operate on images for computer vision (CV) tasks, more recently, they have been applied in multiple other embedded domains, to analyze different information and data types. A key research topic involving CNNs is related to methodologies and instruments implementing a shift from cloud computing to the edge computing paradigm. The classic implementation of CNN-based systems relies on the cloud: an embedded system samples data acquired by adequate sensors and sen

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20

Hofmann, Jaco [Verfasser], Andreas [Akademischer Betreuer] Koch, and Mladen [Akademischer Betreuer] Berekovic. "An Improved Framework for and Case Studies in FPGA-Based Application Acceleration - Computer Vision, In-Network Processing and Spiking Neural Networks / Jaco Hofmann ; Andreas Koch, Mladen Berekovic." Darmstadt : Universitäts- und Landesbibliothek Darmstadt, 2020. http://d-nb.info/1202923097/34.

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21

Mealey, Thomas C. "Binary Recurrent Unit: Using FPGA Hardware to Accelerate Inference in Long Short-Term Memory Neural Networks." University of Dayton / OhioLINK, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1524402925375566.

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22

Li, Zhuoer. "Étude de l'accélération matérielle reconfigurable pour les réseaux de neurones embarqués faible consommation." Electronic Thesis or Diss., Université Côte d'Azur, 2024. http://www.theses.fr/2024COAZ4025.

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L'évolution des applications de l'intelligence artificielle (IA) mène à une augmentation de la demande pour le déploiement de réseaux de neurones sur des dispositifs autonomes en raison de l'expansion de l'IA dans des secteurs variés, tels que la santé et l'automobile. Cette décentralisation des calculs (Edge AI) présente des défis, notamment en termes de performances et de consommation d'énergie. Avec la complexité croissante des modèles de réseaux neuronaux pour accomplir des tâches de plus en plus sophistiquées, optimiser l'efficacité énergétique tout en maintenant les fonctionnalités avanc

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23

Wu, Gang. "Using GPU acceleration and a novel artificial neural networks approach for ultra-fast fluorescence lifetime imaging microscopy analysis." Thesis, University of Sussex, 2017. http://sro.sussex.ac.uk/id/eprint/71657/.

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Fluorescence lifetime imaging microscopy (FLIM) which is capable of visualizing local molecular and physiological parameters in living cells, plays a significant role in biological sciences, chemistry, and medical research. In order to unveil dynamic cellular processes, it is necessary to develop high-speed FLIM technology. Thanks to the development of highly parallel time-to-digital convertor (TDC) arrays, especially when integrated with single-photon avalanche diodes (SPADs), the acquisition rate of high-resolution fluorescence lifetime imaging has been dramatically improved. On the other ha

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24

Kong, Yat Sheng [Verfasser], and Dieter [Akademischer Betreuer] Schramm. "Establishment of artificial neural network for suspension spring fatigue life prediction using strain and acceleration data / Yat Sheng Kong ; Betreuer: Dieter Schramm." Duisburg, 2019. http://d-nb.info/1191692558/34.

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25

Viebke, André. "Accelerated Deep Learning using Intel Xeon Phi." Thesis, Linnéuniversitetet, Institutionen för datavetenskap (DV), 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:lnu:diva-45491.

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Deep learning, a sub-topic of machine learning inspired by biology, have achieved wide attention in the industry and research community recently. State-of-the-art applications in the area of computer vision and speech recognition (among others) are built using deep learning algorithms. In contrast to traditional algorithms, where the developer fully instructs the application what to do, deep learning algorithms instead learn from experience when performing a task. However, for the algorithm to learn require training, which is a high computational challenge. High Performance Computing can help

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26

Vogel, Sebastian A. A. Verfasser], Gerd [Akademischer Betreuer] [Ascheid, and Walter [Akademischer Betreuer] Stechele. "Design and implementation of number representations for efficient multiplierless acceleration of convolutional neural networks / Sebastian A. A. Vogel ; Gerd Ascheid, Walter Stechele." Aachen : Universitätsbibliothek der RWTH Aachen, 2020. http://d-nb.info/1220082716/34.

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27

Axillus, Viktor. "Comparing Julia and Python : An investigation of the performance on image processing with deep neural networks and classification." Thesis, Blekinge Tekniska Högskola, Institutionen för programvaruteknik, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:bth-19160.

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Python is the most popular language when it comes to prototyping and developing machine learning algorithms. Python is an interpreted language that causes it to have a significant performance loss compared to compiled languages. Julia is a newly developed language that tries to bridge the gap between high performance but cumbersome languages such as C++ and highly abstracted but typically slow languages such as Python. However, over the years, the Python community have developed a lot of tools that addresses its performance problems. This raises the question if choosing one language over the o

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28

Slouka, Lukáš. "Implementace neuronové sítě bez operace násobení." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2018. http://www.nusl.cz/ntk/nusl-386017.

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The subject of this thesis is neural network acceleration with the goal of reducing the number of floating point multiplications. The theoretical part of the thesis surveys current trends and methods used in the field of neural network acceleration. However, the focus is on the binarization techniques which allow replacing multiplications with logical operators. The theoretical base is put into practice in two ways. First is the GPU implementation of crucial binary operators in the Tensorflow framework with a performance benchmark. Second is an application of these operators in simple image cl

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29

PETRINI, ALESSANDRO. "HIGH PERFORMANCE COMPUTING MACHINE LEARNING METHODS FOR PRECISION MEDICINE." Doctoral thesis, Università degli Studi di Milano, 2021. http://hdl.handle.net/2434/817104.

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La Medicina di Precisione (Precision Medicine) è un nuovo paradigma che sta rivoluzionando diversi aspetti delle pratiche cliniche: nella prevenzione e diagnosi, essa è caratterizzata da un approccio diverso dal "one size fits all" proprio della medicina classica. Lo scopo delle Medicina di Precisione è di trovare misure di prevenzione, diagnosi e cura che siano specifiche per ciascun individuo, a partire dalla sua storia personale, stile di vita e fattori genetici. Tre fattori hanno contribuito al rapido sviluppo della Medicina di Precisione: la possibilità di generare rapidamente ed econo

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30

Zmeškal, Jiří. "Extrémní učící se stroje pro předpovídání časových řad." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2018. http://www.nusl.cz/ntk/nusl-376967.

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Thesis is aimed at the possibility of utilization of extreme learning machines and echo state networks for time series forecasting with possibility of utilizing GPU acceleration. Such predictions are part of nearly everyone’s daily lives through utilization in weather forecasting, prediction of regular and stock market, power consumption predictions and many more. Thesis is meant to familiarize reader firstly with theoretical basis of extreme learning machines and echo state networks, taking advantage of randomly generating majority of neural networks parameters and avoiding iterative processe

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31

Jasovský, Filip. "Realizace superpočítače pomocí grafické karty." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2014. http://www.nusl.cz/ntk/nusl-220617.

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This master´s thesis deals with realization of supercomputer using graphic card with CUDA technology. The theoretical part of this thesis describes the function and the possibility of graphic cards and desktop computers and processes taking place in the proces sof calculations on them. The practical part deals with creation system for calculations on the graphic card using the algorithm of artificial intelligence, more specifically artificial neural networks. Subsequently is the generated program used for data classification of large input data file. Finally the results are compared.

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32

Reoyo-Prats, Reine. "Etude du vieillissement de récepteurs solaires : estimation de propriétés thermophysiques par méthode photothermique associée aux outils issus de l'intelligence artificielle." Thesis, Perpignan, 2020. http://www.theses.fr/2020PERP0017.

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L’augmentation de la consommation énergétique et la prise de conscience du dérèglement climatique induit par l’augmentation des émissions de gaz à effet de serre engendrent un changement progressif du modèle énergétique. Les technologies faisant appel à des ressources renouvelables se développent depuis plusieurs décennies ; c’est notamment le cas des centrales solaires à concentration. La problématique de leur durabilité se pose donc. Cette thèse participe en premier lieu à la réflexion concernant la méthodologie de vieillissement accéléré des matériaux employés dans les récepteurs de ces cen

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33

Pradhan, Manoj Kumar. "Conformal Thermal Models for Optimal Loading and Elapsed Life Estimation of Power Transformers." Thesis, Indian Institute of Science, 2004. https://etd.iisc.ac.in/handle/2005/97.

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Power and Generator Transformers are important and expensive elements of a power system. Inadvertent failure of Power Transformers would cause long interruption in power supply with consequent loss of reliability and revenue to the supply utilities. The mineral oil impregnated paper, OIP, is an insulation of choice in large power transformers in view of its excellent dielectric and other properties, besides being relatively inexpensive. During the normal working regime of the transformer, the insulation thereof is subjected to various stresses, the more important among them are, electrical

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Pradhan, Manoj Kumar. "Conformal Thermal Models for Optimal Loading and Elapsed Life Estimation of Power Transformers." Thesis, Indian Institute of Science, 2004. http://hdl.handle.net/2005/97.

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Power and Generator Transformers are important and expensive elements of a power system. Inadvertent failure of Power Transformers would cause long interruption in power supply with consequent loss of reliability and revenue to the supply utilities. The mineral oil impregnated paper, OIP, is an insulation of choice in large power transformers in view of its excellent dielectric and other properties, besides being relatively inexpensive. During the normal working regime of the transformer, the insulation thereof is subjected to various stresses, the more important among them are, electrical,

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35

Narmack, Kirilll. "Dynamic Speed Adaptation for Curves using Machine Learning." Thesis, KTH, Skolan för elektroteknik och datavetenskap (EECS), 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-233545.

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The vehicles of tomorrow will be more sophisticated, intelligent and safe than the vehicles of today. The future is leaning towards fully autonomous vehicles. This degree project provides a data driven solution for a speed adaptation system that can be used to compute a vehicle speed for curves, suitable for the underlying driving style of the driver, road properties and weather conditions. A speed adaptation system for curves aims to compute a vehicle speed suitable for curves that can be used in Advanced Driver Assistance Systems (ADAS) or in Autonomous Driving (AD) applications. This degree

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36

Jebelli, Ali. "Development of Sensors and Microcontrollers for Underwater Robots." Thesis, Université d'Ottawa / University of Ottawa, 2014. http://hdl.handle.net/10393/31283.

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Nowadays, small autonomous underwater robots are strongly preferred for remote exploration of unknown and unstructured environments. Such robots allow the exploration and monitoring of underwater environments where a long term underwater presence is required to cover a large area. Furthermore, reducing the robot size, embedding electrical board inside and reducing cost are some of the challenges designers of autonomous underwater robots are facing. As a key device for reliable operation-decision process of autonomous underwater robots, a relatively fast and cost effective controller based on F

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37

Lee, Heng, and 李亨. "Convolutional Neural Network Accelerator with Vector Quantization." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/w7kr56.

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碩士<br>國立臺灣大學<br>電子工程學研究所<br>107<br>Deep neural networks (DNNs) have demonstrated impressive performance in many edge computer vision tasks, causing the increasing demand for DNN accelerator on mobile and internet of things (IoT) devices. However, the massive power consumption and storage requirement make the hardware design challenging. In this paper, we introduce a DNN accelerator based on a model compression technique vector quantization (VQ), which can reduce the network model size and computation cost simultaneously. Moreover, a specialized processing element (PE) is designed with various

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38

Chen, Chun-Chen, and 陳俊辰. "Design Exploration Methodology for Deep Convolutional Neural Network Accelerator." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/sj63xu.

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Yu-LinHu and 胡雨霖. "General Accelerator Study and Design for Convolutional Neural Network." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/86u346.

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碩士<br>國立成功大學<br>電機工程學系<br>107<br>The hardware design of Convolutional Neural Networks (CNN) facing the following problems: high complexity of computation, large amount of data movement and divergence to different neural network in structural domain. The previous work has dealt well with the first two problems but fail to take the third question in a wide consideration. After analyzing the state-to-art CNN accelerators and the design space they exploiting, we try to develop a format that can describe the full design space. Base on our design space exploration and hardware evaluation, we propose

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ACHARJEE, SUVAJIT, and 蘇沃杰. "Hardware Efficient Accelerator for Binary Convolution Neural Network Inference." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/2c8792.

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碩士<br>國立交通大學<br>電機資訊國際學程<br>107<br>Binary Neural Network is such a topic in this recent era that it is improving day by day to improve the use in computer vision such as recognition, object detection, depth perception etc. However, most of the existing designs suffer from low hardware utilization or complex circuits that result in high hardware cost. In addition, a large amount of computation redundancy still exists in BNN inference. Therefore, to overcome all these issues like hardware utilization and the problem of computational complexity, this design has adopted systolic array architecture

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Lin, Chien-Yu, and 林建宇. "Merlin: A Sparse Neural Network Accelerator Utilizing Both Neuron and Weight Sparsity." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/6aq7yc.

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42

Wu, Yi-Heng, and 吳奕亨. "Compressing Convolutional Neural Network by VectorQuantization : Implementation and Accelerator Design." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/959vy5.

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碩士<br>國立臺灣大學<br>電子工程學研究所<br>105<br>In recent years, deep convolutional neural networks~(CNNs) achieve ground-breaking success in many computer vision research fields. Due to the large model size and tremendous computation of CNNs, they cannot be efficiently executed in small devices like mobile phones. Although several hardware accelerator architectures have been developed, most of them can only efficient address one of the two major layers in CNN, convolutional~(CONV) and fully connected~(FC) layers. In this thesis, based on algorithm-architecture-co-exploration, our architecture targets at e

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Kung, Chu King, and 江子近. "An Energy-Efficient Accelerator SOC for Convolutional Neural Network Training." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/y475rn.

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碩士<br>國立臺灣大學<br>電子工程學研究所<br>107<br>The recent resurgence of artificial intelligence is due to advances in deep learning. Deep neural network (DNN) has exceeded human capability in many computer vision applications, such as object detection, image classification and playing games like Go. The idea of deep learning dates back to as early as the 1950s, with the key algorithmic breakthroughs occurred in the 1980s. Yet, it has only been in the past few years, that powerful hardware accelerators became available to train neural networks. Even now, the demand for machine learning algorithms is still

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Chen, Chih-Chiang, and 陳致強. "Energy-Efficient Accelerator and Data Processing Flow for Convolutional Neural Network." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/fy245e.

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碩士<br>國立交通大學<br>電子研究所<br>106<br>For recent years, Machine learning and Convolutional Neural Network (CNN) has become the most popular research topic in this era. Restricted to the hardware technique that has not become mature, this topic is not being fully developed before. Since CNN needs a lot of calculation and a large amount of data access and movement, the energy cost on the data access may even exceed the computation consumption. Therefore, how to manage data reuse efficiently and reduce data access has turned into a research theme. In this thesis, we propose a Processing Element (PE) th

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Chen, Yi-Kai, and 陳奕愷. "Architecture Design of Energy-Efficient Reconfigurable Deep Convolutional Neural Network Accelerator." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/46a96s.

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Juang, Tzung-Han, and 莊宗翰. "Energy-Efficient Accelerator Architecture for Neural Network Training and Its Circuit Design." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/sffx7b.

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碩士<br>國立臺灣大學<br>電子工程學研究所<br>106<br>Artificial intelligence (AI) has become the most popular research topic in recent years. AI can be applied to applications on image classification, object detection and natural language processing. Especially, researchers have breakthroughs on such fields with neural networks. Neural network is known for its versatile and deep architectures, which can have more than hundreds of layers. Such structure make neural network needs large amount of computation and memory. Improvement of hardware acceleration on graphics processing units (GPU) make neural networks be

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Hsu, Lien-Chih, and 徐連志. "ESSA: An Energy-Aware Bit-Serial Streaming Deep Convolutional Neural Network Accelerator." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/859cgm.

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碩士<br>國立清華大學<br>資訊工程學系所<br>107<br>Over the past decade, deep convolutional neural networks (CNN) have been widely embraced in various visual recognition applications due to their extraordinary accuracies that even surpassed those of human beings. However, the high computational complexity and massive amount of data storages are two challenges for the hardware design of CNN. Although the existence of GPU can deal with the high computational complexity, the large energy consumption due to huge external memory access has pushed researchers towards dedicated CNN accelerator designs. Generally, the

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Shen, En-Ho, and 沈恩禾. "Reconfigurable Low Arithmetic Precision Convolution Neural Network Accelerator VLSI Design and Implementation." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/7678c2.

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碩士<br>國立臺灣大學<br>電子工程學研究所<br>107<br>Deep neural networks (DNNs) shows promising results on various AI application tasks. However such networks typically are executed on general purpose GPUs with bulky size in form factor and hundreds of watt in power consumption, which unsuitable for mobile applications. In this thesis, we present a VLSI architecture able to process on quantized low numeric-precision convolution neural networks (CNNs), cutting down on power consumption from memory access and speeding the model up with limited area budget,particularlyﬁtformobiledevices.We ﬁrst propose a quantiza

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Mohammadi, Mahnaz. "An Accelerator for Machine Learning Based Classifiers." Thesis, 2017. http://etd.iisc.ac.in/handle/2005/4245.

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Artificial Neural Networks (ANNs) are algorithmic techniques that simulate biological neural systems. Typical realization of ANNs are software solutions using High Level Languages (HLLs) such as C, C++, etc. Such solutions have performance limitations which can be attributed to one of the following reasons: • Code generated by the compiler cannot perform application specific optimizations. • Communication latencies between processors through a memory hierarchy could be significant due to non-deterministic nature of the communications. In data mining _eld, ANN algorithms have been widely used

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Yen-Hsing and 李彥興. "Design of Low Complexity Convolutional Neural Network Accelerator for Finger-Vein Identification System." Thesis, 2019. http://ndltd.ncl.edu.tw/cgi-bin/gs32/gsweb.cgi/login?o=dnclcdr&s=id=%22107NCHU5441060%22.&searchmode=basic.

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碩士<br>國立中興大學<br>電機工程學系所<br>107<br>Vein identification is a vital branch with more invisibility and unique features among biometric field. The reason is that veins belong to the physiological characteristics of human beings, and must be irradiated by specific bands of light to obtain a complete vein image. Also, taking vein image for identification has strong reliability for the reason that each person’s vein has its unique pattern. Thanks to the advanced computer technology, neural network has rapidly become main trend of classification method for image classification. Through establishing big

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