Artículos de revistas sobre el tema "NAND Flash Interface"
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Myramuru, Shanmukha Sai Nikhil, Dr S. Chandra Mohan Reddy y Dr Gannera Mamatha. "Design and Integration of NAND Flash Memory Controller for Open Power-based Fabless SoC". International Journal of Engineering and Advanced Technology 12, n.º 2 (30 de diciembre de 2022): 137–44. http://dx.doi.org/10.35940/ijeat.d3470.1212222.
Texto completoLiu, Hai Ke, Shun Wang, Xin Gna Kang y Jin Liang Wang. "Realization of NAND FLASH Control Glueless Interface Circuit". Advanced Materials Research 1008-1009 (agosto de 2014): 659–62. http://dx.doi.org/10.4028/www.scientific.net/amr.1008-1009.659.
Texto completoLiu, Gen Xian y Dong Sheng Wang. "Low Cost Wear Leveling for High-Density SPI NAND Flash in Memory Constrained Embedded System". Applied Mechanics and Materials 427-429 (septiembre de 2013): 1277–80. http://dx.doi.org/10.4028/www.scientific.net/amm.427-429.1277.
Texto completoHung, Ji Jun, Kai Bu, Zhao Lin Sun, Jie Tao Diao y Jian Bin Liu. "PCI Express-Based NVMe Solid State Disk". Applied Mechanics and Materials 464 (noviembre de 2013): 365–68. http://dx.doi.org/10.4028/www.scientific.net/amm.464.365.
Texto completoMissimer, Katherine, Manos Athanassoulis y Richard West. "Telomere: Real-Time NAND Flash Storage". ACM Transactions on Embedded Computing Systems 21, n.º 1 (31 de enero de 2022): 1–24. http://dx.doi.org/10.1145/3479157.
Texto completoYan, Chin-Rung, Jone F. Chen, Ya-Jui Lee, Yu-Jie Liao, Chung-Yi Lin, Chih-Yuan Chen, Yin-Chia Lin y Huei-Haurng Chen. "Extraction and Analysis of Interface States in 50-nm nand Flash Devices". IEEE Transactions on Electron Devices 60, n.º 3 (marzo de 2013): 992–97. http://dx.doi.org/10.1109/ted.2013.2240458.
Texto completoKim, Geukchan, Hyejin Kim y Sunghoon Chun. "A New Package for High Speed and High Density eStorage Using the Frequency Boosting Chip". International Symposium on Microelectronics 2015, n.º 1 (1 de octubre de 2015): 000220–24. http://dx.doi.org/10.4071/isom-2015-wa22.
Texto completoLi, Qing, Shan Qing Hu, Yang Feng y Teng Long. "The Design and Implementation of a High-Speed and Large-Capacity NAND Flash Storage System". Applied Mechanics and Materials 543-547 (marzo de 2014): 568–71. http://dx.doi.org/10.4028/www.scientific.net/amm.543-547.568.
Texto completoJeong, Jun-Kyo, Jae-Young Sung, Woon-San Ko, Ki-Ryung Nam, Hi-Deok Lee y Ga-Won Lee. "Physical and Electrical Analysis of Poly-Si Channel Effect on SONOS Flash Memory". Micromachines 12, n.º 11 (15 de noviembre de 2021): 1401. http://dx.doi.org/10.3390/mi12111401.
Texto completoYi, Hyun Ju y Tae Hee Han. "Adaptive Design Techniques for High-speed Toggle 2.0 NAND Flash Interface Considering Dynamic Internal Voltage Fluctuations". Journal of the Institute of Electronics Engineers of Korea 49, n.º 9 (25 de septiembre de 2012): 251–58. http://dx.doi.org/10.5573/ieek.2012.49.9.251.
Texto completoKang, K. ‐T, S. ‐Y Kim y K. ‐Y Lee. "Open‐loop per‐pin skew compensation with lock fault detector for parallel NAND flash memory interface". Electronics Letters 54, n.º 6 (marzo de 2018): 346–48. http://dx.doi.org/10.1049/el.2017.4341.
Texto completoKang, Ho-Jung, Sung-Ho Bae, Min-Kyu Jeong, Sung-Min Joe, Byung-Gook Park y Jong-Ho Lee. "Extraction of Interface Trap Density in the Region Between Adjacent Wordlines in NAND Flash Memory Strings". IEEE Electron Device Letters 36, n.º 1 (enero de 2015): 53–55. http://dx.doi.org/10.1109/led.2014.2367025.
Texto completoRamesh, Sivaramakrishnan, Arjun Ajaykumar, Lars-Åke Ragnarsson, Laurent Breuil, Gabriel El Hajjam, Ben Kaczer, Attilio Belmonte et al. "Understanding the Origin of Metal Gate Work Function Shift and Its Impact on Erase Performance in 3D NAND Flash Memories". Micromachines 12, n.º 9 (8 de septiembre de 2021): 1084. http://dx.doi.org/10.3390/mi12091084.
Texto completoLee, Jun Gyu y Tae Whan Kim. "Effects of the Grain Boundary and Interface Traps on the Electrical Characteristics of 3D NAND Flash Memory Devices". Journal of Nanoscience and Nanotechnology 18, n.º 3 (1 de marzo de 2018): 1944–47. http://dx.doi.org/10.1166/jnn.2018.15000.
Texto completoKim, Chulbum, Jinho Ryu, Taesung Lee, Hyunggon Kim, Jaewoo Lim, Jaeyong Jeong, Seonghwan Seo et al. "A 21 nm High Performance 64 Gb MLC NAND Flash Memory With 400 MB/s Asynchronous Toggle DDR Interface". IEEE Journal of Solid-State Circuits 47, n.º 4 (abril de 2012): 981–89. http://dx.doi.org/10.1109/jssc.2012.2185341.
Texto completoGillingham, Peter, David Chinn, Eric Choi, Jin-Ki Kim, Don Macdonald, Hakjune Oh, Hong-Beom Pyeon y Roland Schuetz. "800 MB/s DDR NAND Flash Memory Multi-Chip Package With Source-Synchronous Interface for Point-to-Point Ring Topology". IEEE Access 1 (2013): 811–16. http://dx.doi.org/10.1109/access.2013.2294433.
Texto completoZou, Xingqi, Lei Jin, Liang Yan, Yu Zhang, Di Ai, Chenglin Zhao, Feng Xu, Chunlong Li y Zongliang Huo. "The influence of grain boundary interface traps on electrical characteristics of top select gate transistor in 3D NAND flash memory". Solid-State Electronics 153 (marzo de 2019): 67–73. http://dx.doi.org/10.1016/j.sse.2018.12.007.
Texto completoAn, Ho-Myoung, Hee-Dong Kim y Tae Geun Kim. "Analysis of the energy distribution of interface traps related to tunnel oxide degradation using charge pumping techniques for 3D NAND flash applications". Materials Research Bulletin 48, n.º 12 (diciembre de 2013): 5084–87. http://dx.doi.org/10.1016/j.materresbull.2013.05.008.
Texto completoChu, Kai-Chun, Kuo-Chi Chang, Hsiao-Chuan Wang, Yuh-Chung Lin y Tsui-Lien Hsu. "Field-Programmable Gate Array-Based Hardware Design of Optical Fiber Transducer Integrated Platform". Journal of Nanoelectronics and Optoelectronics 15, n.º 5 (1 de mayo de 2020): 663–71. http://dx.doi.org/10.1166/jno.2020.2835.
Texto completoZhao, Dongxue, Zhiliang Xia, Linchun Wu, Tao Yang, Dongyu Fan, Yuancheng Yang, Lei Liu, Wenxi Zhou y Zongliang Huo. "Optimization of Bump Defect at High-Concentration In-Situ Phosphorus Doped Polysilicon/TEOS Oxide Interface for 3D NAND Flash Memory Application". IEEE Journal of the Electron Devices Society 9 (2021): 1243–47. http://dx.doi.org/10.1109/jeds.2021.3123844.
Texto completoSon, C. I., S. Yoon, S. W. Chung, C. I. Park y E. Y. Chung. "Variability-insensitive scheme for NAND flash memory interfaces". Electronics Letters 42, n.º 23 (2006): 1335. http://dx.doi.org/10.1049/el:20062239.
Texto completoKang, Jing, Fei Liu, Ya Hai y Yongshan Wang. "A Wide-Range Four-Phase All-Digital DLL with De-Skew Circuit". Electronics 12, n.º 7 (29 de marzo de 2023): 1610. http://dx.doi.org/10.3390/electronics12071610.
Texto completoDeng, He Lian y You Gang Xiao. "Development of General Embedded Intelligent Monitoring System for Tower Crane". Applied Mechanics and Materials 103 (septiembre de 2011): 394–98. http://dx.doi.org/10.4028/www.scientific.net/amm.103.394.
Texto completoKurinjimalar, Ramu, Selvam Manjula, M. Ramachandran y RajKumar Sangeetha. "A Review on Solid state Drives transformer concept A new era in power supply". Electrical and Automation Engineering 2, n.º 1 (1 de marzo de 2023): 104–10. http://dx.doi.org/10.46632/eae/2/1/15.
Texto completoSong, Wan Soo, Ju Eun Kang y Sang Jeen Hong. "Spectroscopic Analysis of CF4/O2 Plasma Mixed with N2 for Si3N4 Dry Etching". Coatings 12, n.º 8 (27 de julio de 2022): 1064. http://dx.doi.org/10.3390/coatings12081064.
Texto completoRui, Ying, Meng-Hsien Chen, Sumeet Pandey y Lan Li. "Applications and mechanisms of anisotropic two-step Si3N4 etching with hydrogen plasma conditioning". Journal of Vacuum Science & Technology A 41, n.º 2 (marzo de 2023): 022601. http://dx.doi.org/10.1116/6.0002139.
Texto completo"LSI joins open NAND Flash Interface Working Group". Microelectronics International 25, n.º 3 (25 de julio de 2008). http://dx.doi.org/10.1108/mi.2008.21825cab.012.
Texto completoChoi, Saeyan, Seungsob Kim, Seain Bang, Jungchun Kim, Dong Geun Park, Seunghee Jin, Min Jung Kim, Eunmee Kwon y Jae Woo Lee. "Interface engineering of 9X stacked 3D NAND flash memory using hydrogen post-treatment annealing". Nanotechnology, 5 de octubre de 2022. http://dx.doi.org/10.1088/1361-6528/ac97a1.
Texto completoHou, Tuo-Hung, Jaegoo Lee, Jonathan T. Shaw y Edwin C. Kan. "Flash Memory Scaling: From Material Selection to Performance Improvement". MRS Proceedings 1071 (2008). http://dx.doi.org/10.1557/proc-1071-f02-01.
Texto completoLiu, Liwei, Yibo Sun, Xiaohe Huang, Chunsen Liu, Zhaowu Tang, Senfeng Zeng, David Wei Zhang, Shaozhi Deng y Peng Zhou. "Ultrafast Flash Memory with Large Self-Rectifying Ratio Based on Atomically Thin MoS2-Channel Transistor". Materials Futures, 17 de mayo de 2022. http://dx.doi.org/10.1088/2752-5724/ac7067.
Texto completoCacciato, Antonio, Laurent Breuil, Geert Van den bosch, Olivier Richard, Aude Rothschild, Arnaud Furnémont, Hugo Bender, Jorge A. Kittl y Jan Van Houdt. "Effect of Top Dielectric Morphology and Gate Material on the Performance of Nitride-based FLASH Memory Cells". MRS Proceedings 1071 (2008). http://dx.doi.org/10.1557/proc-1071-f02-08.
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