Literatura académica sobre el tema "Multiple-Input Floating Gate MOS"
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Artículos de revistas sobre el tema "Multiple-Input Floating Gate MOS"
Rodríguez-Villegas, Esther O., Alberto Yúfera y Adoración Rueda. "A Low-Voltage Floating-Gate MOS Biquad". VLSI Design 12, n.º 3 (1 de enero de 2001): 407–14. http://dx.doi.org/10.1155/2001/16935.
Texto completoGupta, Maneesha, Richa Srivastava y Urvashi Singh. "Low Voltage Floating Gate MOS Transistor Based Differential Voltage Squarer". ISRN Electronics 2014 (9 de febrero de 2014): 1–6. http://dx.doi.org/10.1155/2014/357184.
Texto completoMehrvarz, H. R. y Chee Yee Kwok. "A novel multi-input floating-gate MOS four-quadrant analog multiplier". IEEE Journal of Solid-State Circuits 31, n.º 8 (1996): 1123–31. http://dx.doi.org/10.1109/4.508259.
Texto completoKhateb, Fabian, Tomasz Kulej, Harikrishna Veldandi y Winai Jaikla. "Multiple-input bulk-driven quasi-floating-gate MOS transistor for low-voltage low-power integrated circuits". AEU - International Journal of Electronics and Communications 100 (febrero de 2019): 32–38. http://dx.doi.org/10.1016/j.aeue.2018.12.023.
Texto completoSrivastava, Richa, Maneesha Gupta y Urvashi Singh. "Fully Programmable Gaussian Function Generator Using Floating Gate MOS Transistor". ISRN Electronics 2012 (20 de noviembre de 2012): 1–5. http://dx.doi.org/10.5402/2012/148492.
Texto completoKhateb, Fabian, Tomasz Kulej, Montree Kumngern y Vilém Kledrowetz. "Low-Voltage Diode-Less Rectifier Based on Fully Differential Difference Transconductance Amplifier". Journal of Circuits, Systems and Computers 26, n.º 11 (17 de marzo de 2017): 1750172. http://dx.doi.org/10.1142/s0218126617501729.
Texto completoSharroush, Sherif y Sherif Nafea. "A Novel Domino Logic Based on Floating-Gate MOS Transistors". Jordan Journal of Electrical Engineering 9, n.º 3 (2023): 410. http://dx.doi.org/10.5455/jjee.204-1672498383.
Texto completoPlascencia Jauregui, Francisco Javier, Agustín Santiago Medina Vazquez, Edwin Christian Becerra Alvarez, José Manuel Arce Zavala y Sandra Fabiola Flores Ruiz. "On the methodology of calculating volume charge density in a MIFGMOS substrate using Poisson’s equation". Microelectronics International 38, n.º 4 (14 de octubre de 2021): 206–15. http://dx.doi.org/10.1108/mi-01-2021-0004.
Texto completoLuck, A., S. Jung, R. Brederlow, R. Thewes, K. Goser y W. Weber. "On the design robustness of threshold logic gates using multi-input floating gate MOS transistors". IEEE Transactions on Electron Devices 47, n.º 6 (junio de 2000): 1231–40. http://dx.doi.org/10.1109/16.842967.
Texto completoRajesh, Durgam, Subramanian Tamil, Nikhil Raj y Bharti Chourasia. "Low-voltage bulk-driven flipped voltage follower-based transconductance amplifier". Bulletin of Electrical Engineering and Informatics 11, n.º 2 (1 de abril de 2022): 765–71. http://dx.doi.org/10.11591/eei.v11i2.3306.
Texto completoTesis sobre el tema "Multiple-Input Floating Gate MOS"
Tripathi, Ankit. "Low Power Analog Neural Network Framework with MIFGMOS". Thesis, 2020. https://etd.iisc.ac.in/handle/2005/4829.
Texto completoCapítulos de libros sobre el tema "Multiple-Input Floating Gate MOS"
Yang, Kewei y Andreas G. Andreou. "A Multiple Input Differential Amplifier Based on Charge Sharing on a Floating-Gate MOSFET". En Analog Signal Processing, 21–32. Boston, MA: Springer US, 1994. http://dx.doi.org/10.1007/978-1-4757-4503-0_2.
Texto completoActas de conferencias sobre el tema "Multiple-Input Floating Gate MOS"
Plascencia Jauregui, Francisco, Santiago Medina Vazquez, Edwin Becerra Alvarez, Jose Arce Zavala y Sandra Flores Ruiz. "A Method to Model the Volume Charge Density in a Multiple-Input Floating-Gate MOS Transistor". En 2020 17th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE). IEEE, 2020. http://dx.doi.org/10.1109/cce50788.2020.9299156.
Texto completoTripathi, Ankit, Mehdi Arabizadeh, Sourabh Khandelwal y Chetan Singh Thakur. "Analog Neuromorphic System Based on Multi Input Floating Gate MOS Neuron Model". En 2019 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2019. http://dx.doi.org/10.1109/iscas.2019.8702492.
Texto completoKeles, Fatih y Tulay Yildirim. "Pattern recognition using N-input neuron circuits based on floating gate MOS transistors". En IEEE EUROCON 2009 (EUROCON). IEEE, 2009. http://dx.doi.org/10.1109/eurcon.2009.5167634.
Texto completoMankar, Monica V. y Shweta P. Hajare. "Multiple-Input Multiple-Valued Pseudo-floating Gate DAC". En 2010 International Conference on Advances in Recent Technologies in Communication and Computing (ARTCom). IEEE, 2010. http://dx.doi.org/10.1109/artcom.2010.100.
Texto completoDavila-Saldivar, C., A. S. Medina-Vazquez, A. Jimenez-Perez y M. A. Gurrola-Navarro. "Extracting the floating gate voltage on the multiple-input FGMOS transistor". En 2014 11th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE). IEEE, 2014. http://dx.doi.org/10.1109/iceee.2014.6978250.
Texto completoKumngern, Montree y Fabian Khateb. "A low-voltage and low-power multiple-input floating-gate FDCCII". En 2015 12th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON). IEEE, 2015. http://dx.doi.org/10.1109/ecticon.2015.7206943.
Texto completoHang, Guoqiang, Xuanchang Zhou y Xiaohui Hu. "Design of Dynamic Digital Circuits with n-Channel Multiple-Input Floating-Gate Transistors". En 2014 IEEE 12th International Conference on Dependable, Autonomic and Secure Computing (DASC). IEEE, 2014. http://dx.doi.org/10.1109/dasc.2014.86.
Texto completoArce-Zavala, J. M., A. S. Medina-Vazquez y M. A. Gurrola-Navarro. "Design and validation of a mixed-signal correlator using a multiple-input floating gate transistor". En 2015 12th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE). IEEE, 2015. http://dx.doi.org/10.1109/iceee.2015.7357913.
Texto completoQuah, A. C. T., D. Nagalingam, G. B. Ang, C. Q. Chen, H. H. Ma, E. Susanto, S. Moon, S. P. Neo, J. C. Lam y Z. H. Mai. "Enhanced Static Fault Localization Methodology on Resistive Open Defects Using Photon Emission Microscopy and Layout Defect Prediction". En ISTFA 2016. ASM International, 2016. http://dx.doi.org/10.31399/asm.cp.istfa2016p0520.
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