Artículos de revistas sobre el tema "Low-density parity-check Decoders"
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Mao, Yun, Ying Guo, Jun Peng, Xueqin Jiang y Moon Ho Lee. "Double-Layer Low-Density Parity-Check Codes over Multiple-Input Multiple-Output Channels". International Journal of Antennas and Propagation 2012 (2012): 1–6. http://dx.doi.org/10.1155/2012/716313.
Texto completoXia, Tian, Hsiao-Chun Wu y Hong Jiang. "New Stopping Criterion for Fast Low-Density Parity-Check Decoders". IEEE Communications Letters 18, n.º 10 (octubre de 2014): 1679–82. http://dx.doi.org/10.1109/lcomm.2014.2349988.
Texto completoDjordjevic, Ivan B. "Photonic entanglement-assisted quantum low-density parity-check encoders and decoders". Optics Letters 35, n.º 9 (30 de abril de 2010): 1464. http://dx.doi.org/10.1364/ol.35.001464.
Texto completoPerez-Pascual, Asun, Alex Hamilton, Robert G. Maunder y Lajos Hanzo. "Conceiving Extrinsic Information Transfer Charts for Stochastic Low-Density Parity-Check Decoders". IEEE Access 6 (2018): 55741–53. http://dx.doi.org/10.1109/access.2018.2872113.
Texto completoMohsenin, Tinoosh y Bevan M. Baas. "A Split-Decoding Message Passing Algorithm for Low Density Parity Check Decoders". Journal of Signal Processing Systems 61, n.º 3 (26 de febrero de 2010): 329–45. http://dx.doi.org/10.1007/s11265-010-0456-y.
Texto completoPsota, Eric y Lance C. Pérez. "The Manifestation of Stopping Sets and Absorbing Sets as Deviations on the Computation Trees of LDPC Codes". Journal of Electrical and Computer Engineering 2010 (2010): 1–17. http://dx.doi.org/10.1155/2010/432495.
Texto completoIsmail, Mohamed, Imran Ahmed y Justin Coon. "Low Power Decoding of LDPC Codes". ISRN Sensor Networks 2013 (17 de enero de 2013): 1–12. http://dx.doi.org/10.1155/2013/650740.
Texto completoWang, Biao. "Novel Early Termination Method of an ADMM-Penalized Decoder for LDPC Codes in the IoT". Security and Communication Networks 2022 (14 de octubre de 2022): 1–13. http://dx.doi.org/10.1155/2022/4599105.
Texto completoStark, Maximilian, Jan Lewandowsky y Gerhard Bauch. "Information-Bottleneck Decoding of High-Rate Irregular LDPC Codes for Optical Communication Using Message Alignment". Applied Sciences 8, n.º 10 (11 de octubre de 2018): 1884. http://dx.doi.org/10.3390/app8101884.
Texto completoDinh, The Cuong, Huyen Pham Thi, Hung Dao Tuan y Nghia Pham Xuan. "ONE-MINIUM-ONLY BASIC-SET TRELLIS MIN-MAX DECODER ARCHITECTURE FOR NONBINARY LDPC CODE". Journal of Computer Science and Cybernetics 37, n.º 2 (31 de mayo de 2021): 91–106. http://dx.doi.org/10.15625/1813-9663/37/2/15917.
Texto completoGrospellier, Antoine, Lucien Grouès, Anirudh Krishna y Anthony Leverrier. "Combining hard and soft decoders for hypergraph product codes". Quantum 5 (15 de abril de 2021): 432. http://dx.doi.org/10.22331/q-2021-04-15-432.
Texto completoAwais, Muhammad y Carlo Condo. "Flexible LDPC Decoder Architectures". VLSI Design 2012 (26 de junio de 2012): 1–16. http://dx.doi.org/10.1155/2012/730835.
Texto completoLi, Rongchun, Yong Dou, Dan Zou, Shi Wang y Ying Zhang. "Efficient graphics processing unit based layered decoders for quasicyclic low-density parity-check codes". Concurrency and Computation: Practice and Experience 27, n.º 1 (17 de diciembre de 2013): 29–46. http://dx.doi.org/10.1002/cpe.3193.
Texto completoTran-Thi, Bich Ngoc, Thien Truong Nguyen-Ly y Trang Hoang. "An FPGA Design with High Memory Efficiency and Decoding Performance for 5G LDPC Decoder". Electronics 12, n.º 17 (30 de agosto de 2023): 3667. http://dx.doi.org/10.3390/electronics12173667.
Texto completoThi Bao Nguyen, Tram, Tuy Nguyen Tan y Hanho Lee. "Low-Complexity High-Throughput QC-LDPC Decoder for 5G New Radio Wireless Communication". Electronics 10, n.º 4 (22 de febrero de 2021): 516. http://dx.doi.org/10.3390/electronics10040516.
Texto completoRaveendran, Nithin y Bane Vasić. "Trapping Sets of Quantum LDPC Codes". Quantum 5 (14 de octubre de 2021): 562. http://dx.doi.org/10.22331/q-2021-10-14-562.
Texto completoRaveendran, Nithin y Bane Vasić. "Trapping Sets of Quantum LDPC Codes". Quantum 5 (14 de octubre de 2021): 562. http://dx.doi.org/10.22331/q-2021-10-14-562.
Texto completoZHENG, XIA, FRANCIS C. M. LAU, CHI K. TSE y S. C. WONG. "STUDY OF BIFURCATION BEHAVIOR OF LDPC DECODERS". International Journal of Bifurcation and Chaos 16, n.º 11 (noviembre de 2006): 3435–49. http://dx.doi.org/10.1142/s0218127406016926.
Texto completoBiazaran, Reza y Hermann Joseph Helgert. "Improved noisy gradient descent bit-flipping algorithm over Rayleigh fading channel". International Journal of Electrical and Computer Engineering (IJECE) 12, n.º 3 (1 de junio de 2022): 2699. http://dx.doi.org/10.11591/ijece.v12i3.pp2699-2710.
Texto completoYao, Chang-Kun, Yun-Ching Tang y Hongchin Lin. "Energy-Efficient and Area-Efficient QC-LDPC with RS Decoders Using 2M-LMSA". Journal of Circuits, Systems and Computers 24, n.º 02 (27 de noviembre de 2014): 1550026. http://dx.doi.org/10.1142/s0218126615500267.
Texto completoArnone, L. J., J. Castiñeira Moreira y P. G. Farrell. "Field programmable gate arrays implementations of low complexity soft-input soft-output low-density parity-check decoders". IET Communications 6, n.º 12 (2012): 1670. http://dx.doi.org/10.1049/iet-com.2011.0767.
Texto completoSenthilpari, Chinnaiyan, Rosalind Deena y Lee Lini. "Low power, less occupying area, and improved speed of a 4-bit router/rerouter circuit for low-density parity-check (LDPC) decoders". F1000Research 11 (5 de enero de 2022): 7. http://dx.doi.org/10.12688/f1000research.73404.1.
Texto completoSenthilpari, Chinnaiyan, Rosalind Deena y Lee Lini. "Low power, less occupying area, and improved speed of a 4-bit router/rerouter circuit for low-density parity-check (LDPC) decoders". F1000Research 11 (14 de noviembre de 2022): 7. http://dx.doi.org/10.12688/f1000research.73404.2.
Texto completoKuc, Mateusz, Wojciech Sułek y Dariusz Kania. "FPGA-Oriented LDPC Decoder for Cyber-Physical Systems". Mathematics 8, n.º 5 (4 de mayo de 2020): 723. http://dx.doi.org/10.3390/math8050723.
Texto completoTSANG, TONY. "A METHOD FOR PERFORMANCE MODELING AND EVALUATION OF LDPC DECODER ARCHITECTURE". International Journal of Modeling, Simulation, and Scientific Computing 04, n.º 02 (junio de 2013): 1350003. http://dx.doi.org/10.1142/s1793962313500037.
Texto completoRaza, Hasnain, Syed Azhar Ali Zaidi, Aamir Rashid y Shafiq Haider. "An area efficient and high throughput implementation of layered min-sum iterative construction a posteriori probability LDPC decoder". PLOS ONE 16, n.º 3 (29 de marzo de 2021): e0249269. http://dx.doi.org/10.1371/journal.pone.0249269.
Texto completoLi, Yunfeng, Yingchun Li, Nan Ye, Tianyang Chen, Zhijie Wang y Junjie Zhang. "High Throughput Priority-Based Layered QC-LDPC Decoder with Double Update Queues for Mitigating Pipeline Conflicts". Sensors 22, n.º 9 (5 de mayo de 2022): 3508. http://dx.doi.org/10.3390/s22093508.
Texto completoOld, Josias y Manuel Rispler. "Generalized Belief Propagation Algorithms for Decoding of Surface Codes". Quantum 7 (7 de junio de 2023): 1037. http://dx.doi.org/10.22331/q-2023-06-07-1037.
Texto completoYun, In-Woo, Hee-ran Lee y Joon Tae Kim. "An Alternative Approach Obtaining a Normalization Factor in Normalized Min-Sum Algorithm for Low-Density Parity-Check Code". Wireless Communications and Mobile Computing 2018 (17 de octubre de 2018): 1–7. http://dx.doi.org/10.1155/2018/1398191.
Texto completoDai, Jingxin, Hang Yin, Yansong Lv, Weizhang Xu y Zhanxin Yang. "Multi-Gbps LDPC Decoder on GPU Devices". Electronics 11, n.º 21 (25 de octubre de 2022): 3447. http://dx.doi.org/10.3390/electronics11213447.
Texto completoNguyen, Tuy Tan, Tram Thi Bao Nguyen y Hanho Lee. "Low-Complexity Multi-Size Circular-Shift Network for 5G New Radio LDPC Decoders". Sensors 22, n.º 5 (24 de febrero de 2022): 1792. http://dx.doi.org/10.3390/s22051792.
Texto completoGanin, Dmitriy V., Mokhammed A. Y. Damdam y Aleksandr L. Savkin. "PERMUTATION DECODING IN LOW-POWER WIRELESS SENSOR NETWORKS". Автоматизация процессов управления 2, n.º 68 (2022): 37–44. http://dx.doi.org/10.35752/1991-2927-2022-2-68-37-44.
Texto completoGurskiy, S. S. y N. S. Mogilevskaya. "On the modification of bit-flipping decoder of LDPC-codes". Advanced Engineering Research 21, n.º 1 (4 de abril de 2021): 96–104. http://dx.doi.org/10.23947/2687-1653-2021-21-1-96-104.
Texto completoEl maammar, Nejwa, Seddik Bri y Jaouad Foshi. "A comparative simulation study of different decoding schemes in LDPC coded OFDM systems for NB-PLC channel". Indonesian Journal of Electrical Engineering and Computer Science 15, n.º 1 (1 de julio de 2019): 306. http://dx.doi.org/10.11591/ijeecs.v15.i1.pp306-313.
Texto completoBrkić, Srđan, Predrag Ivaniš y Bane Vasić. "On guaranteed correction of error patterns with artificial neural networks". Telfor Journal 14, n.º 2 (2022): 51–55. http://dx.doi.org/10.5937/telfor2202051b.
Texto completoEl-Abbasy, Karim, Ramy Taki Eldin, Salwa El Ramly y Bassant Abdelhamid. "Optimized Polar Codes as Forward Error Correction Coding for Digital Video Broadcasting Systems". Electronics 10, n.º 17 (3 de septiembre de 2021): 2152. http://dx.doi.org/10.3390/electronics10172152.
Texto completoMondal, Arijit, Satyannarayana Thatimattala, Vamshi Krishna Yalamaddi y Shayan Srinivasa Garani. "Efficient Coding Architectures for Reed–Solomon and Low-Density Parity-Check Decoders for Magnetic and Other Data Storage Systems". IEEE Transactions on Magnetics 54, n.º 2 (febrero de 2018): 1–15. http://dx.doi.org/10.1109/tmag.2017.2778053.
Texto completoMonsees, Tobias, Oliver Griebel, Matthias Herrmann, Dirk Wübben, Armin Dekorsy y Norbert Wehn. "Minimum-Integer Computation Finite Alphabet Message Passing Decoder: From Theory to Decoder Implementations towards 1 Tb/s". Entropy 24, n.º 10 (12 de octubre de 2022): 1452. http://dx.doi.org/10.3390/e24101452.
Texto completoScruby, T. R. y K. Nemoto. "Local Probabilistic Decoding of a Quantum Code". Quantum 7 (29 de agosto de 2023): 1093. http://dx.doi.org/10.22331/q-2023-08-29-1093.
Texto completoHasan, Fadhil S., Mahmood F. Mosleh y Aya H. Abdulhameed. "FPGA implementation of LDPC soft-decision decoders based DCSK for spread spectrum applications". International Journal of Electrical and Computer Engineering (IJECE) 11, n.º 6 (1 de diciembre de 2021): 4794. http://dx.doi.org/10.11591/ijece.v11i6.pp4794-4809.
Texto completoShah, Stark y Bauch. "Coarsely Quantized Decoding and Construction of Polar Codes Using the Information Bottleneck Method". Algorithms 12, n.º 9 (10 de septiembre de 2019): 192. http://dx.doi.org/10.3390/a12090192.
Texto completoChen, Rong y Lan Chen. "Dual Threshold Self-Corrected Minimum Sum Algorithm for 5G LDPC Decoders". Information 11, n.º 7 (7 de julio de 2020): 355. http://dx.doi.org/10.3390/info11070355.
Texto completoSkliarova, Iouliia. "Analysis and Comparison of Different Approaches to Implementing a Network-Based Parallel Data Processing Algorithm". Journal of Low Power Electronics and Applications 12, n.º 3 (9 de julio de 2022): 38. http://dx.doi.org/10.3390/jlpea12030038.
Texto completoBenhayoun, Mhammed, Mouhcine Razi, Anas Mansouri y Ali Ahaitouf. "Low-Complexity LDPC Decoding Algorithm Based on Layered Vicinal Variable Node Scheduling". Modelling and Simulation in Engineering 2022 (19 de enero de 2022): 1–12. http://dx.doi.org/10.1155/2022/1407788.
Texto completoSalih, Layla M., Thuraya Mahmoud Ali Al-Qaradaghi y Jalal Jamal Hamad Ameen. "Performance Analysis of Different Flexible Decoding Algorithms for NR-LDPC Codes". Tikrit Journal of Engineering Sciences 29, n.º 4 (11 de diciembre de 2022): 10–18. http://dx.doi.org/10.25130/tjes.29.4.2.
Texto completoPham, Huyen Thi, Hung Tuan Dao y Nghia Xuan Pham. "Simplified Variable Node Unit Architecture for Nonbinary LDPC Decoder". Journal of Science and Technology on Information security 9, n.º 01 (9 de abril de 2020): 12–19. http://dx.doi.org/10.54654/isj.v9i01.36.
Texto completoZhang, Chuan, Lulu Ge, Xingchi Zhang, Wei Wei, Jing Zhao, Zaichen Zhang, Zhongfeng Wang y Xiaohu You. "A Uniform Molecular Low-Density Parity Check Decoder". ACS Synthetic Biology 8, n.º 1 (4 de diciembre de 2018): 82–90. http://dx.doi.org/10.1021/acssynbio.8b00304.
Texto completoSułek, W. "Pipeline processing in low-density parity-check codes hardware decoder". Bulletin of the Polish Academy of Sciences: Technical Sciences 59, n.º 2 (1 de junio de 2011): 149–55. http://dx.doi.org/10.2478/v10175-011-0019-9.
Texto completoOh, Daesun y Keshab K. Parhi. "Low Complexity Decoder Architecture for Low-Density Parity-Check Codes". Journal of Signal Processing Systems 56, n.º 2-3 (30 de mayo de 2008): 217–28. http://dx.doi.org/10.1007/s11265-008-0231-5.
Texto completoKhittiwitchayakul, Sirawit, Watid Phakphisut y Pornchai Supnithi. "Associated Sectors of Magnetic Recording Systems Using Spatially Coupled LDPC Codes". ECTI Transactions on Electrical Engineering, Electronics, and Communications 20, n.º 1 (18 de febrero de 2022): 10–21. http://dx.doi.org/10.37936/ecti-eec.2022201.246094.
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